smdk2410_start.S revision 1.6 
1/*	$NetBSD: smdk2410_start.S,v 1.6 2011/01/31 06:28:05 matt Exp $ */
2
3/*
4 * Copyright (c) 2002, 2003 Fujitsu Component Limited
5 * Copyright (c) 2002, 2003 Genetec Corporation
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 *    Genetec corporation may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED.  IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35#include "opt_smdk2xx0.h"		/* SMDK2XX0_CLOCK_CONFIG */
36
37#include <machine/asm.h>
38#include <arm/armreg.h>
39#include "assym.h"
40
41#include <arm/s3c2xx0/s3c2410reg.h>	/* for S3C2410_SDRAM_START */
42
43RCSID("$NetBSD: smdk2410_start.S,v 1.6 2011/01/31 06:28:05 matt Exp $")
44
45/*
46 * Kernel start routine for Samsung SMDK2410.
47 * This code is excuted at the very first after the kernel is loaded
48 * by boot program.
49 */
50	.text
51
52#ifndef	SDRAM_START
53#define	SDRAM_START	S3C2410_SDRAM_START
54#endif
55#define KERNEL_TEXT_ADDR	(SDRAM_START+0x00200000)
56
57	.global	_C_LABEL(smdk2410_start)
58_C_LABEL(smdk2410_start):
59	/* Disable interrupt */
60	mrs	r0, cpsr
61	orr	r0, r0, #I32_bit
62	msr	cpsr, r0
63
64#ifdef SMDK2XX0_CLOCK_CONFIG
65	adr	r4, clock_config_data
66
67	mov	r2, #S3C2410_CLKMAN_BASE
68	ldr	r1, [r2, #CLKMAN_CLKSLOW]
69	orr	r0, r1, #CLKSLOW_SLOW
70	str	r0, [r2, #CLKMAN_CLKSLOW]
71	nop
72	nop
73
74	ldmia	r4, {r0,r3}
75	str	r0, [r2, #CLKMAN_CLKDIVN]
76
77	str	r3, [r2, #CLKMAN_MPLLCON]
78	nop
79	nop
80
81	str	r1, [r2, #CLKMAN_CLKSLOW]
82#endif
83
84	/* Are we running on right place ? */
85	adr r0, _C_LABEL(smdk2410_start)
86	ldr	r2, =KERNEL_TEXT_ADDR
87	cmp	r0, r2
88	beq	smdk2410_start_ram
89
90	/*
91	 * move me to RAM
92	 */
93	ldr r1, Lcopy_size
94	adr r0, _C_LABEL(smdk2410_start)
95	add r1, r1, #3
96	mov r1, r1, LSR #2
97	mov r4, r2
98
99	cmp r0, r2
100	bhs 5f
101
102	/* src < dest. copy from top */
103	add r0,r0,r1,LSL #2
104	add r2,r2,r1,LSL #2
105
1063:	ldr r3,[r0,#-4]!
107	str r3,[r2,#-4]!
108	subs r1,r1,#1
109	bhi 3b
110	b 7f
111
112	/* src >= dest. copy from bottom */
1135:	ldr r3,[r0],#4
114	str r3,[r2],#4
115	subs r1,r1,#1
116	bhi 5b
117
1187:
119	/* Jump to RAM */
120	ldr r0, Lstart_off
121	add pc, r4, r0
122
123Lcopy_size:	.word _edata-_C_LABEL(smdk2410_start)
124Lstart_off:	.word smdk2410_start_ram-_C_LABEL(smdk2410_start)
125
126smdk2410_start_ram:
127	/*
128	 *  Kernel is loaded in SDRAM (0x30200000..), and is expected to run
129	 *  in VA 0xc0200000..
130	 */
131
132	/* Disable MMU for a while */
133	mrc	p15, 0, r2, c1, c0, 0
134	bic	r2, r2, #CPU_CONTROL_MMU_ENABLE
135	mcr	p15, 0, r2, c1, c0, 0
136
137	nop
138	nop
139	nop
140
141	mov	r0,#SDRAM_START      /* pagetable */
142	adr	r4, mmu_init_table
143	b	2f
1441:
145	str	r3, [r0, r2]
146	add	r2, r2, #4
147	add	r3, r3, #(L1_S_SIZE)
148	adds	r1, r1, #-1
149	bhi	1b
1502:
151	ldmia	r4!, {r1,r2,r3}   /* # of sections, PA|attr, VA */
152	cmp	r1, #0
153	bne	1b
154
155	mcr	p15, 0, r0, c2, c0, 0	/* Set TTB */
156	mcr	p15, 0, r0, c8, c7, 0	/* Flush TLB */
157
158	/* Set the Domain Access register.  Very important! */
159	mov	r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
160	mcr	p15, 0, r0, c3, c0, 0
161
162	/* Enable MMU */
163	mrc	p15, 0, r0, c1, c0, 0
164	orr	r0, r0, #CPU_CONTROL_MMU_ENABLE
165	mcr	p15, 0, r0, c1, c0, 0
166
167	nop
168	nop
169	nop
170
171	/* Jump to kernel code in TRUE VA */
172	adr	r0, Lstart
173	ldr	pc, [r0]
174
175Lstart:
176	.word	start
177
178	.macro clock_data  hdivn, pdivn, mdiv, pdiv, sdiv
179	.word	(\hdivn)<<1 | \pdivn
180	.word	(\mdiv)<<PLLCON_MDIV_SHIFT | (\pdiv)<<PLLCON_PDIV_SHIFT | (\sdiv)<<PLLCON_SDIV_SHIFT
181	.endm
182#ifdef	SMDK2XX0_CLOCK_CONFIG
183clock_config_data:
184	clock_data SMDK2XX0_CLOCK_CONFIG
185#endif
186
187#define MMU_INIT(va,pa,n_sec,attr) \
188	.word	n_sec					    ; \
189	.word	4*((va)>>L1_S_SHIFT)			    ; \
190	.word	(pa)|(attr)				    ;
191
192mmu_init_table:
193	/* fill all table VA==PA */
194	MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP_KRW)
195	/* map SDRAM VA==PA, WT cacheable */
196	MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
197	/* map VA 0xc0000000..0xc3ffffff to PA 0x30000000..0x33ffffff */
198	MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
199
200	.word 0	/* end of table */
201
202