intr.h revision 1.17 
1/*	$NetBSD: intr.h,v 1.17 2009/12/14 00:46:02 matt Exp $	*/
2
3/*-
4 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _EVBMIPS_INTR_H_
33#define	_EVBMIPS_INTR_H_
34
35#include <sys/queue.h>
36
37#define	IPL_NONE	0	/* disable only this interrupt */
38#define	IPL_SOFTCLOCK	1	/* software interrupts */
39#define	IPL_SOFTBIO	1	/* software interrupts */
40#define	IPL_SOFTNET	2	/* software interrupts */
41#define	IPL_SOFTSERIAL	2	/* software interrupts */
42#define	IPL_VM		3
43#define	IPL_SCHED	4
44#define	IPL_HIGH	4
45
46#define	_IPL_N		5	/* max IPL + 1 */
47
48#define	_IPL_SI0_FIRST	IPL_SOFTCLOCK
49#define	_IPL_SI0_LAST	IPL_SOFTBIO
50
51#define	_IPL_SI1_FIRST	IPL_SOFTNET
52#define	_IPL_SI1_LAST	IPL_SOFTSERIAL
53
54#define	IST_UNUSABLE	-1	/* interrupt cannot be used */
55#define	IST_NONE	0	/* none (dummy) */
56#define	IST_PULSE	1	/* pulsed */
57#define	IST_EDGE	2	/* edge-triggered */
58#define	IST_LEVEL	3	/* level-triggered */
59#define	IST_LEVEL_HIGH	4	/* level triggered, active high */
60#define	IST_LEVEL_LOW	5       /* level triggered, active low */
61
62#ifdef	_KERNEL
63
64#include <mips/locore.h>
65
66extern const uint32_t ipl_sr_bits[_IPL_N];
67
68#define	spl0()		(void) _spllower(0)
69#define	splx(s)		(void) _splset(s)
70
71#define	splsoft()	_splraise(ipl_sr_bits[IPL_SOFT])
72
73typedef int ipl_t;
74typedef struct {
75	ipl_t _sr;
76} ipl_cookie_t;
77
78static inline ipl_cookie_t
79makeiplcookie(ipl_t ipl)
80{
81
82	return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
83}
84
85static inline int
86splraiseipl(ipl_cookie_t icookie)
87{
88
89	return _splraise(icookie._sr);
90}
91
92#include <sys/spl.h>
93
94struct evbmips_intrhand {
95	LIST_ENTRY(evbmips_intrhand) ih_q;
96	int (*ih_func)(void *);
97	void *ih_arg;
98	int ih_irq;
99	int ih_ipl;
100};
101
102#include <mips/softintr.h>
103
104void	evbmips_intr_init(void);
105void	intr_init(void);
106void	evbmips_iointr(uint32_t, uint32_t, uint32_t, uint32_t);
107void	*evbmips_intr_establish(int, int (*)(void *), void *);
108void	evbmips_intr_disestablish(void *);
109#endif /* _KERNEL */
110#endif /* ! _EVBMIPS_INTR_H_ */
111