mainbus.c revision 1.12
11.12Smatt/*	$NetBSD: mainbus.c,v 1.12 2011/06/06 17:13:05 matt Exp $	*/
21.1Ssimonb
31.1Ssimonb/*
41.1Ssimonb * Copyright 2002 Wasabi Systems, Inc.
51.1Ssimonb * All rights reserved.
61.1Ssimonb *
71.1Ssimonb * Written by Simon Burge for Wasabi Systems, Inc.
81.1Ssimonb *
91.1Ssimonb * Redistribution and use in source and binary forms, with or without
101.1Ssimonb * modification, are permitted provided that the following conditions
111.1Ssimonb * are met:
121.1Ssimonb * 1. Redistributions of source code must retain the above copyright
131.1Ssimonb *    notice, this list of conditions and the following disclaimer.
141.1Ssimonb * 2. Redistributions in binary form must reproduce the above copyright
151.1Ssimonb *    notice, this list of conditions and the following disclaimer in the
161.1Ssimonb *    documentation and/or other materials provided with the distribution.
171.1Ssimonb * 3. All advertising materials mentioning features or use of this software
181.1Ssimonb *    must display the following acknowledgement:
191.1Ssimonb *      This product includes software developed for the NetBSD Project by
201.1Ssimonb *      Wasabi Systems, Inc.
211.1Ssimonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
221.1Ssimonb *    or promote products derived from this software without specific prior
231.1Ssimonb *    written permission.
241.1Ssimonb *
251.1Ssimonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
261.1Ssimonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
271.1Ssimonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
281.1Ssimonb * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
291.1Ssimonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
301.1Ssimonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
311.1Ssimonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
321.1Ssimonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
331.1Ssimonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
341.1Ssimonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
351.1Ssimonb * POSSIBILITY OF SUCH DAMAGE.
361.1Ssimonb */
371.7Slukem
381.7Slukem#include <sys/cdefs.h>
391.12Smatt__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.12 2011/06/06 17:13:05 matt Exp $");
401.1Ssimonb
411.1Ssimonb#include "opt_pci.h"
421.1Ssimonb
431.1Ssimonb#include <sys/param.h>
441.1Ssimonb#include <sys/systm.h>
451.1Ssimonb#include <sys/device.h>
461.1Ssimonb#if defined(PCI_NETBSD_CONFIGURE)
471.1Ssimonb#include <sys/extent.h>
481.1Ssimonb#include <sys/malloc.h>
491.1Ssimonb#endif
501.1Ssimonb
511.1Ssimonb#include <dev/pci/pcivar.h>
521.1Ssimonb#if defined(PCI_NETBSD_CONFIGURE)
531.1Ssimonb#include <dev/pci/pciconf.h>
541.1Ssimonb#endif
551.1Ssimonb
561.1Ssimonb#include <mips/cache.h>
571.1Ssimonb#include <mips/cpuregs.h>
581.1Ssimonb
591.1Ssimonb#include <evbmips/malta/autoconf.h>
601.1Ssimonb#include <evbmips/malta/maltareg.h>
611.1Ssimonb#include <evbmips/malta/maltavar.h>
621.1Ssimonb
631.1Ssimonb#if defined(PCI_NETBSD_ENABLE_IDE)
641.1Ssimonb#include <dev/pci/pciide_piix_reg.h>
651.1Ssimonb#endif /* PCI_NETBSD_ENABLE_IDE */
661.1Ssimonb
671.1Ssimonb#include "locators.h"
681.1Ssimonb#include "pci.h"
691.1Ssimonb
701.12Smattstatic int	mainbus_match(device_t, cfdata_t, void *);
711.12Smattstatic void	mainbus_attach(device_t, device_t, void *);
721.12Smattstatic int	mainbus_submatch(device_t, cfdata_t, const int *, void *);
731.1Ssimonbstatic int	mainbus_print(void *, const char *);
741.1Ssimonb
751.12SmattCFATTACH_DECL_NEW(mainbus, 0,
761.5Sthorpej    mainbus_match, mainbus_attach, NULL, NULL);
771.1Ssimonb
781.1Ssimonb/* There can be only one. */
791.12Smattbool mainbus_found;
801.1Ssimonb
811.1Ssimonbstruct mainbusdev {
821.1Ssimonb	const char *md_name;
831.1Ssimonb	bus_addr_t md_addr;
841.1Ssimonb	int md_intr;
851.1Ssimonb};
861.1Ssimonb
871.12Smattconst struct mainbusdev mainbusdevs[] = {
881.1Ssimonb	{ "cpu",		-1,			-1 },
891.1Ssimonb	{ "gt",			MALTA_CORECTRL_BASE,	-1 },
901.1Ssimonb	{ "com",		MALTA_CBUSUART,		MALTA_CBUSUART_INTR },
911.1Ssimonb	{ "i2c",		MALTA_I2C_BASE,		-1 },
921.1Ssimonb	{ "gpio",		MALTA_GPIO_BASE,	-1 },
931.1Ssimonb	{ NULL,			0,			0 },
941.1Ssimonb};
951.1Ssimonb
961.1Ssimonbstatic int
971.12Smattmainbus_match(device_t parent, cfdata_t match, void *aux)
981.1Ssimonb{
991.1Ssimonb
1001.1Ssimonb	if (mainbus_found)
1011.1Ssimonb		return (0);
1021.1Ssimonb
1031.1Ssimonb	return (1);
1041.1Ssimonb}
1051.1Ssimonb
1061.1Ssimonbstatic void
1071.12Smattmainbus_attach(device_t parent, device_t self, void *aux)
1081.1Ssimonb{
1091.1Ssimonb	struct mainbus_attach_args ma;
1101.12Smatt	const struct mainbusdev *md;
1111.1Ssimonb#if defined(PCI_NETBSD_CONFIGURE)
1121.1Ssimonb	struct extent *ioext, *memext;
1131.1Ssimonb#endif
1141.1Ssimonb#if defined(PCI_NETBSD_ENABLE_IDE)
1151.1Ssimonb	struct malta_config *mcp = &malta_configuration;
1161.1Ssimonb	pci_chipset_tag_t pc = &mcp->mc_pc;
1171.1Ssimonb	pcitag_t idetag;
1181.1Ssimonb	pcireg_t idetim;
1191.1Ssimonb#endif
1201.1Ssimonb
1211.12Smatt	mainbus_found = true;
1221.1Ssimonb	printf("\n");
1231.1Ssimonb
1241.1Ssimonb#if defined(PCI_NETBSD_CONFIGURE)
1251.1Ssimonb	ioext = extent_create("pciio",  0x00001000, 0x0000efff,
1261.1Ssimonb	    M_DEVBUF, NULL, 0, EX_NOWAIT);
1271.1Ssimonb	memext = extent_create("pcimem", MALTA_PCIMEM1_BASE,
1281.1Ssimonb	    MALTA_PCIMEM1_BASE + MALTA_PCIMEM1_SIZE,
1291.1Ssimonb	    M_DEVBUF, NULL, 0, EX_NOWAIT);
1301.1Ssimonb
1311.1Ssimonb	pci_configure_bus(pc, ioext, memext, NULL, 0, mips_dcache_align);
1321.1Ssimonb	extent_destroy(ioext);
1331.1Ssimonb	extent_destroy(memext);
1341.1Ssimonb#endif /* PCI_NETBSD_CONFIGURE */
1351.1Ssimonb
1361.1Ssimonb#if defined(PCI_NETBSD_ENABLE_IDE)
1371.1Ssimonb	/*
1381.1Ssimonb	 * Perhaps PMON has not enabled the IDE controller.  Easy to
1391.1Ssimonb	 * fix -- just set the ENABLE bits for each channel in the
1401.1Ssimonb	 * IDETIM register.  Just clear all the bits for the channel
1411.1Ssimonb	 * except for the ENABLE bits -- the `pciide' driver will
1421.1Ssimonb	 * properly configure it later.
1431.1Ssimonb	 */
1441.1Ssimonb	idetim = 0;
1451.1Ssimonb	if (PCI_NETBSD_ENABLE_IDE & 0x01)
1461.1Ssimonb		idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 0);
1471.1Ssimonb	if (PCI_NETBSD_ENABLE_IDE & 0x02)
1481.1Ssimonb		idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, 1);
1491.1Ssimonb
1501.1Ssimonb	/* pciide0 is pci device 10, function 1 */
1511.1Ssimonb	idetag = pci_make_tag(pc, 0, 10, 1);
1521.1Ssimonb	pci_conf_write(pc, idetag, PIIX_IDETIM, idetim);
1531.1Ssimonb#endif
1541.1Ssimonb	for (md = mainbusdevs; md->md_name != NULL; md++) {
1551.1Ssimonb		ma.ma_name = md->md_name;
1561.1Ssimonb		ma.ma_addr = md->md_addr;
1571.1Ssimonb		ma.ma_intr = md->md_intr;
1581.8Sdrochner		(void) config_found_sm_loc(self, "mainbus", NULL, &ma,
1591.8Sdrochner		    mainbus_print, mainbus_submatch);
1601.1Ssimonb	}
1611.1Ssimonb}
1621.1Ssimonb
1631.1Ssimonbstatic int
1641.12Smattmainbus_submatch(device_t parent, cfdata_t cf,
1651.9Sdrochner		 const int *ldesc, void *aux)
1661.1Ssimonb{
1671.1Ssimonb	struct mainbus_attach_args *ma = aux;
1681.1Ssimonb
1691.1Ssimonb	if (cf->cf_loc[MAINBUSCF_ADDR] != MAINBUSCF_ADDR_DEFAULT &&
1701.1Ssimonb	    cf->cf_loc[MAINBUSCF_ADDR] != ma->ma_addr)
1711.1Ssimonb		return (0);
1721.1Ssimonb
1731.2Sthorpej	return (config_match(parent, cf, aux));
1741.1Ssimonb}
1751.1Ssimonb
1761.1Ssimonbstatic int
1771.1Ssimonbmainbus_print(void *aux, const char *pnp)
1781.1Ssimonb{
1791.1Ssimonb	struct mainbus_attach_args *ma = aux;
1801.1Ssimonb
1811.1Ssimonb	if (pnp != 0)
1821.1Ssimonb		return QUIET;
1831.1Ssimonb
1841.1Ssimonb	if (pnp)
1851.6Sthorpej		aprint_normal("%s at %s", ma->ma_name, pnp);
1861.1Ssimonb	if (ma->ma_addr != MAINBUSCF_ADDR_DEFAULT)
1871.6Sthorpej		aprint_normal(" addr 0x%lx", ma->ma_addr);
1881.1Ssimonb
1891.1Ssimonb	return (UNCONF);
1901.1Ssimonb}
191