machdep.c revision 1.4 
1/* $NetBSD: machdep.c,v 1.4 2019/03/29 00:24:56 simonb Exp $ */
2
3/*
4 * Copyright 2000, 2001
5 * Broadcom Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and copied only
8 * in accordance with the following terms and conditions.  Subject to these
9 * conditions, you may download, copy, install, use, modify and distribute
10 * modified or unmodified copies of this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce and
14 *    retain this copyright notice and list of conditions as they appear in
15 *    the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 *    Broadcom Corporation.  The "Broadcom Corporation" name may not be
19 *    used to endorse or promote products derived from this software
20 *    without the prior written permission of Broadcom Corporation.
21 *
22 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
23 *    WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
24 *    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
25 *    NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
26 *    FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
27 *    LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 *    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 *    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 *    BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 *    WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 *    OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/*
36 * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions, and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 *    notice, this list of conditions and the following disclaimer in the
45 *    documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * SUCH DAMAGE.
58 */
59
60#include <sys/cdefs.h>
61__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.4 2019/03/29 00:24:56 simonb Exp $");
62
63#include "opt_ddb.h"
64#include "opt_execfmt.h"
65#include "opt_modular.h"
66
67#include <sys/param.h>
68#include <sys/buf.h>
69#include <sys/conf.h>
70#include <sys/cpu.h>
71#include <sys/device.h>
72#include <sys/exec.h>
73#include <sys/file.h>
74#include <sys/intr.h>
75#include <sys/kcore.h>
76#include <sys/kernel.h>
77#include <sys/ksyms.h>
78#include <sys/malloc.h>
79#include <sys/mbuf.h>
80#include <sys/mount.h>
81#include <sys/msgbuf.h>
82#include <sys/proc.h>
83#include <sys/reboot.h>
84#include <sys/syscallargs.h>
85#include <sys/systm.h>
86
87#include <uvm/uvm_extern.h>
88
89#include <mips/locore.h>
90#include <mips/psl.h>
91#include <mips/pte.h>
92#include <mips/reg.h>
93
94#include <mips/cfe/cfe_api.h>
95
96#include <evbmips/sbmips/autoconf.h>
97#include <evbmips/sbmips/swarm.h>
98#include <evbmips/sbmips/systemsw.h>
99
100#if 0 /* XXXCGD */
101#include <evbmips/sbmips/nvram.h>
102#endif /* XXXCGD */
103#include <evbmips/sbmips/leds.h>
104
105#include <mips/sibyte/dev/sbbuswatchvar.h>
106
107#include "ksyms.h"
108
109#if NKSYMS || defined(DDB) || defined(MODULAR)
110#include <mips/db_machdep.h>
111#include <ddb/db_access.h>
112#include <ddb/db_sym.h>
113#include <ddb/db_extern.h>
114#include <sys/exec_elf.h>
115#endif
116
117#include <dev/cons.h>
118
119#if NKSYMS || defined(DDB) || defined(MODULAR)
120/* start and end of kernel symbol table */
121void	*ksym_start, *ksym_end;
122#endif
123
124/* Maps for VM objects. */
125struct vm_map *phys_map = NULL;
126
127char	bootstring[512];	/* Boot command */
128int	netboot;		/* Are we netbooting? */
129int	cfe_present;
130
131struct bootinfo_v1 bootinfo;
132
133phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
134int mem_cluster_cnt;
135
136void	configure(void);
137void	mach_init(long, long, long, long);
138
139extern void *esym;
140
141/*
142 * Do all the stuff that locore normally does before calling main().
143 */
144void
145mach_init(long fwhandle, long magic, long bootdata, long reserved)
146{
147	void *kernend;
148	extern char edata[], end[];
149	uint32_t config;
150
151	/* XXX this code must run on the target CPU */
152	config = mips3_cp0_config_read();
153	config &= ~MIPS3_CONFIG_K0_MASK;
154	config |= 0x05;				/* XXX.  cacheable coherent */
155	mips3_cp0_config_write(config);
156
157	/* Zero BSS.  XXXCGD: uh, is this really necessary still?  */
158	memset(edata, 0, end - edata);
159
160	/*
161	 * Copy the bootinfo structure from the boot loader.
162	 * this has to be done before mips_vector_init is
163	 * called because we may need CFE's TLB handler
164	 */
165
166	if (magic == BOOTINFO_MAGIC)
167		memcpy(&bootinfo, (struct bootinfo_v1 *)bootdata,
168		    sizeof bootinfo);
169	else if (reserved == CFE_EPTSEAL) {
170		magic = BOOTINFO_MAGIC;
171		memset(&bootinfo, 0, sizeof bootinfo);
172		bootinfo.version = BOOTINFO_VERSION;
173		bootinfo.fwhandle = fwhandle;
174		bootinfo.fwentry = bootdata;
175		bootinfo.ssym = (vaddr_t)end;
176		bootinfo.esym = (vaddr_t)end;
177	}
178
179	kernend = (void *)mips_round_page(end);
180#if NKSYMS || defined(DDB) || defined(MODULAR)
181	if (magic == BOOTINFO_MAGIC) {
182		ksym_start = (void *)(intptr_t)bootinfo.ssym;
183		ksym_end   = (void *)(intptr_t)bootinfo.esym;
184		kernend = (void *)mips_round_page((vaddr_t)ksym_end);
185	}
186#endif
187
188	consinit();
189
190	uvm_md_init();
191
192	/*
193	 * Copy exception-dispatch code down to exception vector.
194	 * Initialize locore-function vector.
195	 * Clear out the I and D caches.
196	 */
197#ifdef MULTIPROCESSOR
198	mips_vector_init(NULL, true);
199#else
200	mips_vector_init(NULL, false);
201#endif
202
203	mips_locoresw.lsw_bus_error = sibyte_bus_watch_check;
204
205	sb1250_ipl_map_init();
206
207#ifdef DEBUG
208	printf("fwhandle=%08X magic=%08X bootdata=%08X reserved=%08X\n",
209	    (u_int)fwhandle, (u_int)magic, (u_int)bootdata, (u_int)reserved);
210#endif
211
212	cpu_setmodel("sb1250");
213
214	if (magic == BOOTINFO_MAGIC) {
215		int idx;
216		int added;
217		uint64_t start, len, type;
218
219		cfe_init(bootinfo.fwhandle, bootinfo.fwentry);
220		cfe_present = 1;
221
222		idx = 0;
223		physmem = 0;
224		mem_cluster_cnt = 0;
225		while (cfe_enummem(idx, 0, &start, &len, &type) == 0) {
226			added = 0;
227			printf("Memory Block #%d start %08"PRIx64" len %08"PRIx64": %s: ",
228			    idx, start, len, (type == CFE_MI_AVAILABLE) ?
229			    "Available" : "Reserved");
230			if ((type == CFE_MI_AVAILABLE) &&
231			    (mem_cluster_cnt < VM_PHYSSEG_MAX)) {
232				/*
233				 * XXX Ignore memory above 256MB for now, it
234				 * XXX needs special handling.
235				 */
236				if (start < (256*1024*1024)) {
237				    physmem += btoc(((int) len));
238				    mem_clusters[mem_cluster_cnt].start =
239					(long) start;
240				    mem_clusters[mem_cluster_cnt].size =
241					(long) len;
242				    mem_cluster_cnt++;
243				    added = 1;
244				}
245			}
246			if (added)
247				printf("added to map\n");
248			else
249				printf("not added to map\n");
250			idx++;
251		}
252
253	} else {
254		/*
255		 * Handle the case of not being called from the firmware.
256		 */
257		/* XXX hardwire to 32MB; should be kernel config option */
258		physmem = 32 * 1024 * 1024 / 4096;
259		mem_clusters[0].start = 0;
260		mem_clusters[0].size = ctob(physmem);
261		mem_cluster_cnt = 1;
262	}
263
264
265	for (u_int i = 0; i < sizeof(bootinfo.boot_flags); i++) {
266		switch (bootinfo.boot_flags[i]) {
267		case '\0':
268			break;
269		case ' ':
270			continue;
271		case '-':
272			while (bootinfo.boot_flags[i] != ' ' &&
273			    bootinfo.boot_flags[i] != '\0') {
274				switch (bootinfo.boot_flags[i]) {
275				case 'a':
276					boothowto |= RB_ASKNAME;
277					break;
278				case 'd':
279					boothowto |= RB_KDB;
280					break;
281				case 's':
282					boothowto |= RB_SINGLE;
283					break;
284				}
285				i++;
286			}
287		}
288	}
289
290	/*
291	 * Load the rest of the available pages into the VM system.
292	 */
293	mips_page_physload(MIPS_KSEG0_START, (vaddr_t) kernend,
294	    mem_clusters, mem_cluster_cnt, NULL, 0);
295
296	/*
297	 * Initialize error message buffer (at end of core).
298	 */
299	mips_init_msgbuf();
300
301	pmap_bootstrap();
302
303	/*
304	 * Allocate uarea for lwp0 and set it.
305	 */
306	mips_init_lwp0_uarea();
307
308	/*
309	 * Initialize debuggers, and break into them, if appropriate.
310	 */
311#if NKSYMS || defined(DDB) || defined(MODULAR)
312	ksyms_addsyms_elf(((uintptr_t)ksym_end - (uintptr_t)ksym_start),
313	    ksym_start, ksym_end);
314#endif
315
316	if (boothowto & RB_KDB) {
317#if defined(DDB)
318		Debugger();
319#endif
320	}
321
322#ifdef MULTIPROCESSOR
323	mips_fixup_exceptions(mips_fixup_zero_relative);
324#endif
325}
326
327/*
328 * Allocate memory for variable-sized tables,
329 */
330void
331cpu_startup(void)
332{
333	/*
334	 * Just do the common stuff.
335	 */
336	cpu_startup_common();
337}
338
339int	waittime = -1;
340
341void
342cpu_reboot(int howto, char *bootstr)
343{
344
345	/* Take a snapshot before clobbering any registers. */
346	savectx(curpcb);
347
348	if (cold) {
349		howto |= RB_HALT;
350		goto haltsys;
351	}
352
353	/* If "always halt" was specified as a boot flag, obey. */
354	if (boothowto & RB_HALT)
355		howto |= RB_HALT;
356
357	boothowto = howto;
358	if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
359		waittime = 0;
360		vfs_shutdown();
361
362		/*
363		 * If we've been adjusting the clock, the todr
364		 * will be out of synch; adjust it now.
365		 */
366		resettodr();
367	}
368
369	splhigh();
370
371	if (howto & RB_DUMP)
372		dumpsys();
373
374haltsys:
375	doshutdownhooks();
376
377	pmf_system_shutdown(boothowto);
378
379	if (howto & RB_HALT) {
380		printf("\n");
381		printf("The operating system has halted.\n");
382		printf("Please press any key to reboot.\n\n");
383		cnpollc(1);	/* For proper keyboard command handling */
384		cngetc();
385		cnpollc(0);
386	}
387
388	printf("rebooting...\n\n");
389
390	if (cfe_present) {
391		/*
392		 * XXX
393		 * For some reason we can't return to CFE with
394		 * and do a warm start.  Need to look into this...
395		 */
396		cfe_exit(0, (howto & RB_DUMP) ? 1 : 0);
397		printf("cfe_exit didn't!\n");
398	}
399
400	printf("WARNING: reboot failed!\n");
401
402	for (;;);
403}
404
405static void
406cswarm_setled(u_int index, char c)
407{
408	volatile u_char *led_ptr =
409	    (void *)MIPS_PHYS_TO_KSEG1(SWARM_LEDS_PHYS);
410
411	if (index < 4)
412		led_ptr[0x20 + ((3 - index) << 3)] = c;
413}
414
415void
416cswarm_setleds(const char *str)
417{
418	int i;
419
420	for (i = 0; i < 4 && str[i]; i++)
421		cswarm_setled(i, str[i]);
422	for (; i < 4; i++)
423		cswarm_setled(' ', str[i]);
424}
425
426int
427sbmips_cca_for_pa(paddr_t pa)
428{
429	int rv;
430
431	rv = 2;			/* Uncached. */
432
433	/* Check each DRAM region. */
434	if ((pa >= 0x0000000000   && pa <= 0x000fffffff) ||	/* DRAM 0 */
435	    (pa >= 0x0080000000   && pa <= 0x008fffffff) ||	/* DRAM 1 */
436	    (pa >= 0x0090000000   && pa <= 0x009fffffff) ||	/* DRAM 2 */
437	    (pa >= 0x00c0000000   && pa <= 0x00cfffffff) ||	/* DRAM 3 */
438#ifdef _MIPS_PADDR_T_64BIT
439	    (pa >= 0x0100000000LL && pa <= 0x07ffffffffLL) ||	/* DRAM exp */
440#endif
441	   0) {
442		rv = 5;		/* Cacheable coherent. */
443	}
444
445	return (rv);
446}
447