machdep.c revision 1.31 
1/*	$NetBSD: machdep.c,v 1.31 2002/02/19 17:21:19 uch Exp $	*/
2
3/*-
4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
9 * Simulation Facility, NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by the NetBSD
22 *	Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 *    contributors may be used to endorse or promote products derived
25 *    from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40/*-
41 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
42 * All rights reserved.
43 *
44 * This code is derived from software contributed to Berkeley by
45 * William Jolitz.
46 *
47 * Redistribution and use in source and binary forms, with or without
48 * modification, are permitted provided that the following conditions
49 * are met:
50 * 1. Redistributions of source code must retain the above copyright
51 *    notice, this list of conditions and the following disclaimer.
52 * 2. Redistributions in binary form must reproduce the above copyright
53 *    notice, this list of conditions and the following disclaimer in the
54 *    documentation and/or other materials provided with the distribution.
55 * 3. All advertising materials mentioning features or use of this software
56 *    must display the following acknowledgement:
57 *	This product includes software developed by the University of
58 *	California, Berkeley and its contributors.
59 * 4. Neither the name of the University nor the names of its contributors
60 *    may be used to endorse or promote products derived from this software
61 *    without specific prior written permission.
62 *
63 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
64 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
65 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
66 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
67 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
68 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
69 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
70 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
71 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
72 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
73 * SUCH DAMAGE.
74 *
75 *	@(#)machdep.c	7.4 (Berkeley) 6/3/91
76 */
77
78#include "opt_ddb.h"
79#include "opt_kgdb.h"
80#include "opt_syscall_debug.h"
81#include "opt_memsize.h"
82#include "opt_initbsc.h"
83
84#include <sys/param.h>
85#include <sys/systm.h>
86#include <sys/signalvar.h>
87#include <sys/kernel.h>
88#include <sys/map.h>
89#include <sys/proc.h>
90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/buf.h>
93#include <sys/reboot.h>
94#include <sys/conf.h>
95#include <sys/file.h>
96#include <sys/malloc.h>
97#include <sys/mbuf.h>
98#include <sys/msgbuf.h>
99#include <sys/mount.h>
100#include <sys/vnode.h>
101#include <sys/device.h>
102#include <sys/extent.h>
103#include <sys/syscallargs.h>
104
105#ifdef KGDB
106#include <sys/kgdb.h>
107#endif
108
109#include <dev/cons.h>
110
111#include <uvm/uvm_extern.h>
112
113#include <sys/sysctl.h>
114
115#include <machine/cpu.h>
116#include <machine/cpufunc.h>
117#include <machine/psl.h>
118#include <machine/bootinfo.h>
119#include <machine/bus.h>
120#include <sh3/bscreg.h>
121#include <sh3/ccrreg.h>
122#include <sh3/cpgreg.h>
123#include <sh3/intcreg.h>
124#include <sh3/pfcreg.h>
125#include <sh3/wdtreg.h>
126#include <sh3/mmu.h>
127
128#include <sys/termios.h>
129#include "sci.h"
130
131/* the following is used externally (sysctl_hw) */
132char machine[] = MACHINE;		/* cpu "architecture" */
133char machine_arch[] = MACHINE_ARCH;	/* machine_arch = "sh3" */
134
135#ifdef sh3_debug
136int cpu_debug_mode = 1;
137#else
138int cpu_debug_mode = 0;
139#endif
140
141char bootinfo[BOOTINFO_MAXSIZE];
142
143int physmem;
144int dumpmem_low;
145int dumpmem_high;
146vaddr_t atdevbase;	/* location of start of iomem in virtual */
147paddr_t msgbuf_paddr;
148struct user *proc0paddr;
149
150extern int boothowto;
151extern paddr_t avail_start, avail_end;
152
153#ifdef	SYSCALL_DEBUG
154#define	SCDEBUG_ALL 0x0004
155extern int	scdebug;
156#endif
157
158#define IOM_RAM_END	((paddr_t)IOM_RAM_BEGIN + IOM_RAM_SIZE - 1)
159
160/*
161 * Extent maps to manage I/O and ISA memory hole space.  Allocate
162 * storage for 8 regions in each, initially.  Later, ioport_malloc_safe
163 * will indicate that it's safe to use malloc() to dynamically allocate
164 * region descriptors.
165 *
166 * N.B. At least two regions are _always_ allocated from the iomem
167 * extent map; (0 -> ISA hole) and (end of ISA hole -> end of RAM).
168 *
169 * The extent maps are not static!  Machine-dependent ISA and EISA
170 * routines need access to them for bus address space allocation.
171 */
172static	long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
173struct	extent *ioport_ex;
174struct	extent *iomem_ex;
175static	int ioport_malloc_safe;
176
177void setup_bootinfo __P((void));
178void dumpsys __P((void));
179void identifycpu __P((void));
180void initSH3 __P((void *));
181void InitializeSci  __P((unsigned char));
182void sh3_cache_on __P((void));
183void LoadAndReset __P((char *));
184void XLoadAndReset __P((char *));
185void Sh3Reset __P((void));
186void cpu_reset(void);
187#ifdef SH4
188void sh4_cache_flush __P((vaddr_t));
189#endif
190
191#include <dev/ic/comreg.h>
192#include <dev/ic/comvar.h>
193
194void	consinit __P((void));
195
196/*
197 * Machine-dependent startup code
198 *
199 * This is called from main() in kern/main.c.
200 */
201void
202cpu_startup()
203{
204
205	sh3_startup();
206
207	/* Safe for i/o port allocation to use malloc now. */
208	ioport_malloc_safe = 1;
209
210#ifdef SYSCALL_DEBUG
211	scdebug |= SCDEBUG_ALL;
212#endif
213
214#ifdef FORCE_RB_SINGLE
215	boothowto |= RB_SINGLE;
216#endif
217}
218
219#define CPUDEBUG
220
221/*
222 * machine dependent system variables.
223 */
224int
225cpu_sysctl(name, namelen, oldp, oldlenp, newp, newlen, p)
226	int *name;
227	u_int namelen;
228	void *oldp;
229	size_t *oldlenp;
230	void *newp;
231	size_t newlen;
232	struct proc *p;
233{
234	dev_t consdev;
235	struct btinfo_bootpath *bibp;
236	struct trapframe *tf;
237	char *osimage;
238
239	/* all sysctl names at this level are terminal */
240	if (namelen != 1)
241		return (ENOTDIR);		/* overloaded */
242
243	switch (name[0]) {
244	case CPU_CONSDEV:
245		if (cn_tab != NULL)
246			consdev = cn_tab->cn_dev;
247		else
248			consdev = NODEV;
249		return (sysctl_rdstruct(oldp, oldlenp, newp, &consdev,
250		    sizeof consdev));
251
252	case CPU_NKPDE:
253		return (sysctl_rdint(oldp, oldlenp, newp, nkpde));
254
255	case CPU_BOOTED_KERNEL:
256	        bibp = lookup_bootinfo(BTINFO_BOOTPATH);
257	        if (!bibp)
258			return (ENOENT); /* ??? */
259		return (sysctl_rdstring(oldp, oldlenp, newp, bibp->bootpath));
260
261	case CPU_SETPRIVPROC:
262		if (newp == NULL)
263			return (0);
264
265		/* set current process to priviledged process */
266		tf = p->p_md.md_regs;
267		tf->tf_ssr |= PSL_MD;
268		return (0);
269
270	case CPU_DEBUGMODE:
271		return (sysctl_int(oldp, oldlenp, newp, newlen,
272				   &cpu_debug_mode));
273
274	case CPU_LOADANDRESET:
275		if (newp != NULL) {
276			osimage = (char *)(*(u_long *)newp);
277
278			LoadAndReset(osimage);
279			/* not reach here */
280		}
281		return (0);
282
283	default:
284		return (EOPNOTSUPP);
285	}
286	/* NOTREACHED */
287}
288
289int waittime = -1;
290struct pcb dumppcb;
291
292void
293cpu_reboot(howto, bootstr)
294	int howto;
295	char *bootstr;
296{
297
298	if (cold) {
299		howto |= RB_HALT;
300		goto haltsys;
301	}
302
303	boothowto = howto;
304	if ((howto & RB_NOSYNC) == 0 && waittime < 0) {
305		waittime = 0;
306		vfs_shutdown();
307		/*
308		 * If we've been adjusting the clock, the todr
309		 * will be out of synch; adjust it now.
310		 */
311		/* resettodr(); */
312	}
313
314	/* Disable interrupts. */
315	splhigh();
316
317	/* Do a dump if requested. */
318	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
319		dumpsys();
320
321haltsys:
322	doshutdownhooks();
323
324	if (howto & RB_HALT) {
325		printf("\n");
326		printf("The operating system has halted.\n");
327		printf("Please press any key to reboot.\n\n");
328		cngetc();
329	}
330
331	printf("rebooting...\n");
332	cpu_reset();
333	for(;;)
334		;
335	/*NOTREACHED*/
336}
337
338/*
339 * These variables are needed by /sbin/savecore
340 */
341u_long	dumpmag = 0x8fca0101;	/* magic number */
342int 	dumpsize = 0;		/* pages */
343long	dumplo = 0; 		/* blocks */
344
345/*
346 * This is called by main to set dumplo and dumpsize.
347 * Dumps always skip the first CLBYTES of disk space
348 * in case there might be a disk label stored there.
349 * If there is extra space, put dump at the end to
350 * reduce the chance that swapping trashes it.
351 */
352void
353cpu_dumpconf()
354{
355#ifdef	TODO
356	int nblks;	/* size of dump area */
357	int maj;
358
359	if (dumpdev == NODEV)
360		return;
361	maj = major(dumpdev);
362	if (maj < 0 || maj >= nblkdev)
363		panic("dumpconf: bad dumpdev=0x%x", dumpdev);
364	if (bdevsw[maj].d_psize == NULL)
365		return;
366	nblks = (*bdevsw[maj].d_psize)(dumpdev);
367	if (nblks <= ctod(1))
368		return;
369
370	dumpsize = btoc(IOM_END + ctob(dumpmem_high));
371
372	/* Always skip the first CLBYTES, in case there is a label there. */
373	if (dumplo < ctod(1))
374		dumplo = ctod(1);
375
376	/* Put dump at end of partition, and make it fit. */
377	if (dumpsize > dtoc(nblks - dumplo))
378		dumpsize = dtoc(nblks - dumplo);
379	if (dumplo < nblks - ctod(dumpsize))
380		dumplo = nblks - ctod(dumpsize);
381#endif
382}
383
384/*
385 * Doadump comes here after turning off memory management and
386 * getting on the dump stack, either when called above, or by
387 * the auto-restart code.
388 */
389#define BYTES_PER_DUMP  NBPG	/* must be a multiple of pagesize XXX small */
390static vaddr_t dumpspace;
391
392vaddr_t
393reserve_dumppages(p)
394	vaddr_t p;
395{
396
397	dumpspace = p;
398	return (p + BYTES_PER_DUMP);
399}
400
401void
402dumpsys()
403{
404#ifdef	TODO
405	unsigned bytes, i, n;
406	int maddr, psize;
407	daddr_t blkno;
408	int (*dump) __P((dev_t, daddr_t, caddr_t, size_t));
409	int error;
410
411	/* Save registers. */
412	savectx(&dumppcb);
413
414	msgbufmapped = 0;	/* don't record dump msgs in msgbuf */
415	if (dumpdev == NODEV)
416		return;
417
418	/*
419	 * For dumps during autoconfiguration,
420	 * if dump device has already configured...
421	 */
422	if (dumpsize == 0)
423		cpu_dumpconf();
424	if (dumplo < 0)
425		return;
426	printf("\ndumping to dev %x, offset %ld\n", dumpdev, dumplo);
427
428	psize = (*bdevsw[major(dumpdev)].d_psize)(dumpdev);
429	printf("dump ");
430	if (psize == -1) {
431		printf("area unavailable\n");
432		return;
433	}
434
435#if 0	/* XXX this doesn't work.  grr. */
436        /* toss any characters present prior to dump */
437	while (sget() != NULL); /* syscons and pccons differ */
438#endif
439
440	bytes = ctob(dumpmem_high) + IOM_END;
441	maddr = 0;
442	blkno = dumplo;
443	dump = bdevsw[major(dumpdev)].d_dump;
444	error = 0;
445	for (i = 0; i < bytes; i += n) {
446		/*
447		 * Avoid dumping the ISA memory hole, and areas that
448		 * BIOS claims aren't in low memory.
449		 */
450		if (i >= ctob(dumpmem_low) && i < IOM_END) {
451			n = IOM_END - i;
452			maddr += n;
453			blkno += btodb(n);
454			continue;
455		}
456
457		/* Print out how many MBs we to go. */
458		n = bytes - i;
459		if (n && (n % (1024*1024)) == 0)
460			printf("%d ", n / (1024 * 1024));
461
462		/* Limit size for next transfer. */
463		if (n > BYTES_PER_DUMP)
464			n =  BYTES_PER_DUMP;
465
466		(void) pmap_map(dumpspace, maddr, maddr + n, VM_PROT_READ);
467		error = (*dump)(dumpdev, blkno, (caddr_t)dumpspace, n);
468		if (error)
469			break;
470		maddr += n;
471		blkno += btodb(n);			/* XXX? */
472
473#if 0	/* XXX this doesn't work.  grr. */
474		/* operator aborting dump? */
475		if (sget() != NULL) {
476			error = EINTR;
477			break;
478		}
479#endif
480	}
481
482	switch (error) {
483
484	case ENXIO:
485		printf("device bad\n");
486		break;
487
488	case EFAULT:
489		printf("device not ready\n");
490		break;
491
492	case EINVAL:
493		printf("area improper\n");
494		break;
495
496	case EIO:
497		printf("i/o error\n");
498		break;
499
500	case EINTR:
501		printf("aborted from console\n");
502		break;
503
504	case 0:
505		printf("succeeded\n");
506		break;
507
508	default:
509		printf("error %d\n", error);
510		break;
511	}
512	printf("\n\n");
513	delay(5000000);		/* 5 seconds */
514#endif	/* TODO */
515}
516
517/*
518 * Initialize segments and descriptor tables
519 */
520#define VBRINIT		((char *)IOM_RAM_BEGIN)
521#define Trap100Vec	(VBRINIT + 0x100)
522#define Trap600Vec	(VBRINIT + 0x600)
523#define TLBVECTOR	(VBRINIT + 0x400)
524#define VADDRSTART	VM_MIN_KERNEL_ADDRESS
525
526extern int nkpde;
527extern char MonTrap100[], MonTrap100_end[];
528extern char MonTrap600[], MonTrap600_end[];
529extern char _start[], etext[], edata[], end[];
530extern char tlbmisshandler_stub[], tlbmisshandler_stub_end[];
531
532void
533initSH3(pc)
534	void *pc;	/* XXX return address */
535{
536	paddr_t avail;
537	pd_entry_t *pagedir;
538	pt_entry_t *pagetab, pte;
539	u_int sp;
540	int x;
541	char *p;
542
543	avail = sh3_round_page(end);
544
545	/* XXX nkpde = kernel page dir area (IOM_RAM_SIZE*2 Mbyte (why?)) */
546	nkpde = IOM_RAM_SIZE >> (PDSHIFT - 1);
547
548	/*
549	 * clear .bss, .common area, page dir area,
550	 *	process0 stack, page table area
551	 */
552	p = (char *)avail + (1 + UPAGES) * NBPG + NBPG * (1 + nkpde); /* XXX */
553	memset(edata, 0, p - edata);
554
555#if defined(SH3) && defined(SH4)
556#error "don't define both SH3 and SH4"
557#elif defined(SH3)
558	sh_cpu_init(CPU_ARCH_SH3, CPU_PRODUCT_UNKNOWN);
559#elif defined(SH4)
560	sh_cpu_init(CPU_ARCH_SH4, CPU_PRODUCT_UNKNOWN);
561#else
562#error "define SH3 or SH4"
563#endif
564	/*
565	 * install trap handler
566	 */
567	memcpy(Trap100Vec, MonTrap100, MonTrap100_end - MonTrap100);
568	memcpy(Trap600Vec, MonTrap600, MonTrap600_end - MonTrap600);
569	__asm ("ldc %0, vbr" :: "r"(VBRINIT));
570
571/*
572 *                          edata  end
573 *	+-------------+------+-----+----------+-------------+------------+
574 *	| kernel text | data | bss | Page Dir | Proc0 Stack | Page Table |
575 *	+-------------+------+-----+----------+-------------+------------+
576 *                                     NBPG       USPACE    (1+nkpde)*NBPG
577 *                                                (= 4*NBPG)
578 *	Build initial page tables
579 */
580	pagedir = (void *)avail;
581	pagetab = (void *)(avail + SYSMAP);
582
583	/*
584	 * Construct a page table directory
585	 * In SH3 H/W does not support PTD,
586	 * these structures are used by S/W.
587	 */
588	pte = (pt_entry_t)pagetab;
589	pte |= PG_KW | PG_V | PG_4K | PG_M | PG_N;
590	pagedir[KERNTEXTOFF >> PDSHIFT] = pte;
591
592	/* make pde for 0xd0000000, 0xd0400000, 0xd0800000,0xd0c00000,
593		0xd1000000, 0xd1400000, 0xd1800000, 0xd1c00000 */
594	pte += NBPG;
595	for (x = 0; x < nkpde; x++) {
596		pagedir[(VADDRSTART >> PDSHIFT) + x] = pte;
597		pte += NBPG;
598	}
599
600	/* Install a PDE recursively mapping page directory as a page table! */
601	pte = (u_int)pagedir;
602	pte |= PG_V | PG_4K | PG_KW | PG_M | PG_N;
603	pagedir[PDSLOT_PTE] = pte;
604
605	/* set PageDirReg */
606	SH_MMU_TTB_WRITE((u_int32_t)pagedir);
607
608	/* Set TLB miss handler */
609	p = tlbmisshandler_stub;
610	x = tlbmisshandler_stub_end - p;
611	memcpy(TLBVECTOR, p, x);
612
613	/*
614	 * Activate MMU
615	 */
616	sh_mmu_start();
617
618	/*
619	 * Now here is virtual address
620	 */
621
622	/* Set proc0paddr */
623	proc0paddr = (void *)(avail + NBPG);
624
625	/* Set pcb->PageDirReg of proc0 */
626	proc0paddr->u_pcb.pageDirReg = (int)pagedir;
627
628	/* avail_start is first available physical memory address */
629	avail_start = avail + NBPG + USPACE + NBPG + NBPG * nkpde;
630
631	/* atdevbase is first available logical memory address */
632	atdevbase = VADDRSTART;
633
634	proc0.p_addr = proc0paddr; /* page dir address */
635
636	/* XXX: PMAP_NEW requires valid curpcb.   also init'd in cpu_startup */
637	curpcb = &proc0.p_addr->u_pcb;
638
639	/*
640	 * Initialize the I/O port and I/O mem extent maps.
641	 * Note: we don't have to check the return value since
642	 * creation of a fixed extent map will never fail (since
643	 * descriptor storage has already been allocated).
644	 *
645	 * N.B. The iomem extent manages _all_ physical addresses
646	 * on the machine.  When the amount of RAM is found, the two
647	 * extents of RAM are allocated from the map (0 -> ISA hole
648	 * and end of ISA hole -> end of RAM).
649	 */
650	iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF,
651	    (caddr_t)iomem_ex_storage, sizeof(iomem_ex_storage),
652	    EX_NOCOALESCE|EX_NOWAIT);
653
654#if 0
655	consinit();	/* XXX SHOULD NOT BE DONE HERE */
656#endif
657
658	splraise(-1);
659	_cpu_exception_resume(0);
660
661	avail_end = sh3_trunc_page(IOM_RAM_END + 1);
662
663	printf("initSH3\r\n");
664
665	/*
666	 * Calculate check sum
667	 */
668    {
669	u_short *p, sum;
670	int size;
671
672	size = etext - _start;
673	p = (u_short *)_start;
674	sum = 0;
675	size >>= 1;
676	while (size--)
677		sum += *p++;
678	printf("Check Sum = 0x%x\r\n", sum);
679    }
680	/*
681	 * Allocate the physical addresses used by RAM from the iomem
682	 * extent map.  This is done before the addresses are
683	 * page rounded just to make sure we get them all.
684	 */
685	if (extent_alloc_region(iomem_ex, IOM_RAM_BEGIN,
686				(IOM_RAM_END-IOM_RAM_BEGIN) + 1,
687				EX_NOWAIT)) {
688		/* XXX What should we do? */
689		printf("WARNING: CAN'T ALLOCATE RAM MEMORY FROM IOMEM EXTENT MAP!\n");
690	}
691
692	/* number of pages of physmem addr space */
693	physmem = btoc(IOM_RAM_END - IOM_RAM_BEGIN +1);
694#ifdef	TODO
695	dumpmem = physmem;
696#endif
697
698	/*
699	 * Initialize for pmap_free_pages and pmap_next_page.
700	 * These guys should be page-aligned.
701	 */
702	if (physmem < btoc(2 * 1024 * 1024)) {
703		printf("warning: too little memory available; "
704		       "have %d bytes, want %d bytes\n"
705		       "running in degraded mode\n"
706		       "press a key to confirm\n\n",
707		       ctob(physmem), 2*1024*1024);
708		cngetc();
709	}
710
711	/* Call pmap initialization to make new kernel address space */
712	pmap_bootstrap(atdevbase);
713
714	/*
715	 * Initialize error message buffer (at end of core).
716	 */
717	initmsgbuf((caddr_t)msgbuf_paddr, round_page(MSGBUFSIZE));
718
719	/*
720	 * set boot device information
721	 */
722	setup_bootinfo();
723
724#if 0
725	sh3_cache_on();
726#endif
727
728	/* setup proc0 stack */
729	sp = avail + NBPG + USPACE - 16 - sizeof(struct trapframe);
730
731	/*
732	 * XXX We can't return here, because we change stack pointer.
733	 *     So jump to return address directly.
734	 */
735	__asm __volatile ("jmp @%0; mov %1, r15" :: "r"(pc), "r"(sp));
736}
737
738void
739setup_bootinfo(void)
740{
741	struct btinfo_bootdisk *help;
742
743	*(int *)bootinfo = 1;
744	help = (struct btinfo_bootdisk *)(bootinfo + sizeof(int));
745	help->biosdev = 0;
746	help->partition = 0;
747	((struct btinfo_common *)help)->len = sizeof(struct btinfo_bootdisk);
748	((struct btinfo_common *)help)->type = BTINFO_BOOTDISK;
749}
750
751void *
752lookup_bootinfo(type)
753	int type;
754{
755	struct btinfo_common *help;
756	int n = *(int*)bootinfo;
757	help = (struct btinfo_common *)(bootinfo + sizeof(int));
758	while (n--) {
759		if (help->type == type)
760			return (help);
761		help = (struct btinfo_common *)((char*)help + help->len);
762	}
763	return (0);
764}
765
766
767/*
768 * consinit:
769 * initialize the system console.
770 * XXX - shouldn't deal with this initted thing, but then,
771 * it shouldn't be called from init386 either.
772 */
773void
774consinit()
775{
776	static int initted;
777
778	if (initted)
779		return;
780	initted = 1;
781
782	cninit();
783
784#ifdef DDB
785	ddb_init();
786#endif
787}
788
789void
790cpu_reset()
791{
792
793	_cpu_exception_suspend();
794
795	Sh3Reset();
796	for (;;)
797		;
798}
799
800int
801bus_space_map (t, addr, size, flags, bshp)
802	bus_space_tag_t t;
803	bus_addr_t addr;
804	bus_size_t size;
805	int flags;
806	bus_space_handle_t *bshp;
807{
808
809	*bshp = (bus_space_handle_t)addr;
810
811	return 0;
812}
813
814int
815sh_memio_subregion(t, bsh, offset, size, nbshp)
816	bus_space_tag_t t;
817	bus_space_handle_t bsh;
818	bus_size_t offset, size;
819	bus_space_handle_t *nbshp;
820{
821
822	*nbshp = bsh + offset;
823	return (0);
824}
825
826int
827sh_memio_alloc(t, rstart, rend, size, alignment, boundary, flags,
828	       bpap, bshp)
829	bus_space_tag_t t;
830	bus_addr_t rstart, rend;
831	bus_size_t size, alignment, boundary;
832	int flags;
833	bus_addr_t *bpap;
834	bus_space_handle_t *bshp;
835{
836	*bshp = *bpap = rstart;
837
838	return (0);
839}
840
841void
842sh_memio_free(t, bsh, size)
843	bus_space_tag_t t;
844	bus_space_handle_t bsh;
845	bus_size_t size;
846{
847
848}
849
850void
851sh_memio_unmap(t, bsh, size)
852	bus_space_tag_t t;
853	bus_space_handle_t bsh;
854	bus_size_t size;
855{
856	return;
857}
858
859#ifdef SH4_PCMCIA
860
861int
862shpcmcia_memio_map(t, bpa, size, flags, bshp)
863	bus_space_tag_t t;
864	bus_addr_t bpa;
865	bus_size_t size;
866	int flags;
867	bus_space_handle_t *bshp;
868{
869	int error;
870	struct extent *ex;
871	bus_space_tag_t pt = t & ~SH3_BUS_SPACE_PCMCIA_8BIT;
872
873	if (pt != SH3_BUS_SPACE_PCMCIA_IO &&
874	    pt != SH3_BUS_SPACE_PCMCIA_MEM &&
875	    pt != SH3_BUS_SPACE_PCMCIA_ATT) {
876		*bshp = (bus_space_handle_t)bpa;
877
878		return 0;
879	}
880
881	ex = iomem_ex;
882
883#if 0
884	/*
885	 * Before we go any further, let's make sure that this
886	 * region is available.
887	 */
888	error = extent_alloc_region(ex, bpa, size,
889				    EX_NOWAIT | EX_MALLOCOK );
890	if (error){
891		printf("sh3_pcmcia_memio_map:extent_alloc_region error\n");
892		return (error);
893	}
894#endif
895
896	/*
897	 * For memory space, map the bus physical address to
898	 * a kernel virtual address.
899	 */
900	error = shpcmcia_mem_add_mapping(bpa, size, (int)t, bshp );
901#if 0
902	if (error) {
903		if (extent_free(ex, bpa, size, EX_NOWAIT | EX_MALLOCOK )) {
904			printf("sh3_pcmcia_memio_map: pa 0x%lx, size 0x%lx\n",
905			       bpa, size);
906			printf("sh3_pcmcia_memio_map: can't free region\n");
907		}
908	}
909#endif
910
911	return (error);
912}
913
914int
915shpcmcia_mem_add_mapping(bpa, size, type, bshp)
916	bus_addr_t bpa;
917	bus_size_t size;
918	int type;
919	bus_space_handle_t *bshp;
920{
921	u_long pa, endpa;
922	vaddr_t va;
923	pt_entry_t *pte;
924	unsigned int m = 0;
925	int io_type = type & ~SH3_BUS_SPACE_PCMCIA_8BIT;
926
927	pa = sh3_trunc_page(bpa);
928	endpa = sh3_round_page(bpa + size);
929
930#ifdef DIAGNOSTIC
931	if (endpa <= pa)
932		panic("sh3_pcmcia_mem_add_mapping: overflow");
933#endif
934
935	va = uvm_km_valloc(kernel_map, endpa - pa);
936	if (va == 0){
937		printf("shpcmcia_add_mapping: nomem \n");
938		return (ENOMEM);
939	}
940
941	*bshp = (bus_space_handle_t)(va + (bpa & PGOFSET));
942
943#define MODE(t, s)							\
944	(t) & SH3_BUS_SPACE_PCMCIA_8BIT ?				\
945		_PG_PCMCIA_ ## s ## 8 :					\
946		_PG_PCMCIA_ ## s ## 16
947	switch (io_type) {
948	default:
949		panic("unknown pcmcia space.");
950		/* NOTREACHED */
951	case SH3_BUS_SPACE_PCMCIA_IO:
952		m = MODE(type, IO);
953		break;
954	case SH3_BUS_SPACE_PCMCIA_MEM:
955		m = MODE(type, MEM);
956		break;
957	case SH3_BUS_SPACE_PCMCIA_ATT:
958		m = MODE(type, ATTR);
959		break;
960	}
961#undef MODE
962
963	for (; pa < endpa; pa += NBPG, va += NBPG) {
964		pmap_enter(pmap_kernel(), va, pa,
965		    VM_PROT_READ | VM_PROT_WRITE, PMAP_WIRED);
966
967		pte = kvtopte(va);
968		*pte &= ~PG_N;
969		*pte |= m;
970		pmap_update_pg(va);
971	}
972	pmap_update(pmap_kernel());
973
974	return 0;
975}
976
977void
978shpcmcia_memio_unmap(t, bsh, size)
979	bus_space_tag_t t;
980	bus_space_handle_t bsh;
981	bus_size_t size;
982{
983	struct extent *ex;
984	u_long va, endva;
985	bus_addr_t bpa;
986	bus_space_tag_t pt = t & ~SH3_BUS_SPACE_PCMCIA_8BIT;
987
988	if (pt != SH3_BUS_SPACE_PCMCIA_IO &&
989	    pt != SH3_BUS_SPACE_PCMCIA_MEM &&
990	    pt != SH3_BUS_SPACE_PCMCIA_ATT) {
991		return ;
992	}
993
994	ex = iomem_ex;
995
996	va = sh3_trunc_page(bsh);
997	endva = sh3_round_page(bsh + size);
998
999#ifdef DIAGNOSTIC
1000	if (endva <= va)
1001		panic("sh3_pcmcia_memio_unmap: overflow");
1002#endif
1003
1004	pmap_extract(pmap_kernel(), va, &bpa);
1005	bpa += bsh & PGOFSET;
1006
1007	/*
1008	 * Free the kernel virtual mapping.
1009	 */
1010	uvm_km_free(kernel_map, va, endva - va);
1011
1012#if 0
1013	if (extent_free(ex, bpa, size,
1014			EX_NOWAIT | EX_MALLOCOK)) {
1015		printf("sh3_pcmcia_memio_unmap: %s 0x%lx, size 0x%lx\n",
1016		       "pa", bpa, size);
1017		printf("sh3_pcmcia_memio_unmap: can't free region\n");
1018	}
1019#endif
1020}
1021
1022void
1023shpcmcia_memio_free(t, bsh, size)
1024	bus_space_tag_t t;
1025	bus_space_handle_t bsh;
1026	bus_size_t size;
1027{
1028
1029	/* sh3_pcmcia_memio_unmap() does all that we need to do. */
1030	shpcmcia_memio_unmap(t, bsh, size);
1031}
1032
1033int
1034shpcmcia_memio_subregion(t, bsh, offset, size, nbshp)
1035	bus_space_tag_t t;
1036	bus_space_handle_t bsh;
1037	bus_size_t offset, size;
1038	bus_space_handle_t *nbshp;
1039{
1040
1041	*nbshp = bsh + offset;
1042	return (0);
1043}
1044
1045#endif /* SH4_PCMCIA */
1046
1047#if !defined(DONT_INIT_BSC)
1048/*
1049 * InitializeBsc
1050 * : BSC(Bus State Controler)
1051 */
1052void InitializeBsc __P((void));
1053
1054void
1055InitializeBsc()
1056{
1057
1058	/*
1059	 * Drive RAS,CAS in stand by mode and bus release mode
1060	 * Area0 = Normal memory, Area5,6=Normal(no burst)
1061	 * Area2 = Normal memory, Area3 = SDRAM, Area5 = Normal memory
1062	 * Area4 = Normal Memory
1063	 * Area6 = Normal memory
1064	 */
1065	SHREG_BCR1 = BSC_BCR1_VAL;
1066
1067	/*
1068	 * Bus Width
1069	 * Area4: Bus width = 16bit
1070	 * Area6,5 = 16bit
1071	 * Area1 = 8bit
1072	 * Area2,3: Bus width = 32bit
1073	 */
1074	SHREG_BCR2 = BSC_BCR2_VAL;
1075
1076	/*
1077	 * Idle cycle number in transition area and read to write
1078	 * Area6 = 3, Area5 = 3, Area4 = 3, Area3 = 3, Area2 = 3
1079	 * Area1 = 3, Area0 = 3
1080	 */
1081	SHREG_WCR1 = BSC_WCR1_VAL;
1082
1083	/*
1084	 * Wait cycle
1085	 * Area 6 = 6
1086	 * Area 5 = 2
1087	 * Area 4 = 10
1088	 * Area 3 = 3
1089	 * Area 2,1 = 3
1090	 * Area 0 = 6
1091	 */
1092	SHREG_WCR2 = BSC_WCR2_VAL;
1093
1094#if defined(SH4) && defined(BSC_WCR3_VAL)
1095	SHREG_WCR3 = BSC_WCR3_VAL;
1096#endif
1097
1098	/*
1099	 * RAS pre-charge = 2cycle, RAS-CAS delay = 3 cycle,
1100	 * write pre-charge=1cycle
1101	 * CAS before RAS refresh RAS assert time = 3 cycle
1102	 * Disable burst, Bus size=32bit, Column Address=10bit, Refresh ON
1103	 * CAS before RAS refresh ON, EDO DRAM
1104	 */
1105	SHREG_MCR = BSC_MCR_VAL;
1106
1107#if defined(BSC_SDMR2_VAL)
1108#define SDMR2	(*(volatile unsigned char  *)BSC_SDMR2_VAL)
1109
1110	SDMR2 = 0;
1111#endif
1112
1113#if defined(BSC_SDMR3_VAL)
1114#if !(defined(COMPUTEXEVB) && defined(SH7709A))
1115#define SDMR3	(*(volatile unsigned char  *)BSC_SDMR3_VAL)
1116
1117	SDMR3 = 0;
1118#else
1119#define ADDSET	(*(volatile unsigned short *)0x1A000000)
1120#define ADDRST	(*(volatile unsigned short *)0x18000000)
1121#define SDMR3	(*(volatile unsigned char  *)BSC_SDMR3_VAL)
1122
1123	ADDSET = 0;
1124	SDMR3 = 0;
1125	ADDRST = 0;
1126#endif
1127#endif
1128
1129	/*
1130	 * PCMCIA Control Register
1131	 * OE/WE assert delay 3.5 cycle
1132	 * OE/WE negate-address delay 3.5 cycle
1133	 */
1134#ifdef BSC_PCR_VAL
1135	SHREG_PCR = BSC_PCR_VAL;
1136#endif
1137
1138	/*
1139	 * Refresh Timer Control/Status Register
1140	 * Disable interrupt by CMF, closk 1/16, Disable OVF interrupt
1141	 * Count Limit = 1024
1142	 * In following statement, the reason why high byte = 0xa5(a4 in RFCR)
1143	 * is the rule of SH3 in writing these register.
1144	 */
1145	SHREG_RTCSR = BSC_RTCSR_VAL;
1146
1147
1148	/*
1149	 * Refresh Timer Counter
1150	 * Initialize to 0
1151	 */
1152#ifdef BSC_RTCNT_VAL
1153	SHREG_RTCNT = BSC_RTCNT_VAL;
1154#endif
1155
1156	/* set Refresh Time Constant Register */
1157	SHREG_RTCOR = BSC_RTCOR_VAL;
1158
1159	/* init Refresh Count Register */
1160#ifdef BSC_RFCR_VAL
1161	SHREG_RFCR = BSC_RFCR_VAL;
1162#endif
1163
1164	/* Set Clock mode (make internal clock double speed) */
1165
1166	SHREG_FRQCR = FRQCR_VAL;
1167
1168#ifndef MMEYE_NO_CACHE
1169	/* Cache ON */
1170	SHREG_CCR = CCR_CE;
1171#endif
1172}
1173#endif
1174
1175void
1176sh3_cache_on(void)
1177{
1178#ifndef MMEYE_NO_CACHE
1179	/* Cache ON */
1180	SHREG_CCR = CCR_CE;
1181	SHREG_CCR = CCR_CF | CCR_CE;	/* cache clear */
1182	SHREG_CCR = CCR_CE;		/* cache on */
1183#endif
1184}
1185
1186#ifdef SH4
1187void
1188sh4_cache_flush(addr)
1189	vaddr_t addr;
1190{
1191#if 1
1192#define SH_ADDR_ARRAY_BASE_ADDR 0xf4000000
1193#define WRITE_ADDR_ARRAY( entry ) \
1194	(*(volatile u_int32_t *)(SH_ADDR_ARRAY_BASE_ADDR|(entry)|0x00))
1195
1196	int entry;
1197
1198	entry = ((u_int32_t)addr) & 0x3fe0;
1199
1200	WRITE_ADDR_ARRAY(entry) = 0;
1201#else
1202	volatile int *p = (int *)IOM_RAM_BEGIN;
1203	int i;
1204	/* volatile */int d;
1205
1206	for(i = 0; i < 512; i++){
1207		d = *p;
1208		p += 8;
1209	}
1210#endif
1211}
1212#endif
1213
1214 /* XXX This value depends on physical available memory */
1215#define OSIMAGE_BUF_ADDR	(IOM_RAM_BEGIN + 0x00400000)
1216
1217void
1218LoadAndReset(osimage)
1219	char *osimage;
1220{
1221	void *buf_addr;
1222	u_long size;
1223	u_long *src;
1224	u_long *dest;
1225	u_long csum = 0;
1226	u_long csum2 = 0;
1227	u_long size2;
1228
1229	printf("LoadAndReset: copy start\n");
1230	buf_addr = (void *)OSIMAGE_BUF_ADDR;
1231
1232	size = *(u_long *)osimage;
1233	src = (u_long *)osimage;
1234	dest = buf_addr;
1235
1236	size = (size + sizeof(u_long) * 2 + 3) >> 2;
1237	size2 = size;
1238
1239	while (size--) {
1240		csum += *src;
1241		*dest++ = *src++;
1242	}
1243
1244	dest = buf_addr;
1245	while (size2--)
1246		csum2 += *dest++;
1247
1248	printf("LoadAndReset: copy end[%lx,%lx]\n", csum, csum2);
1249	printf("start XLoadAndReset\n");
1250
1251	/* mask all externel interrupt (XXX) */
1252
1253	XLoadAndReset(buf_addr);
1254}
1255