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tx39ir.c revision 1.1.6.2 
      1 /*	$NetBSD: tx39ir.c,v 1.1.6.2 2000/11/20 20:47:24 bouyer Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2000, by UCHIYAMA Yasushi
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. The name of the developer may NOT be used to endorse or promote products
     13  *    derived from this software without specific prior written permission.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  *
     27  */
     28 
     29 /*
     30  * TX39 IR module (connected to UARTB)
     31  */
     32 #undef TX39IRDEBUG
     33 #include "opt_tx39_debug.h"
     34 
     35 #include <sys/param.h>
     36 #include <sys/systm.h>
     37 #include <sys/device.h>
     38 
     39 #include <machine/bus.h>
     40 #include <machine/intr.h>
     41 
     42 #include <hpcmips/tx/tx39var.h>
     43 #include <hpcmips/tx/tx39icureg.h>
     44 #include <hpcmips/tx/tx39irvar.h>
     45 #include <hpcmips/tx/tx39irreg.h>
     46 
     47 #include <hpcmips/tx/tx39clockreg.h> /* XXX */
     48 
     49 #ifdef TX39IRDEBUG
     50 int	tx39ir_debug = 1;
     51 #define	DPRINTF(arg) if (vrpiu_debug) printf arg;
     52 #else
     53 #define	DPRINTF(arg)
     54 #endif
     55 
     56 int	tx39ir_match	__P((struct device*, struct cfdata*, void*));
     57 void	tx39ir_attach	__P((struct device*, struct device*, void*));
     58 
     59 struct tx39ir_softc {
     60 	struct	device sc_dev;
     61 	struct	device *sc_parent;
     62 	tx_chipset_tag_t sc_tc;
     63 };
     64 
     65 void	tx39ir_dump	__P((struct tx39ir_softc*));
     66 int	tx39ir_intr	__P((void*));
     67 
     68 struct cfattach tx39ir_ca = {
     69 	sizeof(struct tx39ir_softc), tx39ir_match, tx39ir_attach
     70 };
     71 
     72 int
     73 tx39ir_match(parent, cf, aux)
     74 	struct device *parent;
     75 	struct cfdata *cf;
     76 	void *aux;
     77 {
     78 	return 1;
     79 }
     80 
     81 void
     82 tx39ir_attach(parent, self, aux)
     83 	struct device *parent;
     84 	struct device *self;
     85 	void *aux;
     86 {
     87 	struct txcom_attach_args *tca = aux;
     88 	struct tx39ir_softc *sc = (void*)self;
     89 	tx_chipset_tag_t tc;
     90 	txreg_t reg;
     91 
     92 	sc->sc_tc = tc = tca->tca_tc;
     93 	sc->sc_parent = tca->tca_parent;
     94 
     95 	printf("\n");
     96 
     97 	/* setup IR module */
     98 	reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
     99 	reg |= TX39_IRCTRL1_RXPWR;
    100 	tx_conf_write(tc, TX39_IRCTRL1_REG, reg);
    101 
    102 	/* power up IR module */
    103 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
    104 	reg |= TX39_CLOCK_ENIRCLK | TX39_CLOCK_ENUARTBCLK;
    105 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
    106 
    107 	/* turn to pulse mode UARTB */
    108 	txcom_pulse_mode(sc->sc_parent);
    109 
    110 #if not_required_yet
    111 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_CARSTINT),
    112 			  IST_EDGE, IPL_TTY, tx39ir_intr, sc);
    113 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSCARINT),
    114 			  IST_EDGE, IPL_TTY, tx39ir_intr, sc);
    115 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGCARINT),
    116 			  IST_EDGE, IPL_TTY, tx39ir_intr, sc);
    117 #endif
    118 
    119 #ifdef TX39IRDEBUG
    120 	tx39ir_dump(sc);
    121 #endif
    122 }
    123 
    124 #define ISSETPRINT(r, m) __is_set_print((u_int32_t)(r), \
    125 	TX39_IRCTRL1_##m, #m)
    126 
    127 void
    128 tx39ir_dump(sc)
    129 	struct tx39ir_softc *sc;
    130 {
    131 	tx_chipset_tag_t tc = sc->sc_tc;
    132 	txreg_t reg;
    133 
    134 	reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
    135 	ISSETPRINT(reg, CARDET);
    136 	ISSETPRINT(reg, TESTIR);
    137 	ISSETPRINT(reg, DTINVERT);
    138 	ISSETPRINT(reg, RXPWR);
    139 	ISSETPRINT(reg, ENSTATE);
    140 	ISSETPRINT(reg, ENCOMSM);
    141 	printf("baudval %d\n", TX39_IRCTRL1_BAUDVAL(reg));
    142 }
    143 
    144 int
    145 tx39ir_intr(arg)
    146 	void *arg;
    147 {
    148 	return 0;
    149 }
    150