intr.h revision 1.1
1/*	$NetBSD: intr.h,v 1.1 2003/10/19 03:33:50 matt Exp $	*/
2
3/*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *        This product includes software developed by the NetBSD
21 *        Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 *    contributors may be used to endorse or promote products derived
24 *    from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39#ifndef _IBMNWS_INTR_H_
40#define _IBMNWS_INTR_H_
41
42/* Interrupt priority `levels'. */
43#define	IPL_NONE	9	/* nothing */
44#define	IPL_SOFTCLOCK	8	/* software clock interrupt */
45#define	IPL_SOFTNET	7	/* software network interrupt */
46#define	IPL_BIO		6	/* block I/O */
47#define	IPL_NET		5	/* network */
48#define	IPL_SOFTSERIAL	4	/* software serial interrupt */
49#define	IPL_TTY		3	/* terminal */
50#define	IPL_IMP		3	/* memory allocation */
51#define	IPL_AUDIO	2	/* audio */
52#define	IPL_CLOCK	1	/* clock */
53#define	IPL_HIGH	1	/* everything */
54#define	IPL_SERIAL	0	/* serial */
55#define	NIPL		10
56
57/* Interrupt sharing types. */
58#define	IST_NONE	0	/* none */
59#define	IST_PULSE	1	/* pulsed */
60#define	IST_EDGE	2	/* edge-triggered */
61#define	IST_LEVEL	3	/* level-triggered */
62
63#ifndef _LOCORE
64
65/*
66 * Interrupt handler chains.  intr_establish() inserts a handler into
67 * the list.  The handler is called with its (single) argument.
68 */
69struct intrhand {
70	int	(*ih_fun)(void *);
71	void	*ih_arg;
72	u_long	ih_count;
73	struct	intrhand *ih_next;
74	int	ih_level;
75	int	ih_irq;
76};
77
78void do_pending_int(void);
79
80void init_intr(void);
81void init_intr_ivr(void);
82
83void enable_intr(void);
84void disable_intr(void);
85
86void *intr_establish(int, int, int, int (*)(void *), void *);
87void intr_disestablish(void *);
88
89void softnet(int);
90void softserial(void);
91int isa_intr(void);
92void isa_intr_mask(int);
93void isa_intr_clr(int);
94void isa_setirqstat(int, int, int);
95
96static __inline int splraise(int);
97static __inline void spllower(int);
98static __inline void set_sint(int);
99
100extern volatile int cpl, ipending, astpending, tickspending;
101extern int imen;
102extern int imask[];
103extern long intrcnt[];
104extern unsigned intrcnt2[];
105extern struct intrhand *intrhand[];
106extern int intrtype[];
107extern vaddr_t prep_intr_reg;
108
109/*
110 *  Reorder protection in the following inline functions is
111 * achieved with the "eieio" instruction which the assembler
112 * seems to detect and then doesn't move instructions past....
113 */
114static __inline int
115splraise(int newcpl)
116{
117	int oldcpl;
118
119	__asm__ volatile("sync; eieio\n");	/* don't reorder.... */
120	oldcpl = cpl;
121	cpl = oldcpl | newcpl;
122	__asm__ volatile("sync; eieio\n");	/* reorder protect */
123	return(oldcpl);
124}
125
126static __inline void
127spllower(int newcpl)
128{
129
130	__asm__ volatile("sync; eieio\n");	/* reorder protect */
131	cpl = newcpl;
132	if(ipending & ~newcpl)
133		do_pending_int();
134	__asm__ volatile("sync; eieio\n");	/* reorder protect */
135}
136
137/* Following code should be implemented with lwarx/stwcx to avoid
138 * the disable/enable. i need to read the manual once more.... */
139static __inline void
140set_sint(int pending)
141{
142	int	msrsave;
143
144	__asm__ ("mfmsr %0" : "=r"(msrsave));
145	__asm__ volatile ("mtmsr %0" :: "r"(msrsave & ~PSL_EE));
146	ipending |= pending;
147	__asm__ volatile ("mtmsr %0" :: "r"(msrsave));
148}
149
150#define	ICU_LEN			32
151#define	IRQ_SLAVE		2
152#define	LEGAL_IRQ(x)		((x) >= 0 && (x) < ICU_LEN && (x) != IRQ_SLAVE)
153#define	I8259_INTR_NUM		16
154
155#define	PREP_INTR_REG	0xbffff000
156#define	INTR_VECTOR_REG	0xff0
157
158#define	SINT_CLOCK	0x20000000
159#define	SINT_NET	0x40000000
160#define	SINT_SERIAL	0x80000000
161#define	SPL_CLOCK	0x00000001
162#define	SINT_MASK	(SINT_CLOCK|SINT_NET|SINT_SERIAL)
163
164#define	CNT_SINT_NET	29
165#define	CNT_SINT_CLOCK	30
166#define	CNT_SINT_SERIAL	31
167#define	CNT_CLOCK	0
168
169#define splbio()	splraise(imask[IPL_BIO])
170#define splnet()	splraise(imask[IPL_NET])
171#define spltty()	splraise(imask[IPL_TTY])
172#define splclock()	splraise(imask[IPL_CLOCK])
173#define splvm()		splraise(imask[IPL_IMP])
174#define splaudio()	splraise(imask[IPL_AUDIO])
175#define	splserial()	splraise(imask[IPL_SERIAL])
176#define splstatclock()	splclock()
177#define	spllowersoftclock() spllower(imask[IPL_SOFTCLOCK])
178#define	splsoftclock()	splraise(imask[IPL_SOFTCLOCK])
179#define	splsoftnet()	splraise(imask[IPL_SOFTNET])
180#define	splsoftserial()	splraise(imask[IPL_SOFTSERIAL])
181
182#define spllpt()	spltty()
183
184#define	setsoftclock()	set_sint(SINT_CLOCK);
185#define	setsoftnet()	set_sint(SINT_NET);
186#define	setsoftserial()	set_sint(SINT_SERIAL);
187
188#define	splhigh()	splraise(imask[IPL_HIGH])
189#define	splsched()	splhigh()
190#define	spllock()	splhigh()
191#define	splx(x)		spllower(x)
192#define	spl0()		spllower(0)
193
194#define	CLKF_BASEPRI(pri)	((pri) != 0)
195
196#endif /* !_LOCORE */
197
198#endif /* !_IBMNWS_INTR_H_ */
199