sbicvar.h revision 1.1
1/* $NetBSD: sbicvar.h,v 1.1 1996/04/18 18:30:50 chuck Exp $ */ 2/* 3 * Copyright (c) 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * Van Jacobson of Lawrence Berkeley Laboratory. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)scsivar.h 7.1 (Berkeley) 5/8/90 38 */ 39#ifndef _SBICVAR_H_ 40#define _SBICVAR_H_ 41#include <sys/malloc.h> 42 43 44/* 45 * DMA chains are used for Scatter-Gather DMA. 46 */ 47struct dma_chain { 48 int dc_count; 49 char *dc_addr; 50}; 51 52/* 53 * ACB. Holds additional information for each SCSI command Comments: We 54 * need a separate scsi command block because we may need to overwrite it 55 * with a request sense command. Basicly, we refrain from fiddling with 56 * the scsi_xfer struct (except do the expected updating of return values). 57 * We'll generally update: xs->{flags,resid,error,sense,status} and 58 * occasionally xs->retries. 59 */ 60struct sbic_acb { 61 TAILQ_ENTRY(sbic_acb) chain; 62 struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ 63 int flags; /* Status */ 64#define ACB_FREE 0x00 65#define ACB_ACTIVE 0x01 66#define ACB_DONE 0x04 67#define ACB_CHKSENSE 0x08 68#define ACB_BBUF 0x10 /* DMA input needs to be copied from bounce */ 69#define ACB_DATAIN 0x20 /* DMA direction flag */ 70 71 struct scsi_generic cmd; /* SCSI command block */ 72 int clen; 73 struct dma_chain sc_kv; /* Virtual address of whole DMA */ 74 struct dma_chain sc_pa; /* Physical address of DMA segment */ 75 u_long sc_tcnt; /* number of bytes for this DMA */ 76 u_short sc_dmacmd; /* Internal data for this DMA */ 77 char *pa_addr; /* XXXX initial phys addr */ 78}; 79 80/* 81 * Some info about each (possible) target on the SCSI bus. This should 82 * probably have been a "per target+lunit" structure, but we'll leave it at 83 * this for now. Is there a way to reliably hook it up to sc->fordriver?? 84 */ 85struct sbic_tinfo { 86 int cmds; /* #commands processed */ 87 int dconns; /* #disconnects */ 88 int senses; /* #request sense commands sent */ 89 int lubusy; /* What local units/subr. are busy? */ 90} tinfo_t; 91 92struct sbic_softc { 93 struct device sc_dev; 94 struct isr sc_isr; /* Delete this... */ 95 struct target_sync { 96 u_char state; 97 u_char period; 98 u_char offset; 99 } sc_sync[8]; 100 u_char target; /* Currently active target */ 101 u_char lun; 102 struct scsi_link sc_link; /* proto for sub devices */ 103 sbic_regmap_p sc_sbicp; /* the SBIC */ 104 volatile void *sc_cregs; /* driver specific regs */ 105 int sc_ipl; 106 107 /* Lists of command blocks */ 108 TAILQ_HEAD(acb_list, sbic_acb) free_list, 109 ready_list, 110 nexus_list; 111 112 struct sbic_acb *sc_nexus; /* current command */ 113 struct sbic_acb sc_acb[8]; /* the real command blocks */ 114 struct sbic_tinfo sc_tinfo[8]; 115 116 struct scsi_xfer *sc_xs; /* transfer from high level code */ 117 u_char sc_flags; 118 u_char sc_stat[2]; 119 u_char sc_msg[7]; 120 u_long sc_clkfreq; 121 u_long sc_tcnt; /* number of bytes transfered */ 122 u_short sc_dmacmd; /* used by dma drivers */ 123 u_long sc_dmamask; /* dma valid mem mask */ 124#ifdef DEBUG 125 u_short sc_dmatimo; /* dma timeout */ 126#endif 127 struct dma_chain *sc_cur; 128 struct dma_chain *sc_last; 129 int (*sc_dmago) __P((struct sbic_softc *, char *, int, int)); 130 int (*sc_dmanext) __P((struct sbic_softc *)); 131 void (*sc_enintr) __P((struct sbic_softc *)); 132 void (*sc_dmastop) __P((struct sbic_softc *)); 133}; 134 135/* 136 * sc_flags 137 */ 138#define SBICF_ALIVE 0x01 /* controller initialized */ 139#define SBICF_DCFLUSH 0x02 /* need flush for overlap after dma finishes */ 140#define SBICF_SELECTED 0x04 /* bus is in selected state. */ 141#define SBICF_ICMD 0x08 /* Immediate command in execution */ 142#define SBICF_BADDMA 0x10 /* controller can only DMA to ztwobus space */ 143#define SBICF_INTR 0x40 /* SBICF interrupt expected */ 144#define SBICF_INDMA 0x80 /* not used yet, DMA I/O in progress */ 145 146/* 147 * sync states 148 */ 149#define SYNC_START 0 /* no sync handshake started */ 150#define SYNC_SENT 1 /* we sent sync request, no answer yet */ 151#define SYNC_DONE 2 /* target accepted our (or inferior) settings, 152 or it rejected the request and we stay async */ 153 154#define PHASE 0x07 /* mask for psns/pctl phase */ 155#define DATA_OUT_PHASE 0x00 156#define DATA_IN_PHASE 0x01 157#define CMD_PHASE 0x02 158#define STATUS_PHASE 0x03 159#define BUS_FREE_PHASE 0x04 160#define ARB_SEL_PHASE 0x05 /* Fuji chip combines arbitration with sel. */ 161#define MESG_OUT_PHASE 0x06 162#define MESG_IN_PHASE 0x07 163 164#define MSG_CMD_COMPLETE 0x00 165#define MSG_EXT_MESSAGE 0x01 166#define MSG_SAVE_DATA_PTR 0x02 167#define MSG_RESTORE_PTR 0x03 168#define MSG_DISCONNECT 0x04 169#define MSG_INIT_DETECT_ERROR 0x05 170#define MSG_ABORT 0x06 171#define MSG_REJECT 0x07 172#define MSG_NOOP 0x08 173#define MSG_PARITY_ERROR 0x09 174#define MSG_BUS_DEVICE_RESET 0x0C 175#define MSG_IDENTIFY 0x80 176#define MSG_IDENTIFY_DR 0xc0 /* (disconnect/reconnect allowed) */ 177#define MSG_SYNC_REQ 0x01 178 179#define MSG_ISIDENTIFY(x) ((x) & MSG_IDENTIFY) 180 181 182#define STS_CHECKCOND 0x02 /* Check Condition (ie., read sense) */ 183#define STS_CONDMET 0x04 /* Condition Met (ie., search worked) */ 184#define STS_BUSY 0x08 185#define STS_INTERMED 0x10 /* Intermediate status sent */ 186#define STS_EXT 0x80 /* Extended status valid */ 187 188 189/* 190 * States returned by our state machine 191 */ 192 193#define SBIC_STATE_ERROR -1 194#define SBIC_STATE_DONE 0 195#define SBIC_STATE_RUNNING 1 196#define SBIC_STATE_DISCONNECT 2 197 198 199struct buf; 200struct scsi_xfer; 201 202void sbic_minphys __P((struct buf *bp)); 203int sbic_scsicmd __P((struct scsi_xfer *)); 204 205#endif /* _SBICVAR_H_ */ 206