sbicvar.h revision 1.7
1/* $NetBSD: sbicvar.h,v 1.7 2000/03/23 06:41:28 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Van Jacobson of Lawrence Berkeley Laboratory. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)scsivar.h 7.1 (Berkeley) 5/8/90 39 */ 40#ifndef _SBICVAR_H_ 41#define _SBICVAR_H_ 42#include <sys/callout.h> 43#include <sys/malloc.h> 44 45 46/* 47 * DMA chains are used for Scatter-Gather DMA. 48 */ 49struct dma_chain { 50 int dc_count; 51 char *dc_addr; 52}; 53 54/* 55 * ACB. Holds additional information for each SCSI command Comments: We 56 * need a separate scsi command block because we may need to overwrite it 57 * with a request sense command. Basicly, we refrain from fiddling with 58 * the scsi_xfer struct (except do the expected updating of return values). 59 * We'll generally update: xs->{flags,resid,error,sense,status} and 60 * occasionally xs->retries. 61 */ 62struct sbic_acb { 63 TAILQ_ENTRY(sbic_acb) chain; 64 struct scsipi_xfer *xs; /* SCSI xfer ctrl block from above */ 65 int flags; /* Status */ 66#define ACB_FREE 0x00 67#define ACB_ACTIVE 0x01 68#define ACB_DONE 0x04 69#define ACB_CHKSENSE 0x08 70#define ACB_BBUF 0x10 /* DMA input needs to be copied from bounce */ 71#define ACB_DATAIN 0x20 /* DMA direction flag */ 72 73 struct scsi_generic cmd; /* SCSI command block */ 74 int clen; 75 struct dma_chain sc_kv; /* Virtual address of whole DMA */ 76 struct dma_chain sc_pa; /* Physical address of DMA segment */ 77 u_long sc_tcnt; /* number of bytes for this DMA */ 78 u_short sc_dmacmd; /* Internal data for this DMA */ 79 char *pa_addr; /* XXXX initial phys addr */ 80}; 81 82/* 83 * Some info about each (possible) target on the SCSI bus. This should 84 * probably have been a "per target+lunit" structure, but we'll leave it at 85 * this for now. Is there a way to reliably hook it up to sc->fordriver?? 86 */ 87struct sbic_tinfo { 88 int cmds; /* #commands processed */ 89 int dconns; /* #disconnects */ 90 int senses; /* #request sense commands sent */ 91 int lubusy; /* What local units/subr. are busy? */ 92} tinfo_t; 93 94struct sbic_softc { 95 struct device sc_dev; 96 struct target_sync { 97 u_char state; 98 u_char period; 99 u_char offset; 100 } sc_sync[8]; 101 u_char target; /* Currently active target */ 102 u_char lun; 103 struct scsipi_link sc_link; /* proto for sub devices */ 104 struct scsipi_adapter sc_adapter; 105 sbic_regmap_p sc_sbicp; /* the SBIC */ 106 void *sc_driver; /* driver specific field */ 107 int sc_ipl; 108 109 struct callout sc_timo_ch; 110 111 /* Lists of command blocks */ 112 TAILQ_HEAD(acb_list, sbic_acb) free_list, 113 ready_list, 114 nexus_list; 115 116 struct sbic_acb *sc_nexus; /* current command */ 117 struct sbic_acb sc_acb[8]; /* the real command blocks */ 118 struct sbic_tinfo sc_tinfo[8]; 119 120 struct scsipi_xfer *sc_xs; /* transfer from high level code */ 121 u_char sc_flags; 122 u_char sc_stat[2]; 123 u_char sc_msg[7]; 124 u_long sc_clkfreq; 125 u_long sc_tcnt; /* number of bytes transfered */ 126 u_short sc_dmacmd; /* used by dma drivers */ 127 u_long sc_dmamask; /* dma valid mem mask */ 128#ifdef DEBUG 129 u_short sc_dmatimo; /* dma timeout */ 130#endif 131 struct dma_chain *sc_cur; 132 struct dma_chain *sc_last; 133 int (*sc_dmago) __P((struct sbic_softc *, char *, int, int)); 134 int (*sc_dmanext) __P((struct sbic_softc *)); 135 void (*sc_enintr) __P((struct sbic_softc *)); 136 void (*sc_dmastop) __P((struct sbic_softc *)); 137}; 138 139/* 140 * sc_flags 141 */ 142#define SBICF_ALIVE 0x01 /* controller initialized */ 143#define SBICF_DCFLUSH 0x02 /* need flush for overlap after dma finishes */ 144#define SBICF_SELECTED 0x04 /* bus is in selected state. */ 145#define SBICF_ICMD 0x08 /* Immediate command in execution */ 146#define SBICF_BADDMA 0x10 /* controller can only DMA to ztwobus space */ 147#define SBICF_INTR 0x40 /* SBICF interrupt expected */ 148#define SBICF_INDMA 0x80 /* not used yet, DMA I/O in progress */ 149 150/* 151 * sync states 152 */ 153#define SYNC_START 0 /* no sync handshake started */ 154#define SYNC_SENT 1 /* we sent sync request, no answer yet */ 155#define SYNC_DONE 2 /* target accepted our (or inferior) settings, 156 or it rejected the request and we stay async */ 157 158#define PHASE 0x07 /* mask for psns/pctl phase */ 159#define DATA_OUT_PHASE 0x00 160#define DATA_IN_PHASE 0x01 161#define CMD_PHASE 0x02 162#define STATUS_PHASE 0x03 163#define BUS_FREE_PHASE 0x04 164#define ARB_SEL_PHASE 0x05 /* Fuji chip combines arbitration with sel. */ 165#define MESG_OUT_PHASE 0x06 166#define MESG_IN_PHASE 0x07 167 168#define MSG_CMD_COMPLETE 0x00 169#define MSG_EXT_MESSAGE 0x01 170#define MSG_SAVE_DATA_PTR 0x02 171#define MSG_RESTORE_PTR 0x03 172#define MSG_DISCONNECT 0x04 173#define MSG_INIT_DETECT_ERROR 0x05 174#define MSG_ABORT 0x06 175#define MSG_REJECT 0x07 176#define MSG_NOOP 0x08 177#define MSG_PARITY_ERROR 0x09 178#define MSG_BUS_DEVICE_RESET 0x0C 179#define MSG_IDENTIFY 0x80 180#define MSG_IDENTIFY_DR 0xc0 /* (disconnect/reconnect allowed) */ 181#define MSG_SYNC_REQ 0x01 182 183#define MSG_ISIDENTIFY(x) ((x) & MSG_IDENTIFY) 184 185 186#define STS_CHECKCOND 0x02 /* Check Condition (ie., read sense) */ 187#define STS_CONDMET 0x04 /* Condition Met (ie., search worked) */ 188#define STS_BUSY 0x08 189#define STS_INTERMED 0x10 /* Intermediate status sent */ 190#define STS_EXT 0x80 /* Extended status valid */ 191 192 193/* 194 * States returned by our state machine 195 */ 196 197#define SBIC_STATE_ERROR -1 198#define SBIC_STATE_DONE 0 199#define SBIC_STATE_RUNNING 1 200#define SBIC_STATE_DISCONNECT 2 201 202 203struct buf; 204struct scsipi_xfer; 205 206void sbic_minphys __P((struct buf *bp)); 207int sbic_scsicmd __P((struct scsipi_xfer *)); 208void sbicinit __P((struct sbic_softc *)); 209int sbicintr __P((struct sbic_softc *)); 210 211#endif /* _SBICVAR_H_ */ 212