intr.h revision 1.13
11.13Syamt/*	$NetBSD: intr.h,v 1.13 2006/12/21 15:55:23 yamt Exp $	*/
21.1Stsutsui
31.1Stsutsui/*
41.1Stsutsui *
51.1Stsutsui * Copyright (c) 1998 NetBSD Foundation, Inc.
61.1Stsutsui * All rights reserved.
71.1Stsutsui *
81.1Stsutsui * This code is derived from software contributed to The NetBSD Foundation
91.1Stsutsui * by Minoura Makoto and Jason R. Thorpe.
101.1Stsutsui *
111.1Stsutsui * Redistribution and use in source and binary forms, with or without
121.1Stsutsui * modification, are permitted provided that the following conditions
131.1Stsutsui * are met:
141.1Stsutsui * 1. Redistributions of source code must retain the above copyright
151.1Stsutsui *    notice, this list of conditions and the following disclaimer.
161.1Stsutsui * 2. Redistributions in binary form must reproduce the above copyright
171.1Stsutsui *    notice, this list of conditions and the following disclaimer in the
181.1Stsutsui *    documentation and/or other materials provided with the distribution.
191.1Stsutsui * 3. All advertising materials mentioning features or use of this software
201.1Stsutsui *    must display the following acknowledgement:
211.1Stsutsui *      This product includes software developed by The NetBSD Foundation
221.1Stsutsui *	Inc. and its contributers.
231.1Stsutsui * 4. The name of the author may not be used to endorse or promote products
241.1Stsutsui *    derived from this software without specific prior written permission.
251.1Stsutsui *
261.1Stsutsui * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
271.1Stsutsui * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
281.1Stsutsui * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
291.1Stsutsui * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
301.1Stsutsui * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
311.1Stsutsui * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
321.1Stsutsui * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
331.1Stsutsui * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
341.1Stsutsui * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
351.1Stsutsui * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
361.1Stsutsui */
371.1Stsutsui
381.1Stsutsui#ifndef _NEWS68K_INTR_H_
391.1Stsutsui#define	_NEWS68K_INTR_H_
401.1Stsutsui
411.1Stsutsui#include <machine/psl.h>
421.5Stsutsui#include <m68k/asm_single.h>
431.1Stsutsui
441.1Stsutsui#ifdef _KERNEL
451.1Stsutsui/*
461.1Stsutsui * news68k can handle software interrupts by its own hardware
471.1Stsutsui * so has no need to check for any simulated interrupts, etc.
481.1Stsutsui */
491.1Stsutsui#define	spl0()		_spl0()
501.1Stsutsui
511.1Stsutsui#define	spllowersoftclock()	spl2()
521.13Syamt
531.13Syamt#define	IPL_NONE	0
541.13Syamt#define	IPL_SOFTCLOCK	(PSL_S|PSL_IPL2)
551.13Syamt#define	IPL_SOFTNET	(PSL_S|PSL_IPL2)
561.13Syamt#define	IPL_BIO		(PSL_S|PSL_IPL4)
571.13Syamt#define	IPL_NET		(PSL_S|PSL_IPL4)
581.13Syamt#define	IPL_TTY		(PSL_S|PSL_IPL5)
591.13Syamt#define	IPL_VM		(PSL_S|PSL_IPL5)
601.13Syamt#define	IPL_SERIAL	(PSL_S|PSL_IPL5)
611.13Syamt#define	IPL_CLOCK	(PSL_S|PSL_IPL6)
621.13Syamt#define	IPL_STATCLOCK	IPL_CLOCK
631.13Syamt#define	IPL_SCHED	(PSL_S|PSL_IPL7)
641.13Syamt#define	IPL_HIGH	(PSL_S|PSL_IPL7)
651.13Syamt#define	IPL_LOCK	(PSL_S|PSL_IPL7)
661.13Syamt
671.13Syamttypedef int ipl_t;
681.13Syamttypedef struct {
691.13Syamt	ipl_t _ipl;
701.13Syamt} ipl_cookie_t;
711.13Syamt
721.13Syamtstatic inline ipl_cookie_t
731.13Syamtmakeiplcookie(ipl_t ipl)
741.13Syamt{
751.13Syamt
761.13Syamt	return (ipl_cookie_t){._ipl = ipl};
771.13Syamt}
781.13Syamt
791.13Syamtstatic inline int
801.13Syamtsplraiseipl(ipl_cookie_t icookie)
811.13Syamt{
821.13Syamt
831.13Syamt	return _splraise(icookie._ipl);
841.13Syamt}
851.13Syamt
861.13Syamt#include <sys/spl.h>
871.9Stsutsui
881.12Sperrystatic __inline void
891.9Stsutsuisplx(int sr)
901.9Stsutsui{
911.9Stsutsui
921.11Sperry	__asm volatile("movw %0,%%sr" : : "di" (sr));
931.9Stsutsui}
941.1Stsutsui
951.1Stsutsui/*
961.1Stsutsui * simulated software interrupt register
971.1Stsutsui */
981.2Stsutsuiextern u_char ssir;
991.1Stsutsuiextern volatile u_char *ctrl_int2;
1001.1Stsutsui
1011.1Stsutsui#define	NSIR		(sizeof(ssir) * 8)
1021.2Stsutsui#define	SIR_NET		0
1031.2Stsutsui#define	SIR_CLOCK	1
1041.2Stsutsui#define	NEXT_SIR	2
1051.1Stsutsui
1061.5Stsutsui#define	siron(x)	single_inst_bset_b((ssir), (x))
1071.5Stsutsui#define	siroff(x)	single_inst_bclr_b((ssir), (x))
1081.2Stsutsui#define	setsoftint(x)	do {				\
1091.3Stsutsui				siron(x);		\
1101.2Stsutsui				*ctrl_int2 = 0xff;	\
1111.2Stsutsui			} while (0)
1121.2Stsutsui#define	setsoftnet()	setsoftint(1 << SIR_NET)
1131.2Stsutsui#define	setsoftclock()	setsoftint(1 << SIR_CLOCK)
1141.1Stsutsui
1151.8Stsutsuiu_char allocate_sir(void (*)(void *), void *);
1161.8Stsutsuivoid init_sir(void);
1171.1Stsutsui#endif /* _KERNEL */
1181.1Stsutsui
1191.1Stsutsui#endif /* _NEWS68K_INTR_H_ */
120