cpu.h revision 1.3 
1/*	$NetBSD: cpu.h,v 1.3 1997/11/05 04:19:04 thorpej Exp $	*/
2
3/*
4 * Copyright (C) 1995-1997 Wolfgang Solfrank.
5 * Copyright (C) 1995-1997 TooLs GmbH.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgement:
18 *	This product includes software developed by TooLs GmbH.
19 * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 *    derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33#ifndef	_MACHINE_CPU_H_
34#define	_MACHINE_CPU_H_
35
36#include <machine/frame.h>
37
38struct machvec {
39	int (*splhigh) __P((void));
40	int (*spl0) __P((void));
41	int (*splbio) __P((void));
42	int (*splnet) __P((void));
43	int (*spltty) __P((void));
44	int (*splimp) __P((void));
45	int (*splclock) __P((void));
46	int (*splsoftclock) __P((void));
47	int (*splsoftnet) __P((void));
48	int (*splx) __P((int));
49	void (*setsoftclock) __P((void));
50	void (*setsoftnet) __P((void));
51	void (*clock_return) __P((struct clockframe *, int));
52	void (*irq_establish) __P((int, int, void (*)(void *), void *));
53};
54extern struct machvec machine_interface;
55
56#include <machine/psl.h>
57
58#define	splhigh()	((*machine_interface.splhigh)())
59#define	spl0()		((*machine_interface.spl0)())
60#define	splbio()	((*machine_interface.splbio)())
61#define	splnet()	((*machine_interface.splnet)())
62#define	spltty()	((*machine_interface.spltty)())
63#define	splimp()	((*machine_interface.splimp)())
64#define	splclock()	((*machine_interface.splclock)())
65#define	splsoftclock()	((*machine_interface.splsoftclock)())
66#define	splstatclock()	splclock()
67#define	splsoftnet()	((*machine_interface.splsoftnet)())
68#define	splx(new)	((*machine_interface.splx)(new))
69#define	setsoftclock()	((*machine_interface.setsoftclock)())
70#define	setsoftnet()	((*machine_interface.setsoftnet)())
71#define	clock_return(frame, level)		\
72	((*machine_interface.clock_return)((frame), (level)))
73#define	irq_establish(irq, level, handler, arg)	\
74	((*machine_interface.irq_establish)((irq), (level), (handler), (arg)))
75
76#define	CLKF_USERMODE(frame)	(((frame)->srr1 & PSL_PR) != 0)
77#define	CLKF_BASEPRI(frame)	((frame)->pri == 0)
78#define	CLKF_PC(frame)		((frame)->srr0)
79#define	CLKF_INTR(frame)	((frame)->depth >= 0)
80
81#define	cpu_swapout(p)
82#define cpu_wait(p)
83
84extern void delay __P((unsigned));
85#define	DELAY(n)		delay(n)
86
87extern __volatile int want_resched;
88extern __volatile int astpending;
89
90#define	need_resched()		(want_resched = 1, astpending = 1)
91#define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, astpending = 1)
92#define	signotify(p)		(astpending = 1)
93
94#define	CACHELINESIZE	32			/* For now		XXX */
95
96extern __inline void
97syncicache(from, len)
98	void *from;
99	int len;
100{
101	int l = len;
102	void *p = from;
103
104	do {
105		__asm__ __volatile ("dcbst 0,%0" :: "r"(p));
106		p += CACHELINESIZE;
107	} while ((l -= CACHELINESIZE) > 0);
108	__asm__ __volatile ("sync");
109	do {
110		__asm__ __volatile ("icbi 0,%0" :: "r"(from));
111		from += CACHELINESIZE;
112	} while ((len -= CACHELINESIZE) > 0);
113	__asm__ __volatile ("isync");
114}
115
116extern char *bootpath;
117
118#endif	/* _MACHINE_CPU_H_ */
119