pq3diic.c revision 1.6
11.6Sthorpej/* $NetBSD: pq3diic.c,v 1.6 2022/07/22 20:09:47 thorpej Exp $ */ 21.2Smatt/*- 31.2Smatt * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 41.2Smatt * All rights reserved. 51.2Smatt * 61.2Smatt * This code is derived from software contributed to The NetBSD Foundation 71.2Smatt * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 81.2Smatt * Agency and which was developed by Matt Thomas of 3am Software Foundry. 91.2Smatt * 101.2Smatt * This material is based upon work supported by the Defense Advanced Research 111.2Smatt * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 121.2Smatt * Contract No. N66001-09-C-2073. 131.2Smatt * Approved for Public Release, Distribution Unlimited 141.2Smatt * 151.2Smatt * Redistribution and use in source and binary forms, with or without 161.2Smatt * modification, are permitted provided that the following conditions 171.2Smatt * are met: 181.2Smatt * 1. Redistributions of source code must retain the above copyright 191.2Smatt * notice, this list of conditions and the following disclaimer. 201.2Smatt * 2. Redistributions in binary form must reproduce the above copyright 211.2Smatt * notice, this list of conditions and the following disclaimer in the 221.2Smatt * documentation and/or other materials provided with the distribution. 231.2Smatt * 241.2Smatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 251.2Smatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 261.2Smatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 271.2Smatt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 281.2Smatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 291.2Smatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 301.2Smatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 311.2Smatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 321.2Smatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 331.2Smatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 341.2Smatt * POSSIBILITY OF SUCH DAMAGE. 351.2Smatt */ 361.2Smatt 371.2Smatt#include <sys/cdefs.h> 381.6Sthorpej__KERNEL_RCSID(0, "$NetBSD: pq3diic.c,v 1.6 2022/07/22 20:09:47 thorpej Exp $"); 391.2Smatt 401.5Srin#include "ioconf.h" 411.3Smatt 421.2Smatt#include <sys/param.h> 431.2Smatt#include <sys/cpu.h> 441.2Smatt#include <sys/device.h> 451.2Smatt#include <sys/tty.h> 461.2Smatt 471.2Smatt#include <sys/intr.h> 481.2Smatt#include <sys/bus.h> 491.2Smatt 501.2Smatt#include <dev/i2c/i2cvar.h> 511.2Smatt 521.2Smatt#include <dev/i2c/motoi2creg.h> 531.2Smatt#include <dev/i2c/motoi2cvar.h> 541.2Smatt 551.2Smatt#include <powerpc/booke/cpuvar.h> 561.2Smatt#include <powerpc/booke/e500var.h> 571.2Smatt#include <powerpc/booke/e500reg.h> 581.2Smatt 591.2Smattstruct pq3diic_softc { 601.2Smatt device_t sc_dev; 611.6Sthorpej struct motoi2c_softc sc_motoi2c; 621.2Smatt}; 631.2Smatt 641.2Smattstatic int pq3diic_match(device_t, cfdata_t, void *); 651.2Smattstatic void pq3diic_attach(device_t, device_t, void *); 661.2Smatt 671.2SmattCFATTACH_DECL_NEW(pq3diic, sizeof(struct pq3diic_softc), 681.2Smatt pq3diic_match, pq3diic_attach, NULL, NULL); 691.2Smatt 701.2Smattstatic int 711.2Smattpq3diic_match(device_t parent, cfdata_t cf, void *aux) 721.2Smatt{ 731.2Smatt 741.2Smatt if (!e500_cpunode_submatch(parent, cf, cf->cf_name, aux)) 751.2Smatt return 0; 761.2Smatt 771.2Smatt return 1; 781.2Smatt} 791.2Smatt 801.6Sthorpej#if 0 811.2Smattstatic int 821.2Smattpq3diic_intr(void *arg) 831.2Smatt{ 841.2Smatt struct pq3diic_softc * const sc = arg; 851.2Smatt 861.6Sthorpej return motoi2c_intr(&sc->sc_motoi2c); 871.2Smatt} 881.6Sthorpej#endif 891.2Smatt 901.2Smattstatic void 911.2Smattpq3diic_attach(device_t parent, device_t self, void *aux) 921.2Smatt{ 931.2Smatt struct cpunode_softc * const psc = device_private(parent); 941.2Smatt struct pq3diic_softc * const sc = device_private(self); 951.6Sthorpej struct motoi2c_softc * const msc = &sc->sc_motoi2c; 961.2Smatt struct cpunode_attach_args * const cna = aux; 971.2Smatt struct cpunode_locators * const cnl = &cna->cna_locs; 981.2Smatt int error; 991.2Smatt 1001.2Smatt psc->sc_children |= cna->cna_childmask; 1011.2Smatt sc->sc_dev = self; 1021.2Smatt 1031.6Sthorpej aprint_normal("\n"); 1041.2Smatt 1051.6Sthorpej msc->sc_iot = cna->cna_memt; 1061.6Sthorpej error = bus_space_map(msc->sc_iot, cnl->cnl_addr, I2C_SIZE, 1071.6Sthorpej 0, &msc->sc_ioh); 1081.6Sthorpej if (error) { 1091.6Sthorpej aprint_error_dev(self, 1101.6Sthorpej "can't map registers (error = %d)\n", error); 1111.6Sthorpej return; 1121.2Smatt } 1131.2Smatt 1141.6Sthorpej motoi2c_attach_common(self, msc, NULL); 1151.6Sthorpej 1161.6Sthorpej#if 0 1171.6Sthorpej /* 1181.6Sthorpej * XXX e500_intr.c can't handle shared interrupts, but that's 1191.6Sthorpej * XXX ok, because motoi2c doesn't support using interrupts 1201.6Sthorpej * XXX at the moment anyway. 1211.6Sthorpej */ 1221.2Smatt sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_VM, IST_ONCHIP, 1231.2Smatt pq3diic_intr, sc); 1241.2Smatt if (sc->sc_ih == NULL) 1251.2Smatt aprint_error_dev(self, "failed to establish interrupt %d\n", 1261.2Smatt cnl->cnl_intrs[0]); 1271.2Smatt else 1281.2Smatt aprint_normal_dev(self, "interrupting on irq %d\n", 1291.2Smatt cnl->cnl_intrs[0]); 1301.6Sthorpej#endif 1311.2Smatt} 132