gpiic_opb.c revision 1.4
1 /* $NetBSD: gpiic_opb.c,v 1.4 2006/06/26 18:21:38 drochner Exp $ */ 2 3 /* 4 * Copyright 2002, 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include "locators.h" 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 #include <sys/errno.h> 44 #include <sys/lock.h> 45 46 #include <machine/cpu.h> 47 48 #include <dev/i2c/i2cvar.h> 49 #include <dev/i2c/i2c_bitbang.h> 50 51 #include <powerpc/ibm4xx/dev/opbvar.h> 52 #include <powerpc/ibm4xx/dev/gpiicreg.h> 53 54 struct gpiic_softc { 55 struct device sc_dev; 56 bus_space_tag_t sc_bust; 57 bus_space_handle_t sc_bush; 58 uint8_t sc_txen; 59 struct i2c_controller sc_i2c; 60 struct i2c_bitbang_ops sc_bops; 61 struct lock sc_buslock; 62 }; 63 64 static int gpiic_match(struct device *, struct cfdata *, void *); 65 static void gpiic_attach(struct device *, struct device *, void *); 66 67 CFATTACH_DECL(gpiic, sizeof(struct gpiic_softc), 68 gpiic_match, gpiic_attach, NULL, NULL); 69 70 static int gpiic_acquire_bus(void *, int); 71 static void gpiic_release_bus(void *, int); 72 static int gpiic_send_start(void *, int); 73 static int gpiic_send_stop(void *, int); 74 static int gpiic_initiate_xfer(void *, i2c_addr_t, int); 75 static int gpiic_read_byte(void *, uint8_t *, int); 76 static int gpiic_write_byte(void *, uint8_t, int); 77 static void gpiic_set_dir(void *, uint32_t); 78 static void gpiic_set_bits(void *, uint32_t); 79 static uint32_t gpiic_read_bits(void *); 80 81 static int 82 gpiic_match(struct device *parent, struct cfdata *cf, void *args) 83 { 84 struct opb_attach_args *oaa = args; 85 86 if (strcmp(oaa->opb_name, cf->cf_name) != 0) 87 return 0; 88 89 return (1); 90 } 91 92 static void 93 gpiic_attach(struct device *parent, struct device *self, void *args) 94 { 95 struct gpiic_softc *sc = (struct gpiic_softc *)self; 96 struct opb_attach_args *oaa = args; 97 struct i2cbus_attach_args iba; 98 99 aprint_naive(": IIC controller\n"); 100 aprint_normal(": On-Chip IIC controller\n"); 101 102 sc->sc_bust = oaa->opb_bt; 103 104 bus_space_map(sc->sc_bust, oaa->opb_addr, IIC_NREG, 0, &sc->sc_bush); 105 106 lockinit(&sc->sc_buslock, PRIBIO|PCATCH, "gpiiclk", 0, 0); 107 108 sc->sc_txen = 0; 109 sc->sc_i2c.ic_cookie = sc; 110 sc->sc_i2c.ic_acquire_bus = gpiic_acquire_bus; 111 sc->sc_i2c.ic_release_bus = gpiic_release_bus; 112 sc->sc_i2c.ic_exec = NULL; 113 sc->sc_i2c.ic_send_start = gpiic_send_start; 114 sc->sc_i2c.ic_send_stop = gpiic_send_stop; 115 sc->sc_i2c.ic_initiate_xfer = gpiic_initiate_xfer; 116 sc->sc_i2c.ic_read_byte = gpiic_read_byte; 117 sc->sc_i2c.ic_write_byte = gpiic_write_byte; 118 119 sc->sc_bops.ibo_set_dir = gpiic_set_dir; 120 sc->sc_bops.ibo_set_bits = gpiic_set_bits; 121 sc->sc_bops.ibo_read_bits = gpiic_read_bits; 122 sc->sc_bops.ibo_bits[I2C_BIT_SDA] = IIC_DIRECTCNTL_SDAC; 123 sc->sc_bops.ibo_bits[I2C_BIT_SCL] = IIC_DIRECTCNTL_SCC; 124 sc->sc_bops.ibo_bits[I2C_BIT_OUTPUT] = 1; 125 sc->sc_bops.ibo_bits[I2C_BIT_INPUT] = 0; 126 127 /* 128 * Put the controller into Soft Reset. This allows us to 129 * manually bit-bang the I2C clock/data lines. 130 */ 131 bus_space_write_1(sc->sc_bust, sc->sc_bush, IIC_XTCNTLSS, 132 IIC_XTCNTLSS_SRST); 133 delay(10); 134 bus_space_write_1(sc->sc_bust, sc->sc_bush, IIC_DIRECTCNTL, 135 IIC_DIRECTCNTL_SCC | IIC_DIRECTCNTL_SDAC); 136 137 iba.iba_tag = &sc->sc_i2c; 138 (void) config_found_ia(&sc->sc_dev, "i2cbus", &iba, iicbus_print); 139 } 140 141 static int 142 gpiic_acquire_bus(void *arg, int flags) 143 { 144 struct gpiic_softc *sc = arg; 145 146 if (flags & I2C_F_POLL) 147 return (0); 148 149 return (lockmgr(&sc->sc_buslock, LK_EXCLUSIVE, NULL)); 150 } 151 152 static void 153 gpiic_release_bus(void *arg, int flags) 154 { 155 struct gpiic_softc *sc = arg; 156 157 if (flags & I2C_F_POLL) 158 return; 159 160 (void) lockmgr(&sc->sc_buslock, LK_RELEASE, NULL); 161 } 162 163 static int 164 gpiic_send_start(void *arg, int flags) 165 { 166 struct gpiic_softc *sc = arg; 167 168 return (i2c_bitbang_send_start(sc, flags, &sc->sc_bops)); 169 } 170 171 static int 172 gpiic_send_stop(void *arg, int flags) 173 { 174 struct gpiic_softc *sc = arg; 175 176 return (i2c_bitbang_send_stop(sc, flags, &sc->sc_bops)); 177 } 178 179 static int 180 gpiic_initiate_xfer(void *arg, i2c_addr_t addr, int flags) 181 { 182 struct gpiic_softc *sc = arg; 183 184 return (i2c_bitbang_initiate_xfer(sc, addr, flags, &sc->sc_bops)); 185 } 186 187 static int 188 gpiic_read_byte(void *arg, uint8_t *vp, int flags) 189 { 190 struct gpiic_softc *sc = arg; 191 192 return (i2c_bitbang_read_byte(sc, vp, flags, &sc->sc_bops)); 193 } 194 195 static int 196 gpiic_write_byte(void *arg, uint8_t v, int flags) 197 { 198 struct gpiic_softc *sc = arg; 199 200 return (i2c_bitbang_write_byte(sc, v, flags, &sc->sc_bops)); 201 } 202 203 static void 204 gpiic_set_dir(void *arg, uint32_t bits) 205 { 206 struct gpiic_softc *sc = arg; 207 208 sc->sc_txen = (uint8_t)bits; 209 } 210 211 static void 212 gpiic_set_bits(void *arg, uint32_t bits) 213 { 214 struct gpiic_softc *sc = arg; 215 216 if (sc->sc_txen == 0 && (bits & IIC_DIRECTCNTL_SDAC) == 0) { 217 printf("gpiic_set_bits: SDA low with no output enable\n"); 218 bits |= IIC_DIRECTCNTL_SDAC; 219 } 220 221 bus_space_write_1(sc->sc_bust, sc->sc_bush, IIC_DIRECTCNTL, bits); 222 } 223 224 static uint32_t 225 gpiic_read_bits(void *arg) 226 { 227 struct gpiic_softc *sc = arg; 228 uint8_t rv; 229 230 if (sc->sc_txen != 0) 231 printf("gpiic_read_bits: Read in output mode\n"); 232 233 rv = bus_space_read_1(sc->sc_bust, sc->sc_bush, IIC_DIRECTCNTL) << 2; 234 rv &= (IIC_DIRECTCNTL_SCC | IIC_DIRECTCNTL_SDAC); 235 236 return ((uint32_t)rv); 237 } 238
Indexes created Sun Nov 02 07:10:05 GMT 2025