Home | History | Annotate | Line # | Download | only in dev
scn.c revision 1.7
      1 /*	$NetBSD: scn.c,v 1.6 2014/03/24 19:10:34 christos Exp $ */
      2 
      3 /*
      4  * Resurrected from the old pc532 port 1/18/2009.
      5  *
      6  * XXX- The locking in this is probably totally broken. I haven't attempted
      7  *      to get it right, but it seems to work okay anyhow.
      8  */
      9 
     10 /*
     11  * Copyright (c) 1991, 1992, 1993
     12  *	The Regents of the University of California.  All rights reserved.
     13  *
     14  * Portions of this software were developed by the Computer Systems
     15  * Engineering group at Lawrence Berkeley Laboratory under DARPA
     16  * contract BG 91-66 and contributed to Berkeley.
     17  *
     18  * All advertising materials mentioning features or use of this software
     19  * must display the following acknowledgement:
     20  *	This product includes software developed by the University of
     21  *	California, Lawrence Berkeley Laboratory.
     22  *
     23  * Redistribution and use in source and binary forms, with or without
     24  * modification, are permitted provided that the following conditions
     25  * are met:
     26  * 1. Redistributions of source code must retain the above copyright
     27  *    notice, this list of conditions and the following disclaimer.
     28  * 2. Redistributions in binary form must reproduce the above copyright
     29  *    notice, this list of conditions and the following disclaimer in the
     30  *    documentation and/or other materials provided with the distribution.
     31  * 3. Neither the name of the University nor the names of its contributors
     32  *    may be used to endorse or promote products derived from this software
     33  *    without specific prior written permission.
     34  *
     35  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     36  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     37  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     38  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     39  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     40  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     41  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     42  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     43  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     44  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     45  * SUCH DAMAGE.
     46  *
     47  *	from: @(#)com.c	7.5 (Berkeley) 5/16/91
     48  */
     49 
     50 /*
     51  * Copyright (c) 1996, 1997 Philip L. Budne.
     52  * Copyright (c) 1993 Philip A. Nelson.
     53  *
     54  * Portions of this software were developed by the Computer Systems
     55  * Engineering group at Lawrence Berkeley Laboratory under DARPA
     56  * contract BG 91-66 and contributed to Berkeley.
     57  *
     58  * All advertising materials mentioning features or use of this software
     59  * must display the following acknowledgement:
     60  *	This product includes software developed by the University of
     61  *	California, Lawrence Berkeley Laboratory.
     62  *
     63  * Redistribution and use in source and binary forms, with or without
     64  * modification, are permitted provided that the following conditions
     65  * are met:
     66  * 1. Redistributions of source code must retain the above copyright
     67  *    notice, this list of conditions and the following disclaimer.
     68  * 2. Redistributions in binary form must reproduce the above copyright
     69  *    notice, this list of conditions and the following disclaimer in the
     70  *    documentation and/or other materials provided with the distribution.
     71  * 3. All advertising materials mentioning features or use of this software
     72  *    must display the following acknowledgement:
     73  *	This product includes software developed by the University of
     74  *	California, Berkeley and its contributors.
     75  * 4. Neither the name of the University nor the names of its contributors
     76  *    may be used to endorse or promote products derived from this software
     77  *    without specific prior written permission.
     78  *
     79  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     80  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     81  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     82  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     83  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     84  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     85  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     86  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     87  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     88  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     89  * SUCH DAMAGE.
     90  *
     91  *	from: @(#)com.c	7.5 (Berkeley) 5/16/91
     92  */
     93 
     94 #include <sys/cdefs.h>
     95 __KERNEL_RCSID(0, "$NetBSD: scn.c,v 1.6 2014/03/24 19:10:34 christos Exp $");
     96 
     97 #include "opt_ddb.h"
     98 #include "opt_kgdb.h"
     99 #include "scn.h"
    100 
    101 #include <sys/param.h>
    102 #include <sys/systm.h>
    103 #include <sys/ioctl.h>
    104 #include <sys/select.h>
    105 #include <sys/tty.h>
    106 #include <sys/proc.h>
    107 #include <sys/file.h>
    108 #include <sys/uio.h>
    109 #include <sys/kernel.h>
    110 #include <sys/syslog.h>
    111 #include <sys/types.h>
    112 #include <sys/device.h>
    113 #include <sys/malloc.h>
    114 #include <sys/conf.h>
    115 #include <sys/intr.h>
    116 #ifdef KGDB
    117 #include <sys/kgdb.h>
    118 #endif
    119 #include <sys/kauth.h>
    120 
    121 #include <dev/cons.h>
    122 
    123 #include <machine/autoconf.h>
    124 #include <machine/machtype.h>
    125 
    126 #include <sgimips/dev/scnreg.h>
    127 #include <sgimips/dev/scnvar.h>
    128 
    129 int     scn_match(device_t, struct cfdata *, void *);
    130 void    scn_attach(device_t, device_t, void *);
    131 int     scnparam(struct tty *, struct termios *);
    132 void    scnstart(struct tty *);
    133 int     scnhwiflow(struct tty *, int);
    134 
    135 void	scncnprobe(struct consdev *);
    136 void	scncninit(struct consdev *);
    137 int     scncngetc(dev_t);
    138 void    scncnputc(dev_t, int);
    139 void	scncnpollc(dev_t, int);
    140 int	scninit(dev_t, int);
    141 void	scncnreinit(void *);
    142 
    143 CFATTACH_DECL_NEW(scn, sizeof(struct scn_softc),
    144     scn_match, scn_attach, NULL, NULL);
    145 
    146 extern struct cfdriver scn_cd;
    147 
    148 dev_type_open(scnopen);
    149 dev_type_close(scnclose);
    150 dev_type_read(scnread);
    151 dev_type_write(scnwrite);
    152 dev_type_ioctl(scnioctl);
    153 dev_type_stop(scnstop);
    154 dev_type_tty(scntty);
    155 dev_type_poll(scnpoll);
    156 
    157 const struct cdevsw scn_cdevsw = {
    158 	.d_open = scnopen,
    159 	.d_close = scnclose,
    160 	.d_read = scnread,
    161 	.d_write = scnwrite,
    162 	.d_ioctl = scnioctl,
    163 	.d_stop = scnstop,
    164 	.d_tty = scntty,
    165 	.d_poll = scnpoll,
    166 	.d_mmap = nommap,
    167 	.d_kqfilter = ttykqfilter,
    168 	.d_discard = nodiscard,
    169 	.d_flag = D_TTY
    170 };
    171 
    172 struct consdev scn_cn = {
    173 	scncnprobe,
    174 	scncninit,
    175 	scncngetc,
    176 	scncnputc,
    177 	scncnpollc,
    178 	NULL,
    179 	NULL,
    180 	NULL,
    181 	NODEV,
    182 	CN_NORMAL
    183 };
    184 
    185 #ifndef CONSOLE_SPEED
    186 #define CONSOLE_SPEED TTYDEF_SPEED
    187 #endif
    188 
    189 #ifndef SCNDEF_CFLAG
    190 #define SCNDEF_CFLAG TTYDEF_CFLAG
    191 #endif
    192 
    193 #ifdef CPU30MHZ
    194 #define RECOVER()	__asm volatile("bispsrw 0x800" : : : "cc")
    195 #else
    196 #define RECOVER()
    197 #endif
    198 
    199 int     scndefaultrate = TTYDEF_SPEED;
    200 int     scnconsrate = CONSOLE_SPEED;
    201 
    202 static inline struct scn_softc *
    203 SOFTC(int unit)
    204 {
    205 	if (unit < 0 || unit >= scn_cd.cd_ndevs)
    206 		return (NULL);
    207 	return device_private(scn_cd.cd_devs[unit]);
    208 }
    209 
    210 static int	scnintr(void *);
    211 static void	scnrxintr(void *);
    212 static int	scn_rxintr(struct scn_softc *);
    213 static void	scnsoft(void *);
    214 static void	scn_setchip(struct scn_softc *sc);
    215 static int	scniter(int *, int, int*, int*, struct chan *, int);
    216 static int	scn_config(int, int, int, int, u_char, u_char);
    217 static void	scn_rxenable(struct scn_softc *);
    218 static void	scn_rxdisable(struct scn_softc *);
    219 static void	dcd_int(struct scn_softc *, struct tty *, u_char);
    220 static void	scnoverrun(int, long *, const char *);
    221 static u_char	opbits(struct scn_softc *, int);
    222 
    223 static void *scnsir = NULL;		/* s/w intr cookie */
    224 #define setsoftscn()	softint_schedule(scnsir)
    225 
    226 #ifdef SCN_TIMING
    227 /*
    228  * Keep timing info on latency of software interrupt used by
    229  * the ringbuf code to empty ring buffer.
    230  * "getinfo" program reads data from /dev/kmem.
    231  */
    232 static struct timeval tstart;
    233 #define NJITTER 100
    234 int     scn_njitter = NJITTER;
    235 int     scn_jitter[NJITTER];
    236 #endif
    237 
    238 #define SCN_CLOCK	3686400		/* input clock */
    239 
    240 /* speed table groups ACR[7] */
    241 #define GRP_A	0
    242 #define GRP_B	ACR_BRG
    243 
    244 /* combo of MR0[2:0] and ACR[7] */
    245 #define MODE0A	MR0_MODE_0
    246 #define MODE0B	(MR0_MODE_0|ACR_BRG)
    247 #define MODE1A	MR0_MODE_1
    248 #define MODE1B	(MR0_MODE_1|ACR_BRG)
    249 #define MODE2A	MR0_MODE_2
    250 #define MODE2B	(MR0_MODE_2|ACR_BRG)
    251 
    252 #define ANYMODE	-1
    253 #define DEFMODE(C92) MODE0A		/* use MODE4A if 26c92? */
    254 
    255 /* speed code for Counter/Timer (all modes, groups) */
    256 #define USE_CT 0xd
    257 
    258 /*
    259  * Rate table, ordered by speed, then mode.
    260  * NOTE: ordering of modes must be done carefully!
    261  */
    262 struct tabent {
    263 	int32_t speed;
    264 	int16_t code;
    265 	int16_t mode;
    266 } table[] = {
    267 	{     50, 0x0, MODE0A },
    268 	{     75, 0x0, MODE0B },
    269 	{    110, 0x1, MODE0A },
    270 	{    110, 0x1, MODE0B },
    271 	{    110, 0x1, MODE1A },
    272 	{    110, 0x1, MODE1B },
    273 	{    134, 0x2, MODE0A },	/* 134.5 */
    274 	{    134, 0x2, MODE0B },	/* 134.5 */
    275 	{    134, 0x2, MODE1A },	/* 134.5 */
    276 	{    134, 0x2, MODE1B },	/* 134.5 */
    277 	{    150, 0x3, MODE0A },
    278 	{    150, 0x3, MODE0A },
    279 	{    200, 0x3, MODE0A },
    280 	{    300, 0x4, MODE0A },
    281 	{    300, 0x4, MODE0B },
    282 	{    300, 0x0, MODE1A },
    283 	{    450, 0x0, MODE1B },
    284 	{    600, 0x5, MODE0A },
    285 	{    600, 0x5, MODE0B },
    286 	{    880, 0x1, MODE2A },
    287 	{    880, 0x1, MODE2B },
    288 	{    900, 0x3, MODE1B },
    289 	{   1050, 0x7, MODE0A },
    290 	{   1050, 0x7, MODE1A },
    291 	{   1076, 0x2, MODE2A },
    292 	{   1076, 0x2, MODE2B },
    293 	{   1200, 0x6, MODE0A },
    294 	{   1200, 0x6, MODE0B },
    295 	{   1200, 0x3, MODE1A },
    296 	{   1800, 0xa, MODE0B },
    297 	{   1800, 0x4, MODE1A },
    298 	{   1800, 0x4, MODE1B },
    299 	{   2000, 0x7, MODE0B },
    300 	{   2000, 0x7, MODE1B },
    301 	{   2400, 0x8, MODE0A },
    302 	{   2400, 0x8, MODE0B },
    303 	{   3600, 0x5, MODE1A },
    304 	{   3600, 0x5, MODE1B },
    305 	{   4800, 0x9, MODE2A },
    306 	{   4800, 0x9, MODE2B },
    307 	{   4800, 0x9, MODE0A },
    308 	{   4800, 0x9, MODE0B },
    309 	{   7200, 0xa, MODE0A },
    310 	{   7200, 0x0, MODE2B },
    311 	{   7200, 0x6, MODE1A },
    312 	{   7200, 0x6, MODE1B },
    313 	{   9600, 0xb, MODE2A },
    314 	{   9600, 0xb, MODE2B },
    315 	{   9600, 0xb, MODE0A },
    316 	{   9600, 0xb, MODE0B },
    317 	{   9600, 0xd, MODE1A },	/* use C/T as entre' to mode1 */
    318 	{   9600, 0xd, MODE1B },	/* use C/T as entre' to mode1 */
    319 	{  14400, 0x3, MODE2B },
    320 	{  14400, 0x8, MODE1A },
    321 	{  14400, 0x8, MODE1B },
    322 	{  19200, 0x3, MODE2A },
    323 	{  19200, 0xc, MODE2B },
    324 	{  19200, 0xc, MODE0B },
    325 	{  19200, 0xd, MODE1A },	/* use C/T as entre' to mode1 */
    326 	{  19200, 0xd, MODE1B },	/* use C/T as entre' to mode1 */
    327 	{  28800, 0x4, MODE2A },
    328 	{  28800, 0x4, MODE2B },
    329 	{  28800, 0x9, MODE1A },
    330 	{  28800, 0x9, MODE1B },
    331 	{  38400, 0xc, MODE2A },
    332 	{  38400, 0xc, MODE0A },
    333 	{  57600, 0x5, MODE2A },
    334 	{  57600, 0x5, MODE2B },
    335 	{  57600, 0xb, MODE1A },
    336 	{  57600, 0xb, MODE1B },
    337 	{ 115200, 0x6, MODE2A },
    338 	{ 115200, 0x6, MODE2B },
    339 	{ 115200, 0xc, MODE1B },
    340 	{ 230400, 0xc, MODE1A }
    341 };
    342 #define TABENTRIES (sizeof(table)/sizeof(table[0]))
    343 
    344 /*
    345  * boolean for speed codes which are identical in both A/B BRG groups
    346  * in all modes
    347  */
    348 static u_char bothgroups[16] = {
    349 	0, 1, 1, 0, 1, 1, 1, 0, 1, 1, 0, 1, 0, 1, 1, 1
    350 };
    351 
    352 /*
    353  * Manually constructed divisors table
    354  * for minimum error (from some of Dave Rand's code)
    355  */
    356 const struct {
    357 	uint16_t speed;
    358 	uint16_t div;
    359 } divs[] = {
    360 	{    50, 2303 },	/* 2304 is exact?? */
    361 	{   110, 1047 },	/* Should be 1047.27 */
    362 	{   134, 857 },		/* Should be 856.505576 */
    363 	{  1050, 110 },		/* Should be 109.7142857 */
    364 	{  2000, 57 }		/* Should be 57.6 */
    365 };
    366 #define DIVS (sizeof(divs)/sizeof(divs[0]))
    367 
    368 /*
    369  * minor unit bit decode:
    370  * CxxxUUU
    371  *
    372  * C - carrier
    373  *	0 - delay open until carrier high
    374  *	1 - allow open with carrier low
    375  * UUU - unit 0-7
    376  */
    377 
    378 #define DEV_UNIT(x)	(minor(x) & 0x7)
    379 #define DEV_DIALOUT(x)	(minor(x) & 0x80)
    380 
    381 extern struct tty *constty;
    382 
    383 #define SCN_MAXDUART 4
    384 static struct duart scn_duart[SCN_MAXDUART];
    385 
    386 #ifdef KGDB
    387 extern int kgdb_dev;
    388 extern int kgdb_rate;
    389 extern int kgdb_debug_init;
    390 #endif
    391 
    392 /* XXXXX - fix this */
    393 #define splrtty() spltty()
    394 
    395 /* RS-232 configuration routines */
    396 
    397 /*
    398  * set chip parameters, or mark for delayed change.
    399  * called at spltty() or on TxEMPTY interrupt.
    400  *
    401  * Reads current values to avoid glitches from redundant sets.
    402  * Perhaps should save last value set to avoid read/write?  NOTE:
    403  * Would still need to do read if write not needed to advance MR
    404  * pointer.
    405  *
    406  * new 2/97 -plb
    407  */
    408 
    409 static void
    410 scn_setchip(struct scn_softc *sc)
    411 {
    412 	struct duart *dp;
    413 	u_char acr, csr, mr1, mr2;
    414 	int chan;
    415 
    416 	if (sc->sc_tty && (sc->sc_tty->t_state & TS_BUSY)) {
    417 		sc->sc_heldchanges = 1;
    418 		return;
    419 	}
    420 
    421 	chan = sc->sc_channel;
    422 	dp = sc->sc_duart;
    423 	if (dp->type == SC26C92) {
    424 		u_char nmr0a, mr0a;
    425 
    426 		/* input rate high enough so 64 bit time watchdog not
    427 		 * onerous? */
    428 		if (dp->chan[chan].ispeed >= 1200) {
    429 			/* set FIFO threshold at 6 for other
    430 			 * thresholds we could have to set MR1_FFULL
    431 			 */
    432 			dp->chan[chan].mr0 |= MR0_RXWD | MR0_RXINT;
    433 		} else {
    434 			dp->chan[chan].mr0 &= ~(MR0_RXWD | MR0_RXINT);
    435 		}
    436 
    437 		/* select BRG mode (MR0A only) */
    438 		nmr0a = dp->chan[0].mr0 | (dp->mode & MR0_MODE);
    439 
    440 		dp->base[CH_CR] = CR_CMD_MR0;
    441 		RECOVER();
    442 
    443 		mr0a = dp->base[CH_MR];
    444 		if (mr0a != nmr0a) {
    445 			dp->base[CH_CR] = CR_CMD_MR0;
    446 			RECOVER();
    447 			dp->base[CH_MR] = nmr0a;
    448 		}
    449 
    450 		if (chan) {	 /* channel B? */
    451 			u_char mr0b;
    452 
    453 			sc->sc_chbase[CH_CR] = CR_CMD_MR0;
    454 			RECOVER();
    455 			mr0b = dp->base[CH_MR];
    456 
    457 			if (dp->chan[chan].mr0 != mr0b) {
    458 				sc->sc_chbase[CH_CR] = CR_CMD_MR0;
    459 				RECOVER();
    460 				sc->sc_chbase[CH_MR] = dp->chan[chan].mr0;
    461 			}
    462 		}
    463 	} else {
    464 		sc->sc_chbase[CH_CR] = CR_CMD_MR1;
    465 		RECOVER();
    466 	}
    467 
    468 	mr1 = sc->sc_chbase[CH_MR];
    469 	mr2 = sc->sc_chbase[CH_MR];
    470 	if (mr1 != dp->chan[chan].new_mr1 ||
    471 	    mr2 != dp->chan[chan].new_mr2) {
    472 		sc->sc_chbase[CH_CR] = CR_CMD_MR1;
    473 		RECOVER();
    474 		sc->sc_chbase[CH_MR] = dp->chan[chan].new_mr1;
    475 		sc->sc_chbase[CH_MR] = dp->chan[chan].new_mr2;
    476 	}
    477 
    478 	acr = dp->acr | (dp->mode & ACR_BRG);
    479 	dp->base[DU_ACR] = acr;		/* write-only reg! */
    480 
    481 	/* set speed codes */
    482 	csr = (dp->chan[chan].icode<<4) | dp->chan[chan].ocode;
    483 	if (sc->sc_chbase[CH_CSR] != csr) {
    484 		sc->sc_chbase[CH_CSR] = csr;
    485 	}
    486 
    487 	/* see if counter/timer in use */
    488 	if (dp->counter &&
    489 	    (dp->chan[0].icode == USE_CT || dp->chan[0].ocode == USE_CT ||
    490 	     dp->chan[1].icode == USE_CT || dp->chan[1].ocode == USE_CT)) {
    491 
    492 		/* program counter/timer only if necessary */
    493 		if (dp->counter != dp->ocounter) {
    494 			uint16_t div;
    495 #ifdef DIVS
    496 			int i;
    497 
    498 			/* look for precalculated rate, for minimum error */
    499 			for (i = 0; i < DIVS && divs[i].speed <= dp->counter; i++) {
    500 				if (divs[i].speed == dp->counter) {
    501 					div = divs[i].div;
    502 					goto found;
    503 				}
    504 			}
    505 #endif
    506 
    507 			/* not found in table; calculate a value (rounding up) */
    508 			div = ((long)SCN_CLOCK/16/2 + dp->counter/2) / dp->counter;
    509 
    510 		found:
    511 			/* halt before loading? may ALWAYS glitch?
    512 			 * reload race may only sometimes glitch??
    513 			 */
    514 			dp->base[DU_CTUR] = div >> 8;
    515 			dp->base[DU_CTLR] = div & 255;
    516 			if (dp->ocounter == 0) {
    517 				/* not previously used? */
    518 				u_char temp;
    519 				/* start C/T running */
    520 				temp = dp->base[DU_CSTRT];
    521 				__USE(temp);
    522 			}
    523 			dp->ocounter = dp->counter;
    524 		}
    525 	} else {
    526 		/* counter not in use; mark as free */
    527 		dp->counter = 0;
    528 	}
    529 	sc->sc_heldchanges = 0;
    530 
    531 	/*
    532 	 * delay a tiny bit to try and avoid tx glitching.
    533 	 * I know we're at spltty(), but this is much better than the
    534 	 * old version used DELAY((96000 / out_speed) * 10000)
    535 	 * -plb
    536 	 */
    537 	DELAY(10);
    538 }
    539 
    540 /*
    541  * iterator function for speeds.
    542  * (could be called "findnextcode")
    543  * Returns sequence of possible speed codes for a given rate.
    544  * should set index to zero before first call.
    545  *
    546  * Could be implemented as a "checkspeed()" function called
    547  * to evaluate table entries, BUT this allows more variety in
    548  * use of C/T with fewer table entries.
    549  */
    550 
    551 static int
    552 scniter(int *index, int wanted, int *counter, int *mode, struct chan *other,
    553     int c92)
    554 {
    555 
    556 	while (*index < TABENTRIES) {
    557 		struct tabent *tp;
    558 
    559 		tp = table + (*index)++;
    560 		if (tp->speed != wanted)
    561 			continue;
    562 
    563 		/* if not a 26C92 only look at MODE0 entries */
    564 		if (!c92 && (tp->mode & MR0_MODE) != MR0_MODE_0)
    565 			continue;
    566 
    567 		/*
    568 		 * check mode;
    569 		 * OK if this table entry for current mode, or mode not
    570 		 * yet set, or other channel's rates are available in both
    571 		 * A and B groups.
    572 		 */
    573 
    574 		if (tp->mode == *mode || *mode == ANYMODE ||
    575 		    (other != NULL && (tp->mode & MR0_MODE) == (*mode & MR0_MODE) &&
    576 		     bothgroups[other->icode] && bothgroups[other->ocode])) {
    577 			/*
    578 			 * for future table entries specifying
    579 			 * use of counter/timer
    580 			 */
    581 			if (tp->code == USE_CT) {
    582 				if (*counter != wanted && *counter != 0)
    583 					continue;	/* counter busy */
    584 				*counter = wanted;
    585 			}
    586 			*mode = tp->mode;
    587 			return tp->code;
    588 		}
    589 	}
    590 
    591 	/* here after returning all applicable table entries */
    592 	/* XXX return sequence of USE_CT with all possible modes?? */
    593 	if ((*index)++ == TABENTRIES) {
    594 		/* Max C/T rate (even on 26C92?) is 57600 */
    595 		if (wanted <= 57600 && (*counter == wanted || *counter == 0)) {
    596 			*counter = wanted;
    597 			return USE_CT;
    598 		}
    599 	}
    600 
    601 	return -1;			/* FAIL */
    602 }
    603 
    604 /*
    605  * calculate configuration
    606  * rewritten 2/97 -plb
    607  */
    608 static int
    609 scn_config(int unit, int chan, int ispeed, int ospeed, u_char mr1, u_char mr2)
    610 {
    611 	struct scn_softc *sc;
    612 	struct duart *dp;
    613 	int other;		/* opposite of chan */
    614 	int mode;
    615 	int counter;
    616 	int i, o;		/* input, output iterator indexes */
    617 	int ic, oc;		/* input, output codes */
    618 	struct chan *ocp;	/* other duart channel */
    619 	struct tty *otp;	/* other channel tty struct */
    620 	int c92;		/* true if duart is sc26c92 */
    621 	int s;
    622 
    623 	/* Set up softc pointer. */
    624 	if (unit >= scn_cd.cd_ndevs)
    625 		return ENXIO;
    626 	sc = SOFTC(unit);
    627 	chan = sc->sc_channel;
    628 	other = chan ^ 1;
    629 	dp = sc->sc_duart;
    630 	ocp = &dp->chan[other];
    631 	otp = ocp->tty;
    632 	c92 = (dp->type == SC26C92);
    633 
    634 	/*
    635 	 * Right now the first combination that works is used.
    636 	 * Perhaps it should search entire solution space for "best"
    637 	 * combination. For example, use heuristic weighting of mode
    638 	 * preferences, and use of counter timer?
    639 	 *
    640 	 * For example right now with 2681/2692 when default rate is
    641 	 * 9600 and other channel is closed setting 19200 will pick
    642 	 * mode 0a and use counter/timer.  Better solution might be
    643 	 * mode 0b, leaving counter/timer free!
    644 	 *
    645 	 * When other channel is open might want to prefer
    646 	 * leaving counter timer free, or not flipping A/B group?
    647 	 */
    648 	if (otp && (otp->t_state & TS_ISOPEN)) {
    649 
    650 		/*
    651 		 * Other channel open;
    652 		 * Find speed codes compatible with current mode/counter.
    653 		 */
    654 
    655 		i = 0;
    656 		for (;;) {
    657 			mode = dp->mode;
    658 			counter = dp->counter;
    659 
    660 			/* NOTE: pass other chan pointer to allow group flipping */
    661 			ic = scniter(&i, ispeed, &counter, &mode, ocp, c92);
    662 			if (ic == -1)
    663 				break;
    664 
    665 			o = 0;
    666 			if ((oc = scniter(&o, ospeed, &counter,
    667 					  &mode, NULL, c92)) != -1) {
    668 				/*
    669 				 * take first match
    670 				 *
    671 				 * Perhaps calculate heuristic "score",
    672 				 * save score,codes,mode,counter if score
    673 				 * better than previous best?
    674 				 */
    675 				goto gotit;
    676 			}
    677 		}
    678 		/* XXX try looping for ospeed? */
    679 	} else {
    680 		/* other channel closed */
    681 		int oo, oi;	/* other input, output iterators */
    682 		int oic, ooc;	/* other input, output codes */
    683 
    684 		/*
    685 		 * Here when other channel closed.  Finds first
    686 		 * combination that will allow other channel to be opened
    687 		 * (with defaults) and fits our needs.
    688 		 */
    689 		oi = 0;
    690 		for (;;) {
    691 			mode = ANYMODE;
    692 			counter = 0;
    693 
    694 			oic = scniter(&oi, ocp->ispeed, &counter, &mode, NULL, c92);
    695 			if (oic == -1)
    696 				break;
    697 
    698 			oo = 0;
    699 			while ((ooc = scniter(&oo, ocp->ospeed, &counter,
    700 					   &mode, NULL, c92)) != -1) {
    701 				i = 0;
    702 				while ((ic = scniter(&i, ispeed, &counter,
    703 						  &mode, NULL, c92)) != -1) {
    704 					o = 0;
    705 					if ((oc = scniter(&o, ospeed, &counter,
    706 						       &mode, NULL, c92)) != -1) {
    707 						/*
    708 						 * take first match
    709 						 *
    710 						 * Perhaps calculate heuristic
    711 						 * "score", save
    712 						 *     score,codes,mode,counter
    713 						 * if score better than
    714 						 * previous best?
    715 						 */
    716 						s = spltty();
    717 						dp->chan[other].icode = oic;
    718 						dp->chan[other].ocode = ooc;
    719 						goto gotit2;
    720 					}
    721 				}
    722 			}
    723 		}
    724 	}
    725 	return EINVAL;
    726 
    727  gotit:
    728 	s = spltty();
    729  gotit2:
    730 	dp->chan[chan].new_mr1 = mr1;
    731 	dp->chan[chan].new_mr2 = mr2;
    732 	dp->chan[chan].ispeed = ispeed;
    733 	dp->chan[chan].ospeed = ospeed;
    734 	dp->chan[chan].icode = ic;
    735 	dp->chan[chan].ocode = oc;
    736 	if (mode == ANYMODE)		/* no mode selected?? */
    737 		mode = DEFMODE(c92);
    738 	dp->mode = mode;
    739 	dp->counter = counter;
    740 
    741 	scn_setchip(sc);		/* set chip now, if possible */
    742 	splx(s);
    743 	return (0);
    744 }
    745 
    746 int
    747 scn_match(device_t parent, struct cfdata *cf, void *aux)
    748 {
    749 	struct mainbus_attach_args *ma = aux;
    750 
    751 	if ((mach_type == MACH_SGI_IP6 || mach_type == MACH_SGI_IP10) &&
    752 	    ma->ma_addr == 0x1fb80004)
    753 		return (1);
    754 
    755 	return (0);
    756 }
    757 
    758 /*
    759  * No need to make scn_rx{en,dis}able too efficient,
    760  * they're only called on setup, open & close!
    761  */
    762 static inline void
    763 scn_rxenable(struct scn_softc *sc)
    764 {
    765 	struct duart *dp;
    766 	int channel;
    767 
    768 	dp = sc->sc_duart;
    769 	channel = sc->sc_channel;
    770 
    771 	/* Outputs wire-ored and connected to ICU input for fast rx interrupt. */
    772 	if (channel == 0)
    773 		dp->opcr |= OPCR_OP4_RXRDYA;
    774 	else
    775 		dp->opcr |= OPCR_OP5_RXRDYB;
    776 	dp->base[DU_OPCR] = dp->opcr;
    777 	dp->imr |= sc->sc_rx_int;
    778 	dp->base[DU_IMR] = dp->imr;
    779 }
    780 
    781 static inline void
    782 scn_rxdisable(struct scn_softc *sc)
    783 {
    784 	struct duart *dp;
    785 	int channel;
    786 
    787 	dp = sc->sc_duart;
    788 	channel = sc->sc_channel;
    789 
    790 	/* Outputs wire-ored and connected to ICU input for fast rx interrupt. */
    791 	if (channel == 0)
    792 		dp->opcr &= ~OPCR_OP4_RXRDYA;
    793 	else
    794 		dp->opcr &= ~OPCR_OP5_RXRDYB;
    795 	dp->base[DU_OPCR] = dp->opcr;
    796 	dp->imr &= ~sc->sc_rx_int;
    797 	dp->base[DU_IMR] = dp->imr;
    798 }
    799 
    800 void
    801 scn_attach(device_t parent, device_t self, void *aux)
    802 {
    803 	struct mainbus_attach_args *ma = aux;
    804 	struct scn_softc *sc;
    805 	struct duart *duart;
    806 	volatile u_char *ch_base;
    807 	volatile u_char *duart_base;
    808 	int channel;
    809 	int speed;
    810 	int s;
    811 	int maj __diagused;
    812 	u_char unit;
    813 	u_char duartno;
    814 	u_char delim = ':';
    815 	u_char mr1, mr2;
    816 	enum scntype scntype = SCNUNK;
    817 	const char *duart_type = "Unknown";
    818 	char *intrname;
    819 	bool console, first;
    820 	devmajor_t major;
    821 
    822 	(void)major;
    823 
    824 	sc = device_private(self);
    825 	unit = device_unit(self);
    826 
    827 	/* XXX - hard-coded */
    828 	if (ma->ma_addr == 0x1fb80004)
    829 		duartno = 1;
    830 	else
    831 		duartno = 0;
    832 	channel = 0;
    833 	console = 1;
    834 
    835 	duart = sc->sc_duart = &scn_duart[duartno];
    836 	duart->chan[channel].sc = sc;
    837 	first =	(duart->base == NULL);
    838 
    839 	if (console) {
    840 		sc->sc_isconsole = 1;
    841 		sc->sc_swflags |= SCN_SW_SOFTCAR;	/* ignore carrier */
    842 	}
    843 
    844 	duart_base = (volatile u_char *)MIPS_PHYS_TO_KSEG1(ma->ma_addr);
    845 	ch_base    = duart_base; /* XXX */
    846 
    847 	if (first) {
    848 		/* Probe DUART type */
    849 		s = spltty();
    850 		if (console) {
    851 			ch_base[CH_CR] = CR_DIS_TX;
    852 			delay(5 * 10000);
    853 		}
    854 		ch_base[CH_CR] = CR_CMD_MR1;
    855 		RECOVER();
    856 		mr1 = ch_base[CH_MR];
    857 		mr2 = ch_base[CH_MR];
    858 		ch_base[CH_CR] = CR_CMD_MR1;
    859 		RECOVER();
    860 		ch_base[CH_MR] = 1;
    861 		ch_base[CH_MR] = 0;
    862 		ch_base[CH_CR] = CR_CMD_MR1;
    863 		RECOVER();
    864 		if (ch_base[CH_MR] == 1) {
    865 			/* MR 2 selected */
    866 			ch_base[CH_CR] = CR_CMD_MR0;
    867 			RECOVER();
    868 			/* if 2681, MR2 still selected */
    869 			ch_base[CH_MR] = 1;
    870 			ch_base[CH_CR] = CR_CMD_MR1;
    871 			RECOVER();
    872 			ch_base[CH_MR] = 0; /* MR1 */
    873 			ch_base[CH_MR] = 0; /* MR2 */
    874 			ch_base[CH_CR] = CR_CMD_MR0;
    875 			RECOVER();
    876 			/* if 2681, MR2 still selected */
    877 			if((ch_base[CH_MR] & 1) == 1) {
    878 				duart_type = "sc26c92";
    879 				scntype = SC26C92;
    880 			} else {
    881 				/* 2681 treats as MR1 Select */
    882 				ch_base[CH_CR] = CR_CMD_RTS_OFF;
    883 				RECOVER();
    884 				ch_base[CH_MR] = 1;
    885 				ch_base[CH_MR] = 0;
    886 				ch_base[CH_CR] = CR_CMD_RTS_OFF;
    887 				RECOVER();
    888 				if (ch_base[CH_MR] == 1) {
    889 					duart_type = "scn2681";
    890 					scntype = SCN2681;
    891 				} else {
    892 					duart_type = "scn2692";
    893 					scntype = SCN2692;
    894 				}
    895 			}
    896 		}
    897 
    898 		/* If a 2681, the CR_CMD_MR0 is interpreted as a TX_RESET */
    899 		if (console) {
    900 			ch_base[CH_CR] = CR_ENA_TX;
    901 			RECOVER();
    902 		}
    903 		ch_base[CH_CR] = CR_CMD_MR1;
    904 		RECOVER();
    905 		ch_base[CH_MR] = mr1;
    906 		ch_base[CH_MR] = mr2;
    907 		splx(s);
    908 
    909 		intrname = malloc(sizeof("scnXX"), M_DEVBUF, M_NOWAIT);
    910 		snprintf(intrname, sizeof("scnXX"), "scn%d", unit);
    911 
    912 		/*
    913 		 * On IP6 the console chip is duart1. The keyboard/mouse
    914 		 * is duart0. Each chip has two channels and the channels
    915 		 * share an interrupt. Duart0 is interrupt 0, duart1 is
    916 		 * interrupt 1.
    917 		 */
    918 		if (duartno != 0 && duartno != 1)
    919 			panic("scn_attach: bad duartno: %d", duartno);
    920 		cpu_intr_establish(duartno, IPL_TTY, scnintr, duart);
    921 
    922 		printf("%c %s", delim, duart_type);
    923 		delim = ',';
    924 
    925 		duart->base = duart_base;
    926 		duart->type = scntype;
    927 	}
    928 	/* Record channel, uart */
    929 	sc->sc_channel = channel;
    930 	sc->sc_chbase = ch_base;
    931 
    932 	/* Initialize modem/interrupt bit masks */
    933 	if (channel == 0) {
    934 		sc->sc_op_rts = OP_RTSA;
    935 		sc->sc_op_dtr = OP_DTRA;
    936 		sc->sc_ip_cts = IP_CTSA;
    937 		sc->sc_ip_dcd = IP_DCDA;
    938 
    939 		sc->sc_tx_int = INT_TXA;
    940 		sc->sc_rx_int = INT_RXA;
    941 	} else {
    942 		sc->sc_op_rts = OP_RTSB;
    943 		sc->sc_op_dtr = OP_DTRB;
    944 		sc->sc_ip_cts = IP_CTSB;
    945 		sc->sc_ip_dcd = IP_DCDB;
    946 
    947 		sc->sc_tx_int = INT_TXB;
    948 		sc->sc_rx_int = INT_RXB;
    949 	}
    950 
    951 	/* Initialize counters */
    952 	sc->sc_framing_errors = 0;
    953 	sc->sc_fifo_overruns = 0;
    954 	sc->sc_parity_errors = 0;
    955 	sc->sc_breaks = 0;
    956 
    957 	if (console) {
    958 		DELAY(5 * 10000);	/* Let the output go out.... */
    959 	}
    960 
    961 	/*
    962 	 * Set up the hardware to a base state, in particular:
    963 	 * o reset transmitter and receiver
    964 	 * o set speeds and configurations
    965 	 * o receiver interrupts only (RxRDY and BREAK)
    966 	 */
    967 
    968 	s = spltty();
    969 	/* RTS off... */
    970 	SCN_OP_BIC(sc, sc->sc_op_rts);	/* "istop" */
    971 
    972 	ch_base[CH_CR] = CR_DIS_RX | CR_DIS_TX;
    973 	RECOVER();
    974 	ch_base[CH_CR] = CR_CMD_RESET_RX;
    975 	RECOVER();
    976 	ch_base[CH_CR] = CR_CMD_RESET_TX;
    977 	RECOVER();
    978 	ch_base[CH_CR] = CR_CMD_RESET_ERR;
    979 	RECOVER();
    980 	ch_base[CH_CR] = CR_CMD_RESET_BRK;
    981 	RECOVER();
    982 	ch_base[CH_CR] = CR_CMD_MR1;
    983 	RECOVER();
    984 
    985 	/* No receiver control of RTS. */
    986 	ch_base[CH_MR] = 0;
    987 	ch_base[CH_MR] = 0;
    988 
    989 	/* Initialize the uart structure if this is channel A. */
    990 	if (first) {
    991 		/* Disable all interrupts. */
    992 		duart_base[DU_IMR] = duart->imr = 0;
    993 
    994 		/* Output port config */
    995 		duart_base[DU_OPCR] = duart->opcr = 0;
    996 
    997 		/* Speeds... */
    998 		duart->mode = 0;
    999 
   1000 		/*
   1001 		 * Set initial speed to an illegal code that can be changed to
   1002 		 * any other baud.
   1003 		 */
   1004 		duart->chan[0].icode = duart->chan[0].ocode = 0x2f;
   1005 		duart->chan[1].icode = duart->chan[1].ocode = 0x2f;
   1006 		duart->chan[0].ispeed = duart->chan[0].ospeed = 0;
   1007 		duart->chan[1].ispeed = duart->chan[1].ospeed = 0;
   1008 
   1009 		duart->acr = 0;
   1010 		duart->acr |= ACR_CT_TCLK1;	/* timer mode 1x clk */
   1011 	}
   1012 
   1013 	if (channel == 0) {
   1014 		duart->acr |= ACR_DELTA_DCDA;	/* Set CD int */
   1015 	} else {
   1016 		duart->acr |= ACR_DELTA_DCDB;	/* Set CD int */
   1017 	}
   1018 
   1019 	if (scnsir == NULL) {
   1020 		/* software intr: calls tty code, hence IPL_TTY */
   1021 		scnsir = softint_establish(SOFTINT_SERIAL, scnsoft, NULL);
   1022 	}
   1023 
   1024 	duart_base[DU_ACR] = (duart->mode & ACR_BRG) | duart->acr;
   1025 
   1026 	if (console)
   1027 		speed = scnconsrate;
   1028 	else
   1029 		speed = scndefaultrate;
   1030 
   1031 	scn_config(unit, channel, speed, speed, MR1_PNONE | MR1_CS8, MR2_STOP1);
   1032 	if (console) {
   1033 		maj = cdevsw_lookup_major(&scn_cdevsw);
   1034 		KASSERT(maj != NODEVMAJOR);
   1035 		shutdownhook_establish(scncnreinit, NULL);
   1036 		/* Make sure console can do scncngetc */
   1037 		duart_base[DU_OPSET] = channel ? (OP_RTSB | OP_DTRB) :
   1038 			(OP_RTSA | OP_DTRA);
   1039 	}
   1040 
   1041 	/* Turn on the receiver and transmitters */
   1042 	ch_base[CH_CR] = CR_ENA_RX | CR_ENA_TX;
   1043 
   1044 	/* Set up the interrupts. */
   1045 	duart->imr |= INT_IP;
   1046 	scn_rxdisable(sc);
   1047 	splx(s);
   1048 
   1049 	if (sc->sc_swflags) {
   1050 		printf("%c flags %d", delim, sc->sc_swflags);
   1051 		delim = ',';
   1052 	}
   1053 
   1054 #ifdef KGDB
   1055 	major = cdevsw_lookup_major(&scn_cdevsw);
   1056 	KASSERT(major != NODEVMAJOR);
   1057 	if (kgdb_dev == makedev(major, unit)) {
   1058 		if (console)
   1059 			kgdb_dev = NODEV; /* can't debug over console port */
   1060 		else {
   1061 			scninit(kgdb_dev, kgdb_rate);
   1062 			scn_rxenable(sc);
   1063 			scn->sc_iskgdb = 1;
   1064 			kgdb_attach(scncngetc, scncnputc, kgdb_dev);
   1065 			if (kgdb_debug_init) {
   1066 				printf("%c ", delim);
   1067 				kgdb_connect(1);
   1068 			} else
   1069 				printf("%c kgdb enabled", delim);
   1070 			delim = ',';
   1071 		}
   1072 	}
   1073 #endif
   1074 	printf("\n");
   1075 }
   1076 
   1077 /* ARGSUSED */
   1078 int
   1079 scnopen(dev_t dev, int flags, int mode, struct lwp *l)
   1080 {
   1081 	struct tty *tp;
   1082 	int unit = DEV_UNIT(dev);
   1083 	struct scn_softc *sc;
   1084 	int error = 0;
   1085 
   1086 	if (unit >= scn_cd.cd_ndevs)
   1087 		return ENXIO;
   1088 	sc = SOFTC(unit);
   1089 	if (!sc)
   1090 		return ENXIO;
   1091 
   1092 	tp = sc->sc_tty;
   1093 	if (!tp) {
   1094 		tp = tty_alloc();
   1095 		sc->sc_tty = sc->sc_duart->chan[sc->sc_channel].tty = tp;
   1096 		tty_attach(tp);
   1097 	}
   1098 
   1099 	tp->t_oproc = scnstart;
   1100 	tp->t_param = scnparam;
   1101 	tp->t_hwiflow = scnhwiflow;
   1102 	tp->t_dev = dev;
   1103 
   1104 	if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
   1105 		return (EBUSY);
   1106 
   1107 	mutex_spin_enter(&tty_lock);
   1108 
   1109 	if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
   1110 		ttychars(tp);
   1111 		tp->t_iflag = TTYDEF_IFLAG;
   1112 		tp->t_oflag = TTYDEF_OFLAG;
   1113 		tp->t_cflag = SCNDEF_CFLAG;
   1114 
   1115 		sc->sc_rx_blocked = 0;
   1116 
   1117 		if (sc->sc_swflags & SCN_SW_CLOCAL)
   1118 			tp->t_cflag |= CLOCAL;
   1119 		if (sc->sc_swflags & SCN_SW_CRTSCTS)
   1120 			tp->t_cflag |= CCTS_OFLOW | CRTS_IFLOW;
   1121 		tp->t_lflag = TTYDEF_LFLAG;
   1122 		if (sc->sc_isconsole)
   1123 			tp->t_ispeed = tp->t_ospeed = scnconsrate;
   1124 		else
   1125 			tp->t_ispeed = tp->t_ospeed = scndefaultrate;
   1126 		scnparam(tp, &tp->t_termios);
   1127 		ttsetwater(tp);
   1128 
   1129 		/* Turn on DTR and RTS. */
   1130 		SCN_OP_BIS(sc, sc->sc_op_rts | sc->sc_op_dtr);
   1131 
   1132 		/* enable receiver interrupts */
   1133 		scn_rxenable(sc);
   1134 
   1135 		/* set carrier state; */
   1136 		if ((sc->sc_swflags & SCN_SW_SOFTCAR) || /* check ttyflags */
   1137 		    SCN_DCD(sc) ||			 /* check h/w */
   1138 		    DEV_DIALOUT(dev))
   1139 			tp->t_state |= TS_CARR_ON;
   1140 		else
   1141 			tp->t_state &= ~TS_CARR_ON;
   1142 	}
   1143 
   1144 	mutex_spin_exit(&tty_lock);
   1145 
   1146 	error = ttyopen(tp, SCN_DIALOUT(sc), flags & O_NONBLOCK);
   1147 if (error) printf("ttyopen failed line %d, error %d\n", __LINE__, error);
   1148 	if (error)
   1149 		goto bad;
   1150 
   1151 	error = (*tp->t_linesw->l_open) (dev, tp);
   1152 if (error) printf("l_open failed line %d, error %d\n", __LINE__, error);
   1153 	if (error)
   1154 		goto bad;
   1155 
   1156 	return (0);
   1157 
   1158 bad:
   1159 	if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
   1160 		scn_rxdisable(sc);
   1161 		SCN_OP_BIC(sc, sc->sc_op_rts | sc->sc_op_dtr);
   1162 	}
   1163 
   1164 	return (error);
   1165 }
   1166 
   1167 
   1168 /*ARGSUSED*/
   1169 int
   1170 scnclose(dev_t dev, int flags, int mode, struct lwp *l)
   1171 {
   1172 	int unit = DEV_UNIT(dev);
   1173 	struct scn_softc *sc = SOFTC(unit);
   1174 	struct tty *tp = sc->sc_tty;
   1175 	devmajor_t major;
   1176 
   1177 	(void)major;
   1178 
   1179 	if ((tp->t_state & TS_ISOPEN) == 0)
   1180 		return 0;
   1181 
   1182 	(*tp->t_linesw->l_close) (tp, flags);
   1183 
   1184 #ifdef KGDB
   1185 	/* do not disable interrupts if debugging */
   1186 	major = cdevsw_lookup_major(&scn_devsw);
   1187 	KASSERT(major != cdevsw_lookup_major);
   1188 	if (kgdb_dev != makedev(major, unit))
   1189 #endif
   1190 		if ((tp->t_state & TS_ISOPEN) == 0) {
   1191 			scn_rxdisable(sc);
   1192 		}
   1193 	if ((tp->t_cflag & HUPCL) && (sc->sc_swflags & SCN_SW_SOFTCAR) == 0) {
   1194 		SCN_OP_BIC(sc, sc->sc_op_dtr);
   1195 		/* hold low for 1 second */
   1196 		tsleep(sc, TTIPRI, ttclos, hz);
   1197 	}
   1198 	SCN_CLRDIALOUT(sc);
   1199 	ttyclose(tp);
   1200 
   1201 #if 0
   1202 	if ((tp->t_state & TS_ISOPEN) == 0) {
   1203 		tty_free(tp);
   1204 		sc->sc_tty = (struct tty *) NULL;
   1205 	}
   1206 #endif
   1207 
   1208 	return (0);
   1209 }
   1210 
   1211 int
   1212 scnread(dev_t dev, struct uio *uio, int flags)
   1213 {
   1214 	struct scn_softc *sc = SOFTC(DEV_UNIT(dev));
   1215 	struct tty *tp = sc->sc_tty;
   1216 
   1217 	return ((*tp->t_linesw->l_read) (tp, uio, flags));
   1218 }
   1219 
   1220 int
   1221 scnwrite(dev_t dev, struct uio *uio, int flags)
   1222 {
   1223 	struct scn_softc *sc = SOFTC(DEV_UNIT(dev));
   1224 	struct tty *tp = sc->sc_tty;
   1225 
   1226 	return ((*tp->t_linesw->l_write) (tp, uio, flags));
   1227 }
   1228 
   1229 int
   1230 scnpoll(dev_t dev, int events, struct lwp *l)
   1231 {
   1232 	struct scn_softc *sc = SOFTC(DEV_UNIT(dev));
   1233 	struct tty *tp = sc->sc_tty;
   1234 
   1235 	return ((*tp->t_linesw->l_poll)(tp, events, l));
   1236 }
   1237 
   1238 struct tty *
   1239 scntty(dev_t dev)
   1240 {
   1241 	struct scn_softc *sc = SOFTC(DEV_UNIT(dev));
   1242 
   1243 	return sc->sc_tty;
   1244 }
   1245 
   1246 /* Worker routines for interrupt processing */
   1247 static inline void
   1248 dcd_int(struct scn_softc *sc, struct tty *tp, u_char new)
   1249 {
   1250 
   1251 	if (sc->sc_swflags & SCN_SW_SOFTCAR)
   1252 		return;
   1253 
   1254 #if 0
   1255 	printf("scn%d: dcd_int ip %x SCN_DCD %x new %x ipcr %x\n",
   1256 	    sc->unit,
   1257 	    sc->sc_duart->base[DU_IP],
   1258 	    SCN_DCD(sc),
   1259 	    new,
   1260 	    sc->sc_duart->base[DU_IPCR]
   1261 	    );
   1262 #endif
   1263 
   1264 /* XXX set some flag to have some lower (soft) int call line discipline? */
   1265 	if (!(*tp->t_linesw->l_modem) (tp, new == 0? 1: 0)) {
   1266 		SCN_OP_BIC(sc, sc->sc_op_rts | sc->sc_op_dtr);
   1267 	}
   1268 }
   1269 
   1270 /*
   1271  * Print out a ring or fifo overrun error message.
   1272  */
   1273 static void
   1274 scnoverrun(int unit, long *ptime, const char *what)
   1275 {
   1276 
   1277 	if (*ptime != time_second) {
   1278 		*ptime = time_second;
   1279 		log(LOG_WARNING, "scn%d: %s overrun\n", unit, what);
   1280 	}
   1281 }
   1282 
   1283 /*
   1284  * Try to block or unblock input using hardware flow-control.
   1285  * This is called by kern/tty.c if MDMBUF|CRTSCTS is set, and
   1286  * if this function returns non-zero, the TS_TBLOCK flag will
   1287  * be set or cleared according to the "stop" arg passed.
   1288  */
   1289 int
   1290 scnhwiflow(struct tty *tp, int stop)
   1291 {
   1292 	int unit = DEV_UNIT(tp->t_dev);
   1293 	struct scn_softc *sc = SOFTC(unit);
   1294 	int s;
   1295 
   1296 	s = splrtty();
   1297 	if (!stop) {
   1298 		if (sc->sc_rbput - sc->sc_rbget - 1) {
   1299 			setsoftscn();
   1300 		}
   1301 	}
   1302 	splx(s);
   1303 	return 1;
   1304 }
   1305 
   1306 static int
   1307 scnintr(void *arg)
   1308 {
   1309 	struct duart *duart = arg;
   1310 	struct scn_softc *sc0 = duart->chan[0].sc;
   1311 	struct scn_softc *sc1 = duart->chan[1].sc;
   1312 
   1313 	struct tty *tp0 = (sc0 != NULL) ? sc0->sc_tty : NULL;
   1314 	struct tty *tp1 = (sc1 != NULL) ? sc1->sc_tty : NULL;
   1315 
   1316 	char rs_work;
   1317 	u_char rs_stat;
   1318 	u_char rs_ipcr;
   1319 
   1320 	/* Check for RX interrupts first, since we cannot distinguish by irq. */
   1321 	scnrxintr(duart);
   1322 
   1323 	do {
   1324 		/* Loop to pick up ALL pending interrupts for device. */
   1325 		rs_work = false;
   1326 		rs_stat = duart->base[DU_ISR];
   1327 
   1328 /* channel a */
   1329 		if (tp0 != NULL) {
   1330 			if ((rs_stat & INT_TXA) && (tp0->t_state & TS_BUSY)) {
   1331 				/* output char done. */
   1332 				tp0->t_state &= ~(TS_BUSY | TS_FLUSH);
   1333 
   1334 				/* disable tx ints */
   1335 				duart->imr &= ~sc0->sc_tx_int;
   1336 				duart->base[DU_IMR] = duart->imr;
   1337 
   1338 				if (sc0->sc_heldchanges) {
   1339 					scn_setchip(sc0);
   1340 				}
   1341 
   1342 				(*tp0->t_linesw->l_start) (tp0);
   1343 				rs_work = true;
   1344 			}
   1345 		}
   1346 		/* channel b */
   1347 		if (tp1 != NULL) {
   1348 			if ((rs_stat & INT_TXB) && (tp1->t_state & TS_BUSY)) {
   1349 				/* output char done. */
   1350 				tp1->t_state &= ~(TS_BUSY | TS_FLUSH);
   1351 
   1352 				/* disable tx ints */
   1353 				duart->imr &= ~sc1->sc_tx_int;
   1354 				duart->base[DU_IMR] = duart->imr;
   1355 
   1356 				if (sc1->sc_heldchanges) {
   1357 					scn_setchip(sc1);
   1358 				}
   1359 
   1360 				(*tp1->t_linesw->l_start) (tp1);
   1361 				rs_work = true;
   1362 			}
   1363 		}
   1364 		if (rs_stat & INT_IP) {
   1365 			rs_work = true;
   1366 			rs_ipcr = duart->base[DU_IPCR];
   1367 
   1368 			if (rs_ipcr & IPCR_DELTA_DCDA && tp0 != NULL) {
   1369 				dcd_int(sc0, tp0, rs_ipcr & IPCR_DCDA);
   1370 			}
   1371 			if (rs_ipcr & IPCR_DELTA_DCDB && tp1 != NULL) {
   1372 				dcd_int(sc1, tp1, rs_ipcr & IPCR_DCDB);
   1373 			}
   1374 		}
   1375 	} while (rs_work);
   1376 
   1377 	return (1);	/* ? */
   1378 }
   1379 
   1380 /*
   1381  * Handle rxrdy/ffull interrupt: QUICKLY poll both channels (checking
   1382  * status first) and stash data in a ring buffer.  Ring buffer scheme
   1383  * borowed from sparc/zs.c requires NO interlock on data!
   1384  *
   1385  * This interrupt should NOT be included in spltty() mask since it
   1386  * invokes NO tty code!  The whole point is to allow tty input as much
   1387  * of the time as possible, while deferring "heavy" character
   1388  * processing until later.
   1389  *
   1390  * see scn.hw.README and scnsoft() for more info.
   1391  *
   1392  * THIS ROUTINE SHOULD BE KEPT AS CLEAN AS POSSIBLE!!
   1393  * IT'S A CANDIDATE FOR RECODING IN ASSEMBLER!!
   1394  */
   1395 static inline int
   1396 scn_rxintr(struct scn_softc *sc)
   1397 {
   1398 	char sr;
   1399 	int i, n;
   1400 	int work;
   1401 
   1402 	work = 0;
   1403 	i = sc->sc_rbput;
   1404 	while (work <= 10) {
   1405 #define SCN_GETCH(SC) \
   1406 		sr = (SC)->sc_chbase[CH_SR]; \
   1407 		if ((sr & SR_RX_RDY) == 0) \
   1408 			break; \
   1409 		if (sr & (SR_PARITY | SR_FRAME | SR_BREAK | SR_OVERRUN)) \
   1410 			goto exception; \
   1411 		work++; \
   1412 		(SC)->sc_rbuf[i++ & SCN_RING_MASK] = (SC)->sc_chbase[CH_DAT]
   1413 
   1414 		SCN_GETCH(sc); SCN_GETCH(sc); SCN_GETCH(sc);
   1415 		/* XXX more here if 26C92? -plb */
   1416 		continue;
   1417 	exception:
   1418 #if defined(DDB)
   1419 		if (sc->sc_isconsole && (sr & SR_BREAK)) {
   1420 			Debugger();
   1421 			sr = sc->sc_chbase[CH_SR];
   1422 		}
   1423 #endif
   1424 #if defined(KGDB)
   1425 		if (sc->sc_iskgdb && (sr & SR_RX_RDY)) {
   1426 			kgdb_connect(1);
   1427 			sr = sc->sc_chbase[CH_SR];
   1428 		}
   1429 #endif
   1430 		work++;
   1431 		sc->sc_rbuf[i++ & SCN_RING_MASK] = (sr << 8) | sc->sc_chbase[CH_DAT];
   1432 		sc->sc_chbase[CH_CR] = CR_CMD_RESET_ERR;	/* resets break? */
   1433 		RECOVER();
   1434 	}
   1435 	/*
   1436 	 * If ring is getting too full, try to block input.
   1437 	 */
   1438 	n = i - sc->sc_rbget;
   1439 	if (sc->sc_rbhiwat && (n > sc->sc_rbhiwat)) {
   1440 		/* If not CRTSCTS sc_rbhiwat is such that this
   1441 		 *  never happens.
   1442 		 * Clear RTS
   1443 		 */
   1444 		SCN_OP_BIC(sc, sc->sc_op_rts);
   1445 		sc->sc_rx_blocked = 1;
   1446 	}
   1447 	sc->sc_rbput = i;
   1448 
   1449 	return work;
   1450 }
   1451 
   1452 static void
   1453 scnrxintr(void *arg)
   1454 {
   1455 	struct duart *duart = arg;
   1456 	int work = 0;
   1457 
   1458 	if (duart->chan[0].sc != NULL)
   1459 		work += scn_rxintr(duart->chan[0].sc);
   1460 	if (duart->chan[1].sc != NULL)
   1461 		work += scn_rxintr(duart->chan[1].sc);
   1462 	if (work > 0) {
   1463 		setsoftscn();	/* trigger s/w intr */
   1464 #ifdef SCN_TIMING
   1465 		microtime(&tstart);
   1466 #endif
   1467 	}
   1468 }
   1469 
   1470 /*
   1471  * Here on soft interrupt (at spltty) to empty ring buffers.
   1472  *
   1473  * Dave's original scheme was to use the DUART receiver timeout
   1474  * interrupt. This requires 2692's (which my board doesn't have), and
   1475  * I also liked the idea of using the C/T to generate alternate and/or
   1476  * arbitrary bauds. -plb
   1477  *
   1478  * The ringbuffer code comes from Chris Torek's SPARC 44bsd zs driver
   1479  * (hence the LBL notice on top of this file), DOES NOT require
   1480  * interlocking with interrupt levels!
   1481  *
   1482  * The 44bsd sparc/zs driver reads the ring buffer from a separate
   1483  * zssoftint, while the SunOS 4.x zs driver appears to use
   1484  * timeout()'s.  timeouts seem to be too slow to deal with high data
   1485  * rates.  I know, I tried them.
   1486  * -plb.
   1487  */
   1488 static void
   1489 scnsoft(void *arg)
   1490 {
   1491 	int s, unit;
   1492 #ifdef SCN_TIMING
   1493 	struct timeval tend;
   1494 	u_long  t;
   1495 
   1496 	microtime(&tend);
   1497 	t = (tend.tv_sec - tstart.tv_sec) * 1000000 + (tend.tv_usec - tstart.tv_usec);
   1498 	t = (t + tick / 20) / (tick / 10);
   1499 	if (t >= NJITTER - 1) {
   1500 		t = NJITTER - 1;
   1501 	}
   1502 	scn_jitter[t]++;
   1503 #endif
   1504 
   1505 	for (unit = 0; unit < scn_cd.cd_ndevs; unit++) {
   1506 		struct scn_softc *sc;
   1507 		struct tty *tp;
   1508 		int n, get;
   1509 
   1510 		sc = SOFTC(unit);
   1511 		if (sc == NULL) {
   1512 			continue;
   1513 		}
   1514 		tp = sc->sc_tty;
   1515 #ifdef KGDB
   1516 		if (tp == NULL) {
   1517 			sc->sc_rbget = sc->sc_rbput;
   1518 			continue;
   1519 		}
   1520 #endif
   1521 		if (tp == NULL || tp->t_state & TS_TBLOCK) {
   1522 			continue;
   1523 		}
   1524 
   1525 
   1526 		get = sc->sc_rbget;
   1527 
   1528 		/* NOTE: fetch from rbput is atomic */
   1529 		while (get != (n = sc->sc_rbput)) {
   1530 			/*
   1531 			 * Compute the number of interrupts in the receive ring.
   1532 			 * If the count is overlarge, we lost some events, and
   1533 			 * must advance to the first valid one.  It may get
   1534 			 * overwritten if more data are arriving, but this is
   1535 			 * too expensive to check and gains nothing (we already
   1536 			 * lost out; all we can do at this point is trade one
   1537 			 * kind of loss for another).
   1538 			 */
   1539 			n -= get;
   1540 			if (n > SCN_RING_SIZE) {
   1541 				scnoverrun(unit, &sc->sc_rotime, "ring");
   1542 				get += n - SCN_RING_SIZE;
   1543 				n = SCN_RING_SIZE;
   1544 				sc->sc_ring_overruns++;
   1545 			}
   1546 			while (--n >= 0) {
   1547 				int c, sr;
   1548 
   1549 				if (tp->t_state & TS_TBLOCK) {
   1550 					sc->sc_rbget = get;
   1551 					goto done;
   1552 				}
   1553 				/* Race to keep ahead of incoming interrupts. */
   1554 				c = sc->sc_rbuf[get++ & SCN_RING_MASK];
   1555 
   1556 				sr = c >> 8;	/* extract status */
   1557 				c &= 0xff;	/* leave just character */
   1558 
   1559 				if (sr & SR_OVERRUN) {
   1560 					scnoverrun(unit, &sc->sc_fotime, "fifo");
   1561 					sc->sc_fifo_overruns++;
   1562 				}
   1563 				if (sr & SR_PARITY) {
   1564 					c |= TTY_PE;
   1565 					sc->sc_parity_errors++;
   1566 				}
   1567 				if (sr & SR_FRAME) {
   1568 					c |= TTY_FE;
   1569 					sc->sc_framing_errors++;
   1570 				}
   1571 				if (sr & SR_BREAK) {
   1572 #if 0
   1573 					/*
   1574 					 * See DDB_CHECK() comments in
   1575 					 * scnrxintr()
   1576 					 */
   1577 					if (sc->sc_isconsole)
   1578 						Debugger();
   1579 #endif
   1580 					c = TTY_FE | 0;
   1581 					sc->sc_breaks++;
   1582 				}
   1583 
   1584 				(*tp->t_linesw->l_rint) (c, tp);
   1585 
   1586 				if (sc->sc_rx_blocked && n < SCN_RING_THRESH) {
   1587 					s = splrtty();
   1588 					sc->sc_rx_blocked = 0;
   1589 					SCN_OP_BIS(sc, sc->sc_op_rts);
   1590 					splx(s);
   1591 				}
   1592 
   1593 			}
   1594 			sc->sc_rbget = get;
   1595 		}
   1596 	done: ;
   1597 	}
   1598 }
   1599 
   1600 /* Convert TIOCM_xxx bits to output port bits. */
   1601 static unsigned char
   1602 opbits(struct scn_softc *sc, int tioc_bits)
   1603 {
   1604 
   1605 	return ((((tioc_bits) & TIOCM_DTR) ? sc->sc_op_dtr : 0) |
   1606 	    (((tioc_bits) & TIOCM_RTS) ? sc->sc_op_rts : 0));
   1607 }
   1608 
   1609 int
   1610 scnioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l)
   1611 {
   1612 	int unit = DEV_UNIT(dev);
   1613 	struct scn_softc *sc = SOFTC(unit);
   1614 	struct tty *tp = sc->sc_tty;
   1615 	int error;
   1616 
   1617 	error = (*tp->t_linesw->l_ioctl) (tp, cmd, data, flags, l);
   1618 	if (error != EPASSTHROUGH)
   1619 		return (error);
   1620 
   1621 	error = ttioctl(tp, cmd, data, flags, l);
   1622 	if (error != EPASSTHROUGH)
   1623 		return (error);
   1624 
   1625 	switch (cmd) {
   1626 	case TIOCSBRK:
   1627 		sc->sc_chbase[CH_CR] = CR_CMD_START_BRK;
   1628 		break;
   1629 
   1630 	case TIOCCBRK:
   1631 		sc->sc_chbase[CH_CR] = CR_CMD_STOP_BRK;
   1632 		break;
   1633 
   1634 	case TIOCSDTR:
   1635 		SCN_OP_BIS(sc, sc->sc_op_dtr | sc->sc_op_rts);
   1636 		break;
   1637 
   1638 	case TIOCCDTR:
   1639 		SCN_OP_BIC(sc, sc->sc_op_dtr | sc->sc_op_rts);
   1640 		break;
   1641 
   1642 	case TIOCMSET: {
   1643 			int     s;
   1644 			unsigned char sbits, cbits;
   1645 
   1646 			/* set bits */
   1647 			sbits = opbits(sc, *(int *) data);
   1648 
   1649 			/* get bits to clear */
   1650 			cbits = ~sbits & (sc->sc_op_dtr | sc->sc_op_rts);
   1651 
   1652 			s = spltty();
   1653 			if (sbits) {
   1654 				SCN_OP_BIS(sc, sbits);
   1655 			}
   1656 			if (cbits) {
   1657 				SCN_OP_BIC(sc, cbits);
   1658 			}
   1659 			splx(s);
   1660 			break;
   1661 		}
   1662 
   1663 	case TIOCMBIS:
   1664 		SCN_OP_BIS(sc, opbits(sc, *(int *) data));
   1665 		break;
   1666 
   1667 	case TIOCMBIC:
   1668 		SCN_OP_BIC(sc, opbits(sc, *(int *) data));
   1669 		break;
   1670 
   1671 	case TIOCMGET: {
   1672 			int     bits;
   1673 			unsigned char ip;
   1674 
   1675 			/* s = spltty(); */
   1676 			ip = sc->sc_duart->base[DU_IP];
   1677 			/* splx(s); */
   1678 
   1679 			bits = 0;
   1680 			if (ip & sc->sc_ip_dcd)
   1681 				bits |= TIOCM_CD;
   1682 			if (ip & sc->sc_ip_cts)
   1683 				bits |= TIOCM_CTS;
   1684 
   1685 #if 0
   1686 			/*
   1687 			 * XXX sigh; cannot get op current state!! even if
   1688 			 * maintained in private, RTS is done in h/w!!
   1689 			 */
   1690 			unsigned char op = 0;
   1691 			if (op & sc->sc_op_dtr)
   1692 				bits |= TIOCM_DTR;
   1693 			if (op & sc->sc_op_rts)
   1694 				bits |= TIOCM_RTS;
   1695 #endif
   1696 
   1697 			*(int *) data = bits;
   1698 			break;
   1699 		}
   1700 
   1701 	case TIOCGFLAGS:{
   1702 			int     bits = 0;
   1703 
   1704 			if (sc->sc_swflags & SCN_SW_SOFTCAR)
   1705 				bits |= TIOCFLAG_SOFTCAR;
   1706 			if (sc->sc_swflags & SCN_SW_CLOCAL)
   1707 				bits |= TIOCFLAG_CLOCAL;
   1708 			if (sc->sc_swflags & SCN_SW_CRTSCTS)
   1709 				bits |= TIOCFLAG_CRTSCTS;
   1710 			if (sc->sc_swflags & SCN_SW_MDMBUF)
   1711 				bits |= TIOCFLAG_MDMBUF;
   1712 
   1713 			*(int *) data = bits;
   1714 			break;
   1715 		}
   1716 	case TIOCSFLAGS:{
   1717 			int     userbits, driverbits = 0;
   1718 
   1719 			error = kauth_authorize_device_tty(l->l_cred,
   1720 			    KAUTH_DEVICE_TTY_PRIVSET, tp);
   1721 			if (error != 0)
   1722 				return (EPERM);
   1723 
   1724 			userbits = *(int *) data;
   1725 			if (userbits & TIOCFLAG_SOFTCAR)
   1726 				driverbits |= SCN_SW_SOFTCAR;
   1727 			if (userbits & TIOCFLAG_CLOCAL)
   1728 				driverbits |= SCN_SW_CLOCAL;
   1729 			if (userbits & TIOCFLAG_CRTSCTS)
   1730 				driverbits |= SCN_SW_CRTSCTS;
   1731 			if (userbits & TIOCFLAG_MDMBUF)
   1732 				driverbits |= SCN_SW_MDMBUF;
   1733 
   1734 			sc->sc_swflags = driverbits;
   1735 
   1736 			break;
   1737 		}
   1738 
   1739 	default:
   1740 		return (EPASSTHROUGH);
   1741 	}
   1742 	return (0);
   1743 }
   1744 
   1745 int
   1746 scnparam(struct tty *tp, struct termios *t)
   1747 {
   1748 	int cflag = t->c_cflag;
   1749 	int unit = DEV_UNIT(tp->t_dev);
   1750 	char mr1, mr2;
   1751 	int error;
   1752 	struct scn_softc *sc = SOFTC(unit);
   1753 
   1754 	/* Is this a hang up? */
   1755 	if (t->c_ospeed == B0) {
   1756 		SCN_OP_BIC(sc, sc->sc_op_dtr);
   1757 		/* leave DTR down. see comment in scnclose() -plb */
   1758 		return (0);
   1759 	}
   1760 	mr1 = mr2 = 0;
   1761 
   1762 	/* Parity? */
   1763 	if (cflag & PARENB) {
   1764 		if ((cflag & PARODD) == 0)
   1765 			mr1 |= MR1_PEVEN;
   1766 		else
   1767 			mr1 |= MR1_PODD;
   1768 	} else
   1769 		mr1 |= MR1_PNONE;
   1770 
   1771 	/* Stop bits. */
   1772 	if (cflag & CSTOPB)
   1773 		mr2 |= MR2_STOP2;
   1774 	else
   1775 		mr2 |= MR2_STOP1;
   1776 
   1777 	/* Data bits. */
   1778 	switch (cflag & CSIZE) {
   1779 	case CS5:
   1780 		mr1 |= MR1_CS5;
   1781 		break;
   1782 	case CS6:
   1783 		mr1 |= MR1_CS6;
   1784 		break;
   1785 	case CS7:
   1786 		mr1 |= MR1_CS7;
   1787 		break;
   1788 	case CS8:
   1789 	default:
   1790 		mr1 |= MR1_CS8;
   1791 		break;
   1792 	}
   1793 
   1794 	if (cflag & CCTS_OFLOW)
   1795 		mr2 |= MR2_TXCTS;
   1796 
   1797 	if (cflag & CRTS_IFLOW) {
   1798 		mr1 |= MR1_RXRTS;
   1799 		sc->sc_rbhiwat = SCN_RING_HIWAT;
   1800 	} else {
   1801 		sc->sc_rbhiwat = 0;
   1802 	}
   1803 
   1804 	error = scn_config(unit, sc->sc_channel, t->c_ispeed,
   1805 	    t->c_ospeed, mr1, mr2);
   1806 
   1807 	/* If successful, copy to tty */
   1808 	if (!error) {
   1809 		tp->t_ispeed = t->c_ispeed;
   1810 		tp->t_ospeed = t->c_ospeed;
   1811 		tp->t_cflag = cflag;
   1812 	}
   1813 	return (error);
   1814 }
   1815 
   1816 /*
   1817  * Start or restart a transmission.
   1818  */
   1819 void
   1820 scnstart(struct tty *tp)
   1821 {
   1822 	int s, c;
   1823 	int unit = DEV_UNIT(tp->t_dev);
   1824 	struct scn_softc *sc = SOFTC(unit);
   1825 
   1826 	s = spltty();
   1827 	if (tp->t_state & (TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
   1828 		goto out;
   1829 	if (!ttypull(tp))
   1830 		goto out;
   1831 
   1832 	tp->t_state |= TS_BUSY;
   1833 
   1834 	while (sc->sc_chbase[CH_SR] & SR_TX_RDY) {
   1835 		if ((c = getc(&tp->t_outq)) == -1)
   1836 			break;
   1837 		sc->sc_chbase[CH_DAT] = c;
   1838 	}
   1839 	sc->sc_duart->imr |= (sc->sc_tx_int | sc->sc_rx_int);
   1840 	sc->sc_duart->base[DU_IMR] = sc->sc_duart->imr;
   1841 
   1842 out:
   1843 	splx(s);
   1844 }
   1845 
   1846 /*
   1847  * Stop output on a line.
   1848  */
   1849 /*ARGSUSED*/
   1850 void
   1851 scnstop(struct tty *tp, int flags)
   1852 {
   1853 	int s;
   1854 
   1855 	s = spltty();
   1856 	if (tp->t_state & TS_BUSY) {
   1857 		if ((tp->t_state & TS_TTSTOP) == 0)
   1858 			tp->t_state |= TS_FLUSH;
   1859 	}
   1860 	splx(s);
   1861 }
   1862 
   1863 /*
   1864  * Following are all routines needed for SCN to act as console.
   1865  */
   1866 
   1867 void
   1868 scncnprobe(struct consdev *cn)
   1869 {
   1870 }
   1871 
   1872 void
   1873 scncnreinit(void *v)
   1874 {
   1875 	volatile u_char *du_base =
   1876 	    (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004);
   1877 
   1878 	du_base[DU_OPSET] =
   1879 	    SCN_CONSCHAN ? (OP_RTSB | OP_DTRB) : (OP_RTSA | OP_DTRA);
   1880 }
   1881 
   1882 void
   1883 scncninit(struct consdev *cn)
   1884 {
   1885 	devmajor_t major;
   1886 
   1887 	/* initialize required fields */
   1888 	major = cdevsw_lookup_major(&scn_cdevsw);
   1889 	KASSERT(major != NODEV);
   1890 	cn->cn_dev = makedev(major, SCN_CONSOLE);
   1891 	cn->cn_pri = CN_REMOTE;
   1892 
   1893 	scninit(cn->cn_dev, scnconsrate);
   1894 }
   1895 
   1896 /* Used by scncninit and kgdb startup. */
   1897 int
   1898 scninit(dev_t dev, int rate)
   1899 {
   1900 /* XXX - maintain PROM's settings */
   1901 #if 0
   1902 	volatile u_char *du_base =
   1903 	    (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004);
   1904 	int unit = DEV_UNIT(dev);
   1905 
   1906 	du_base[DU_OPSET] =
   1907 	    SCN_CONSCHAN ? (OP_RTSB | OP_DTRB) : (OP_RTSA | OP_DTRA);
   1908 	scn_config(unit, SCN_CONSCHAN, rate, rate,
   1909 	    MR1_PNONE | MR1_CS8, MR2_STOP1);
   1910 #endif
   1911 	return (0);
   1912 }
   1913 
   1914 /*
   1915  * Console kernel input character routine.
   1916  */
   1917 int
   1918 scncngetc(dev_t dev)
   1919 {
   1920 	volatile u_char *ch_base =
   1921 	    (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004);
   1922 	char c;
   1923 	int s;
   1924 
   1925 	s = spltty();
   1926 
   1927 	while ((ch_base[CH_SR] & SR_RX_RDY) == 0)
   1928 		;
   1929 	c = ch_base[CH_DAT];
   1930 
   1931 	splx(s);
   1932 	return c;
   1933 }
   1934 
   1935 void
   1936 scncnpollc(dev_t dev, int on)
   1937 {
   1938 }
   1939 
   1940 /*
   1941  * Console kernel output character routine.
   1942  */
   1943 void
   1944 scncnputc(dev_t dev, int c)
   1945 {
   1946 	volatile u_char *ch_base =
   1947 	    (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004);
   1948 	volatile u_char *du_base =
   1949 	    (volatile u_char *)MIPS_PHYS_TO_KSEG1(0x1fb80004);
   1950 	int s;
   1951 
   1952 	s = spltty();
   1953 
   1954 	if (c == '\n')
   1955 		scncnputc(dev, '\r');
   1956 
   1957 	while ((ch_base[CH_SR] & SR_TX_RDY) == 0)
   1958 		;
   1959 	ch_base[CH_DAT] = c;
   1960 	while ((ch_base[CH_SR] & SR_TX_RDY) == 0)
   1961 		;
   1962 	du_base[DU_ISR];
   1963 
   1964 	splx(s);
   1965 }
   1966