exception_vector.S revision 1.12
1/* $NetBSD: exception_vector.S,v 1.12 2003/11/24 04:16:51 uwe Exp $ */ 2 3/*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 4. Neither the name of The NetBSD Foundation nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36#include "opt_cputype.h" 37#include "opt_ddb.h" 38#include "assym.h" 39 40#include <sh3/param.h> 41#include <sh3/asm.h> 42#include <sh3/locore.h> 43#include <sh3/exception.h> 44#include <sh3/ubcreg.h> 45#include <sh3/mmu_sh3.h> 46#include <sh3/mmu_sh4.h> 47 48__KERNEL_RCSID(0, "$NetBSD: exception_vector.S,v 1.12 2003/11/24 04:16:51 uwe Exp $") 49 50 51/* 52 * Exception vectors. following routines are copied to vector addreses. 53 * sh_vector_generic: VBR + 0x100 54 * sh_vector_tlbmiss: VBR + 0x400 55 * sh_vector_interrupt: VBR + 0x600 56 */ 57 58/* 59 * void sh_vector_generic(void) __attribute__((__noreturn__)): 60 * copied to VBR+0x100. This code should be relocatable and max 384 61 * instructions. 62 */ 63 .globl _C_LABEL(sh_vector_generic), _C_LABEL(sh_vector_generic_end) 64 .text 65 .align 2 66_C_LABEL(sh_vector_generic): 67 __EXCEPTION_ENTRY 68 __INTR_MASK(r0, r1) 69 /* Identify exception cause */ 70 MOV (EXPEVT, r0) 71 mov.l @r0, r0 72 mov.l r0, @(TF_EXPEVT, r14) /* trapframe->tf_expevt = EXPEVT */ 73 /* Get curlwp */ 74 mov.l 3f, r1 75 mov.l @r1, r4 /* 1st arg */ 76 /* Get TEA */ 77 MOV (TEA, r1) 78 mov.l @r1, r6 /* 3rd arg */ 79 /* Check TLB exception or not */ 80 mov.l _L.TLB_PROT_ST, r1 81 cmp/hi r1, r0 82 bt 1f 83 84 /* tlb_exception(curlwp, trapframe, trunc_page(TEA)); */ 85 mov.l _L.VPN_MASK, r1 86 and r1, r6 /* va = trunc_page(va) */ 87 __EXCEPTION_UNBLOCK(r0, r1) 88 mov.l _L.tlb, r0 89 jsr @r0 90 mov r14, r5 /* 2nd arg */ 91 bra 2f 92 nop 93 94 /* general_exception(curlwp, trapframe, TEA); */ 951: mov r4, r8 96#ifdef DDB 97 mov #0, r2 98 MOV (BBRA, r1) 99 mov.w r2, @r1 /* disable UBC */ 100 mov.l r2, @(TF_UBC, r14) /* clear trapframe->tf_ubc */ 101#endif /* DDB */ 102 __EXCEPTION_UNBLOCK(r0, r1) 103 mov.l _L.general, r0 104 jsr @r0 105 mov r14, r5 /* 2nd arg */ 106 107 /* Check for ASTs on exit to user mode. */ 108 mov r8, r4 109 mov.l _L.ast, r0 110 jsr @r0 111 mov r14, r5 112#ifdef DDB /* BBRA = trapframe->tf_ubc */ 113 __EXCEPTION_BLOCK(r0, r1) 114 mov.l @(TF_UBC, r14), r0 115 MOV (BBRA, r1) 116 mov.w r0, @r1 117#endif /* DDB */ 1182: __EXCEPTION_RETURN 119 /* NOTREACHED */ 120 .align 2 1213: .long _C_LABEL(curlwp) 122REG_SYMBOL(EXPEVT) 123REG_SYMBOL(BBRA) 124REG_SYMBOL(TEA) 125_L.tlb: .long _C_LABEL(tlb_exception) 126_L.general: .long _C_LABEL(general_exception) 127_L.ast: .long _C_LABEL(ast) 128_L.TLB_PROT_ST: .long 0xc0 129_L.VPN_MASK: .long 0xfffff000 130_C_LABEL(sh_vector_generic_end): .long 0 131 132#ifdef SH3 133/* 134 * void sh3_vector_tlbmiss(void) __attribute__((__noreturn__)): 135 * copied to VBR+0x400. This code should be relocatable and max 256 136 * instructions. 137 */ 138 .globl _C_LABEL(sh3_vector_tlbmiss), _C_LABEL(sh3_vector_tlbmiss_end) 139 .text 140 .align 2 141_C_LABEL(sh3_vector_tlbmiss): 142 __EXCEPTION_ENTRY 143 mov.l _L.TEA3, r0 144 mov.l @r0, r6 145 mov.l __L.VPN_MASK, r1 146 and r1, r6 /* 3rd arg */ 147#if !defined(P1_STACK) 148 /* Load kernel stack */ 149 tst r6, r6 /* check VPN == 0 */ 150 bt 6f 151 mov.l _L.CURUPTE, r1 152 mov.l @r1, r1 153 mov #UPAGES,r3 154 mov #1, r2 1554: mov.l @r1+, r7 156 cmp/eq r7, r6 /* md_upte.addr: u-area VPN */ 157 bt 5f 158 add #4, r1 /* skip md_upte.data */ 159 cmp/eq r2, r3 160 bf/s 4b 161 add #1, r2 162 bra 6f 163 nop 1645: mov.l @r1, r2 /* md_upte.data: u-area PTE */ 165 mov.l _L.PTEL, r1 166 mov.l r2, @r1 167 mov.l _L.PTEH, r1 168 mov.l @r1, r2 169 mov.l __L.VPN_MASK, r0 170 and r2, r0 171 mov.l r0, @r1 /* ASID 0 */ 172 ldtlb 173 mov.l r2, @r1 /* restore ASID */ 174 bra 3f 175 nop 176#endif /* !P1_STACK */ 1776: mov.l _L.EXPEVT3, r0 178 mov.l @r0, r0 179 mov.l r0, @(TF_EXPEVT, r14) /* trapframe->tf_expevt = EXPEVT */ 180 mov.l 2f, r0 181 mov.l @r0, r4 /* 1st arg */ 182 __INTR_MASK(r0, r1) 183 __EXCEPTION_UNBLOCK(r0, r1) 184 mov.l 1f, r0 185 jsr @r0 186 mov r14, r5 /* 2nd arg */ 1873: __EXCEPTION_RETURN 188 .align 2 1892: .long _C_LABEL(curlwp) 1901: .long _C_LABEL(tlb_exception) 191_L.EXPEVT3: .long SH3_EXPEVT 192_L.TEA3: .long SH3_TEA 193_L.PTEL: .long SH3_PTEL 194_L.PTEH: .long SH3_PTEH 195__L.VPN_MASK: .long 0xfffff000 196_L.CURUPTE: .long _C_LABEL(curupte) 197 .align 2 198_C_LABEL(sh3_vector_tlbmiss_end): .long 0 199#endif /* SH3 */ 200 201#ifdef SH4 202/* 203 * void sh4_vector_tlbmiss(void) __attribute__((__noreturn__)): 204 * copied to VBR+0x400. This code should be relocatable and max 256 205 * instructions. 206 */ 207 .globl _C_LABEL(sh4_vector_tlbmiss), _C_LABEL(sh4_vector_tlbmiss_end) 208 .text 209 .align 2 210_C_LABEL(sh4_vector_tlbmiss): 211 __EXCEPTION_ENTRY 212 mov.l _L.TEA4, r0 213 mov.l @r0, r6 214 mov.l ___L.VPN_MASK, r1 215 and r1, r6 /* va = trunc_page(va) */ 216 mov.l _L.EXPEVT4, r0 217 mov.l @r0, r0 218 mov.l r0, @(TF_EXPEVT, r14) /* trapframe->tf_expevt = EXPEVT */ 219 mov.l 2f, r0 220 mov.l @r0, r4 /* 1st arg */ 221 __INTR_MASK(r0, r1) 222 __EXCEPTION_UNBLOCK(r0, r1) 223 mov.l 1f, r0 224 jsr @r0 225 mov r14, r5 /* 2nd arg */ 226 __EXCEPTION_RETURN 227 .align 2 2281: .long _C_LABEL(tlb_exception) 2292: .long _C_LABEL(curlwp) 230_L.EXPEVT4: .long SH4_EXPEVT 231_L.TEA4: .long SH4_TEA 232___L.VPN_MASK: .long 0xfffff000 233_C_LABEL(sh4_vector_tlbmiss_end): .long 0 234#endif /* SH4 */ 235 236/* 237 * void sh_vector_interrupt(void) __attribute__((__noreturn__)): 238 * copied to VBR+0x600. This code should be relocatable. 239 */ 240 .globl _C_LABEL(sh_vector_interrupt), _C_LABEL(sh_vector_interrupt_end) 241 .align 2 242 .text 243_C_LABEL(sh_vector_interrupt): 244 __EXCEPTION_ENTRY 245 xor r0, r0 246 mov.l r0, @(TF_EXPEVT, r14) /* (for debug) */ 247 stc r0_bank,r6 /* ssp */ 248 /* Enable exception for P3 access */ 249 __INTR_MASK(r0, r1) 250 __EXCEPTION_UNBLOCK(r0, r1) 251 /* uvmexp.intrs++ */ 252 mov.l __L.uvmexp.intrs, r0 253 mov.l @r0, r1 254 add #1 r1 255 mov.l r1, @r0 256 /* Dispatch interrupt handler */ 257 mov.l __L.intc_intr, r0 258 jsr @r0 /* intc_intr(ssr, spc, ssp) */ 259 nop 260 /* Check for ASTs on exit to user mode. */ 261 mov.l 1f, r0 262 mov.l @r0, r4 /* 1st arg */ 263 mov.l __L.ast, r0 264 jsr @r0 265 mov r14, r5 /* 2nd arg */ 266 __EXCEPTION_RETURN 267 .align 2 2681: .long _C_LABEL(curlwp) 269__L.intc_intr: .long _C_LABEL(intc_intr) 270__L.ast: .long _C_LABEL(ast) 271__L.uvmexp.intrs: .long _C_LABEL(uvmexp) + UVMEXP_INTRS 272_C_LABEL(sh_vector_interrupt_end): .long 0 273