pci_machdep.h revision 1.3
11.3Sbouyer/* $NetBSD: pci_machdep.h,v 1.3 2005/04/16 22:49:38 bouyer Exp $ */
21.2Sbouyer
31.2Sbouyer/*
41.2Sbouyer * Copyright (c) 2005 Manuel Bouyer.
51.2Sbouyer *
61.2Sbouyer * Redistribution and use in source and binary forms, with or without
71.2Sbouyer * modification, are permitted provided that the following conditions
81.2Sbouyer * are met:
91.2Sbouyer * 1. Redistributions of source code must retain the above copyright
101.2Sbouyer *    notice, this list of conditions and the following disclaimer.
111.2Sbouyer * 2. Redistributions in binary form must reproduce the above copyright
121.2Sbouyer *    notice, this list of conditions and the following disclaimer in the
131.2Sbouyer *    documentation and/or other materials provided with the distribution.
141.2Sbouyer * 3. All advertising materials mentioning features or use of this software
151.2Sbouyer *    must display the following acknowledgement:
161.2Sbouyer *      This product includes software developed by Manuel Bouyer.
171.2Sbouyer * 4. The name of the author may not be used to endorse or promote products
181.2Sbouyer *    derived from this software without specific prior written permission.
191.2Sbouyer *
201.2Sbouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
211.2Sbouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
221.2Sbouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
231.2Sbouyer * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
241.2Sbouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
251.2Sbouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
261.2Sbouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
271.2Sbouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
281.2Sbouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
291.2Sbouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
301.2Sbouyer *
311.2Sbouyer */
321.2Sbouyer
331.2Sbouyer#ifndef _XEN_PCI_MACHDEP_H_
341.2Sbouyer#define _XEN_PCI_MACHDEP_H_
351.2Sbouyer
361.2Sbouyerextern struct x86_bus_dma_tag pci_bus_dma_tag;
371.2Sbouyerextern u_int32_t pci_bus_attached[];
381.2Sbouyer
391.2Sbouyer/* Some values appropriate for x86, from x86/include/pci_machdep.h */
401.2Sbouyer#define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
411.2Sbouyer#define PCI_PREFER_IOSPACE
421.2Sbouyer
431.2Sbouyer/* types provided to MI PCI */
441.2Sbouyerstruct xen_pci_tag {
451.2Sbouyer	u_int8_t bus;
461.2Sbouyer	u_int8_t device;
471.2Sbouyer	u_int8_t function;
481.2Sbouyer	u_int8_t _pad; /* pad to 32bits */
491.2Sbouyer};
501.2Sbouyer
511.2Sbouyerstruct xen_intr_handle {
521.2Sbouyer	int pirq;
531.3Sbouyer	int evtch;
541.2Sbouyer};
551.2Sbouyer
561.2Sbouyertypedef struct xen_pci_tag pcitag_t;
571.2Sbouyertypedef void *pci_chipset_tag_t;
581.2Sbouyertypedef struct xen_intr_handle pci_intr_handle_t;
591.2Sbouyer
601.2Sbouyer/* functions provided to MI PCI */
611.2Sbouyerstruct pci_attach_args;
621.2Sbouyer
631.2Sbouyervoid		pci_attach_hook(struct device *, struct device *,
641.2Sbouyer		    struct pcibus_attach_args *);
651.2Sbouyerint		pci_bus_maxdevs(pci_chipset_tag_t, int);
661.2Sbouyerpcitag_t	pci_make_tag(pci_chipset_tag_t, int, int, int);
671.2Sbouyervoid		pci_decompose_tag(pci_chipset_tag_t, pcitag_t,
681.2Sbouyer		    int *, int *, int *);
691.2Sbouyerpcireg_t	pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
701.2Sbouyervoid		pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
711.2Sbouyer		    pcireg_t);
721.2Sbouyerint		pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
731.2Sbouyerconst char	*pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
741.2Sbouyerconst struct evcnt *pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t);
751.2Sbouyervoid		*pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
761.2Sbouyer		    int, int (*)(void *), void *);
771.2Sbouyervoid		pci_intr_disestablish(pci_chipset_tag_t, void *);
781.2Sbouyer
791.2Sbouyer/*
801.2Sbouyer * Section 6.2.4, `Miscellaneous Functions' of the PCI Specification,
811.2Sbouyer * says that 255 means `unknown' or `no connection' to the interrupt
821.2Sbouyer * controller on a PC.
831.2Sbouyer */
841.2Sbouyer#define	X86_PCI_INTERRUPT_LINE_NO_CONNECTION	0xff
851.2Sbouyer#endif /* _XEN_PCI_MACHDEP_H_ */
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