adv_cardbus.c revision 1.30
11.30Smsaitoh/* $NetBSD: adv_cardbus.c,v 1.30 2016/07/14 10:19:06 msaitoh Exp $ */ 21.1Sthorpej 31.1Sthorpej/*- 41.1Sthorpej * Copyright (c) 2000 The NetBSD Foundation, Inc. 51.1Sthorpej * All rights reserved. 61.1Sthorpej * 71.1Sthorpej * This code is derived from software contributed to The NetBSD Foundation 81.1Sthorpej * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 91.1Sthorpej * NASA Ames Research Center. 101.1Sthorpej * 111.1Sthorpej * Redistribution and use in source and binary forms, with or without 121.1Sthorpej * modification, are permitted provided that the following conditions 131.1Sthorpej * are met: 141.1Sthorpej * 1. Redistributions of source code must retain the above copyright 151.1Sthorpej * notice, this list of conditions and the following disclaimer. 161.1Sthorpej * 2. Redistributions in binary form must reproduce the above copyright 171.1Sthorpej * notice, this list of conditions and the following disclaimer in the 181.1Sthorpej * documentation and/or other materials provided with the distribution. 191.1Sthorpej * 201.1Sthorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 211.1Sthorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 221.1Sthorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 231.1Sthorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 241.1Sthorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 251.1Sthorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 261.1Sthorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 271.1Sthorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 281.1Sthorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 291.1Sthorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 301.1Sthorpej * POSSIBILITY OF SUCH DAMAGE. 311.1Sthorpej */ 321.1Sthorpej 331.1Sthorpej/* 341.1Sthorpej * this file was brought from ahc_cardbus.c and adv_pci.c 351.1Sthorpej * and modified by YAMAMOTO Takashi. 361.1Sthorpej */ 371.5Slukem 381.5Slukem#include <sys/cdefs.h> 391.30Smsaitoh__KERNEL_RCSID(0, "$NetBSD: adv_cardbus.c,v 1.30 2016/07/14 10:19:06 msaitoh Exp $"); 401.1Sthorpej 411.1Sthorpej#include <sys/param.h> 421.1Sthorpej#include <sys/systm.h> 431.1Sthorpej#include <sys/malloc.h> 441.1Sthorpej#include <sys/kernel.h> 451.1Sthorpej#include <sys/queue.h> 461.1Sthorpej#include <sys/device.h> 471.1Sthorpej 481.16Sad#include <sys/bus.h> 491.16Sad#include <sys/intr.h> 501.1Sthorpej 511.11Sperry#include <dev/scsipi/scsi_all.h> 521.1Sthorpej#include <dev/scsipi/scsipi_all.h> 531.1Sthorpej#include <dev/scsipi/scsiconf.h> 541.1Sthorpej 551.1Sthorpej#include <dev/pci/pcireg.h> 561.1Sthorpej#include <dev/pci/pcidevs.h> 571.1Sthorpej 581.1Sthorpej#include <dev/cardbus/cardbusvar.h> 591.9Smycroft#include <dev/pci/pcidevs.h> 601.1Sthorpej 611.1Sthorpej#include <dev/ic/advlib.h> 621.1Sthorpej#include <dev/ic/adv.h> 631.1Sthorpej 641.26Sdyoung#define ADV_CARDBUS_IOBA PCI_BAR0 651.26Sdyoung#define ADV_CARDBUS_MMBA PCI_BAR1 661.1Sthorpej 671.3Syamt#define ADV_CARDBUS_DEBUG 681.3Syamt#define ADV_CARDBUS_ALLOW_MEMIO 691.3Syamt 701.29Schs#define DEVNAME(sc) device_xname((sc)->sc_dev) 711.1Sthorpej 721.1Sthorpejstruct adv_cardbus_softc { 731.1Sthorpej struct asc_softc sc_adv; /* real ADV */ 741.1Sthorpej 751.1Sthorpej /* CardBus-specific goo. */ 761.1Sthorpej cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 771.23Sdyoung pcitag_t sc_tag; 781.1Sthorpej 791.24Sdyoung int sc_bar; 801.25Sdyoung pcireg_t sc_csr; 811.1Sthorpej bus_size_t sc_size; 821.1Sthorpej}; 831.1Sthorpej 841.22Sceggerint adv_cardbus_match(device_t, cfdata_t, void *); 851.22Sceggervoid adv_cardbus_attach(device_t, device_t, void *); 861.22Sceggerint adv_cardbus_detach(device_t, int); 871.1Sthorpej 881.29SchsCFATTACH_DECL_NEW(adv_cardbus, sizeof(struct adv_cardbus_softc), 891.8Sthorpej adv_cardbus_match, adv_cardbus_attach, adv_cardbus_detach, NULL); 901.1Sthorpej 911.1Sthorpejint 921.29Schsadv_cardbus_match(device_t parent, cfdata_t match, void *aux) 931.1Sthorpej{ 941.1Sthorpej struct cardbus_attach_args *ca = aux; 951.1Sthorpej 961.26Sdyoung if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS && 971.26Sdyoung PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ADVSYS_ULTRA) 981.1Sthorpej return (1); 991.1Sthorpej 1001.1Sthorpej return (0); 1011.1Sthorpej} 1021.1Sthorpej 1031.1Sthorpejvoid 1041.29Schsadv_cardbus_attach(device_t parent, device_t self, void *aux) 1051.1Sthorpej{ 1061.1Sthorpej struct cardbus_attach_args *ca = aux; 1071.13Sthorpej struct adv_cardbus_softc *csc = device_private(self); 1081.1Sthorpej struct asc_softc *sc = &csc->sc_adv; 1091.1Sthorpej cardbus_devfunc_t ct = ca->ca_ct; 1101.1Sthorpej bus_space_tag_t iot; 1111.1Sthorpej bus_space_handle_t ioh; 1121.1Sthorpej pcireg_t reg; 1131.1Sthorpej u_int8_t latency = 0x20; 1141.1Sthorpej 1151.29Schs sc->sc_dev = self; 1161.1Sthorpej sc->sc_flags = 0; 1171.1Sthorpej 1181.1Sthorpej if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS) { 1191.1Sthorpej switch (PCI_PRODUCT(ca->ca_id)) { 1201.1Sthorpej case PCI_PRODUCT_ADVSYS_1200A: 1211.30Smsaitoh aprint_normal(": AdvanSys ASC1200A SCSI adapter\n"); 1221.1Sthorpej latency = 0; 1231.1Sthorpej break; 1241.1Sthorpej 1251.1Sthorpej case PCI_PRODUCT_ADVSYS_1200B: 1261.30Smsaitoh aprint_normal(": AdvanSys ASC1200B SCSI adapter\n"); 1271.1Sthorpej latency = 0; 1281.1Sthorpej break; 1291.1Sthorpej 1301.1Sthorpej case PCI_PRODUCT_ADVSYS_ULTRA: 1311.1Sthorpej switch (PCI_REVISION(ca->ca_class)) { 1321.1Sthorpej case ASC_PCI_REVISION_3050: 1331.30Smsaitoh aprint_normal(": AdvanSys ABP-9xxUA " 1341.30Smsaitoh "SCSI adapter\n"); 1351.1Sthorpej break; 1361.1Sthorpej 1371.1Sthorpej case ASC_PCI_REVISION_3150: 1381.30Smsaitoh aprint_normal(": AdvanSys ABP-9xxU " 1391.30Smsaitoh "SCSI adapter\n"); 1401.1Sthorpej break; 1411.1Sthorpej } 1421.1Sthorpej break; 1431.1Sthorpej 1441.1Sthorpej default: 1451.30Smsaitoh aprint_error(": unknown model!\n"); 1461.1Sthorpej return; 1471.1Sthorpej } 1481.1Sthorpej } 1491.1Sthorpej 1501.1Sthorpej csc->sc_ct = ct; 1511.1Sthorpej csc->sc_tag = ca->ca_tag; 1521.1Sthorpej 1531.1Sthorpej /* 1541.1Sthorpej * Map the device. 1551.1Sthorpej */ 1561.1Sthorpej csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; 1571.11Sperry 1581.3Syamt#ifdef ADV_CARDBUS_ALLOW_MEMIO 1591.1Sthorpej if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_MMBA, 1601.1Sthorpej PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 1611.1Sthorpej &iot, &ioh, NULL, &csc->sc_size) == 0) { 1621.3Syamt#ifdef ADV_CARDBUS_DEBUG 1631.3Syamt printf("%s: memio enabled\n", DEVNAME(sc)); 1641.3Syamt#endif 1651.24Sdyoung csc->sc_bar = ADV_CARDBUS_MMBA; 1661.1Sthorpej csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 1671.1Sthorpej } else 1681.1Sthorpej#endif 1691.1Sthorpej if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_IOBA, 1701.1Sthorpej PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &csc->sc_size) == 0) { 1711.3Syamt#ifdef ADV_CARDBUS_DEBUG 1721.1Sthorpej printf("%s: io enabled\n", DEVNAME(sc)); 1731.3Syamt#endif 1741.24Sdyoung csc->sc_bar = ADV_CARDBUS_IOBA; 1751.1Sthorpej csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 1761.1Sthorpej } else { 1771.24Sdyoung csc->sc_bar = 0; 1781.30Smsaitoh aprint_error_dev(self, "unable to map device registers\n"); 1791.1Sthorpej return; 1801.1Sthorpej } 1811.3Syamt 1821.1Sthorpej /* Enable the appropriate bits in the PCI CSR. */ 1831.27Sdyoung reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG); 1841.1Sthorpej reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 1851.1Sthorpej reg |= csc->sc_csr; 1861.27Sdyoung Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); 1871.1Sthorpej 1881.1Sthorpej /* 1891.1Sthorpej * Make sure the latency timer is set to some reasonable 1901.1Sthorpej * value. 1911.1Sthorpej */ 1921.27Sdyoung reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_BHLC_REG); 1931.1Sthorpej if (PCI_LATTIMER(reg) < latency) { 1941.1Sthorpej reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 1951.1Sthorpej reg |= (latency << PCI_LATTIMER_SHIFT); 1961.27Sdyoung Cardbus_conf_write(ct, ca->ca_tag, PCI_BHLC_REG, reg); 1971.1Sthorpej } 1981.1Sthorpej 1991.1Sthorpej ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT); 2001.1Sthorpej ASC_SET_CHIP_STATUS(iot, ioh, 0); 2011.1Sthorpej 2021.1Sthorpej sc->sc_iot = iot; 2031.1Sthorpej sc->sc_ioh = ioh; 2041.1Sthorpej sc->sc_dmat = ca->ca_dmat; 2051.1Sthorpej sc->pci_device_id = ca->ca_id; 2061.1Sthorpej sc->bus_type = ASC_IS_PCI; 2071.1Sthorpej sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh); 2081.3Syamt 2091.1Sthorpej /* 2101.2Swiz * Initialize the board 2111.1Sthorpej */ 2121.1Sthorpej if (adv_init(sc)) { 2131.30Smsaitoh aprint_error_dev(self, "adv_init failed\n"); 2141.1Sthorpej return; 2151.1Sthorpej } 2161.1Sthorpej 2171.1Sthorpej /* 2181.1Sthorpej * Establish the interrupt. 2191.1Sthorpej */ 2201.28Sdrochner sc->sc_ih = Cardbus_intr_establish(ct, IPL_BIO, adv_intr, sc); 2211.1Sthorpej if (sc->sc_ih == NULL) { 2221.30Smsaitoh aprint_error_dev(self, "unable to establish interrupt\n"); 2231.1Sthorpej return; 2241.1Sthorpej } 2251.1Sthorpej 2261.1Sthorpej /* 2271.1Sthorpej * Attach. 2281.1Sthorpej */ 2291.1Sthorpej adv_attach(sc); 2301.1Sthorpej} 2311.1Sthorpej 2321.1Sthorpejint 2331.22Sceggeradv_cardbus_detach(device_t self, int flags) 2341.1Sthorpej{ 2351.13Sthorpej struct adv_cardbus_softc *csc = device_private(self); 2361.1Sthorpej struct asc_softc *sc = &csc->sc_adv; 2371.1Sthorpej 2381.1Sthorpej int rv; 2391.1Sthorpej 2401.1Sthorpej rv = adv_detach(sc, flags); 2411.1Sthorpej if (rv) 2421.1Sthorpej return rv; 2431.1Sthorpej 2441.1Sthorpej if (sc->sc_ih) { 2451.27Sdyoung Cardbus_intr_disestablish(csc->sc_ct, sc->sc_ih); 2461.1Sthorpej sc->sc_ih = 0; 2471.1Sthorpej } 2481.1Sthorpej 2491.24Sdyoung if (csc->sc_bar != 0) { 2501.24Sdyoung Cardbus_mapreg_unmap(csc->sc_ct, csc->sc_bar, 2511.24Sdyoung sc->sc_iot, sc->sc_ioh, csc->sc_size); 2521.24Sdyoung csc->sc_bar = 0; 2531.1Sthorpej } 2541.1Sthorpej 2551.1Sthorpej return 0; 2561.1Sthorpej} 257