spdmem_i2c.c revision 1.22
1/* $NetBSD: spdmem_i2c.c,v 1.22 2021/06/13 09:48:04 mlelstv Exp $ */
2
3/*
4 * Copyright (c) 2007 Nicolas Joly
5 * Copyright (c) 2007 Paul Goyette
6 * Copyright (c) 2007 Tobias Nygren
7 * Copyright (c) 2015 Michael van Elst
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 *    derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34/*
35 * Serial Presence Detect (SPD) memory identification
36 *
37 * JEDEC standard No. 21-C
38 * JEDEC document 4_01_06R24
39 * - Definitions of the EE1004-v 4 Kbit Serial Presence Detect EEPROM [...]
40 */
41
42#include <sys/cdefs.h>
43__KERNEL_RCSID(0, "$NetBSD: spdmem_i2c.c,v 1.22 2021/06/13 09:48:04 mlelstv Exp $");
44
45#include <sys/param.h>
46#include <sys/device.h>
47#include <sys/endian.h>
48#include <sys/module.h>
49#include <sys/sysctl.h>
50#include <machine/bswap.h>
51
52#include <dev/i2c/i2cvar.h>
53#include <dev/ic/spdmemreg.h>
54#include <dev/ic/spdmemvar.h>
55
56/* Constants for matching i2c bus address */
57#define SPDMEM_I2C_ADDRMASK 0xfff8
58#define SPDMEM_I2C_ADDR     0x50
59#define SPDCTL_I2C_ADDR     0x30
60
61/* set write protection */
62#define SPDCTL_SWP0         (SPDCTL_I2C_ADDR + 1)
63#define SPDCTL_SWP1         (SPDCTL_I2C_ADDR + 4)
64#define SPDCTL_SWP2         (SPDCTL_I2C_ADDR + 5)
65#define SPDCTL_SWP3         (SPDCTL_I2C_ADDR + 0)
66
67/* clear write protections */
68#define SPDCTL_CWP          (SPDCTL_I2C_ADDR + 3)
69
70/* read protection status */
71#define SPDCTL_RPS0         (SPDCTL_I2C_ADDR + 1)
72#define SPDCTL_RPS1         (SPDCTL_I2C_ADDR + 4)
73#define SPDCTL_RPS2         (SPDCTL_I2C_ADDR + 5)
74#define SPDCTL_RPS3         (SPDCTL_I2C_ADDR + 0)
75
76/* select page address */
77#define SPDCTL_SPA0         (SPDCTL_I2C_ADDR + 6)
78#define SPDCTL_SPA1         (SPDCTL_I2C_ADDR + 7)
79
80/* read page address */
81#define SPDCTL_RPA          (SPDCTL_I2C_ADDR + 6)
82
83struct spdmem_i2c_softc {
84	struct spdmem_softc sc_base;
85	i2c_tag_t sc_tag;
86	i2c_addr_t sc_addr; /* EEPROM */
87	i2c_addr_t sc_page0;
88	i2c_addr_t sc_page1;
89};
90
91static int  spdmem_reset_page(struct spdmem_i2c_softc *);
92static int  spdmem_i2c_match(device_t, cfdata_t, void *);
93static void spdmem_i2c_attach(device_t, device_t, void *);
94static int  spdmem_i2c_detach(device_t, int);
95
96CFATTACH_DECL_NEW(spdmem_iic, sizeof(struct spdmem_i2c_softc),
97    spdmem_i2c_match, spdmem_i2c_attach, spdmem_i2c_detach, NULL);
98
99static int spdmem_i2c_read(struct spdmem_softc *, uint16_t, uint8_t *);
100
101static int
102spdmem_reset_page(struct spdmem_i2c_softc *sc)
103{
104	uint8_t reg, byte0, byte2;
105	static uint8_t dummy = 0;
106	int rv;
107
108	reg = 0;
109
110	rv = iic_acquire_bus(sc->sc_tag, 0);
111	if (rv)
112		return rv;
113
114	/*
115	 * Try to read byte 0 and 2. If it failed, it's not spdmem or a device
116	 * doesn't exist at the address.
117	 */
118	rv = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, &reg, 1,
119	    &byte0, 1, 0);
120	rv |= iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, &reg, 1,
121	    &byte2, 1, 0);
122	if (rv != 0)
123		goto error;
124
125	/*
126	 * Quirk for BIOSes that leave page 1 of a 4kbit EEPROM selected.
127	 *
128	 * byte0 is the length, byte2 is the memory type. Both of them should
129	 * not be zero. If zero, the current page might be 1 (DDR4 and newer).
130	 * If page 1 is selected, offset 0 can be 0 (Module Characteristics
131	 * (Energy backup is not available)) and also offset 2 can be 0
132	 * (Megabytes, and a part of Capacity digits).
133	 *
134	 * Note: The encoding of byte0 is vary in memory type, so we check
135	 * just with zero to be simple.
136	 *
137	 * Try to see if we are not at page 0. If it's not, select page 0.
138	 */
139	if ((byte0 == 0) || (byte2 == 0)) {
140		/*
141		 * Note that SDCTL_RPA is the same as sc->sc_page0(SPDCTL_SPA0)
142		 * Write is SPA0, read is RPA.
143		 *
144		 * This call returns 0 on page 0 and returns -1 on page 1.
145		 * I don't know whether our icc_exec()'s API is good or not.
146		 */
147		rv = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_page0,
148		    &reg, 1, &dummy, 1, 0);
149		if (rv != 0) {
150			/*
151			 * The possibilities are:
152			 * a) page 1 is selected.
153			 * b) The device doesn't support page select and
154			 *    it's not a SPD ROM.
155			 * Is there no way to distinguish them now?
156			 */
157			rv = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
158			    sc->sc_page0, &reg, 1, &dummy, 1, 0);
159			if (rv == 0) {
160				aprint_debug("Page 1 was selected. Page 0 is "
161				    "selected now.\n");
162			} else {
163				aprint_debug("Failed to select page 0. This "
164				    "device isn't SPD ROM\n");
165			}
166		} else {
167			/* This device isn't SPD ROM */
168			rv = -1;
169		}
170	}
171error:
172	iic_release_bus(sc->sc_tag, 0);
173
174	return rv;
175}
176
177static const struct device_compatible_entry compat_data[] = {
178	{ .compat = "atmel,spd" },
179	{ .compat = "i2c-at34c02" },
180	DEVICE_COMPAT_EOL
181};
182
183static int
184spdmem_i2c_match(device_t parent, cfdata_t match, void *aux)
185{
186	struct i2c_attach_args *ia = aux;
187	struct spdmem_i2c_softc sc;
188	int match_result;
189
190	if (iic_use_direct_match(ia, match, compat_data, &match_result))
191		return match_result;
192
193	/*
194	 * XXXJRT
195	 * Should do this with "compatible" strings.  There are also
196	 * other problems with this "match" routine.  Specifically, if
197	 * we are doing direct-config, we know the device is already
198	 * there aren't do need to probe.  I'll leave the logic for
199	 * now and let someone who knows better clean it later.
200	 */
201
202	if (ia->ia_name) {
203		/* add other names as we find more firmware variations */
204		if (strcmp(ia->ia_name, "dimm-spd") &&
205		    strcmp(ia->ia_name, "dimm"))
206			return 0;
207	}
208
209	/* only do this lame test when not using direct config */
210	if (ia->ia_name == NULL) {
211		if ((ia->ia_addr & SPDMEM_I2C_ADDRMASK) != SPDMEM_I2C_ADDR)
212			return 0;
213	}
214
215	sc.sc_tag = ia->ia_tag;
216	sc.sc_addr = ia->ia_addr;
217	sc.sc_page0 = SPDCTL_SPA0;
218	sc.sc_page1 = SPDCTL_SPA1;
219	sc.sc_base.sc_read = spdmem_i2c_read;
220
221	/* Check the bank and reset to the page 0 */
222	if (spdmem_reset_page(&sc) != 0)
223		return 0;
224
225	if (spdmem_common_probe(&sc.sc_base)) {
226		return ia->ia_name ? I2C_MATCH_DIRECT_SPECIFIC
227				   : I2C_MATCH_ADDRESS_AND_PROBE;
228	}
229	return 0;
230}
231
232static void
233spdmem_i2c_attach(device_t parent, device_t self, void *aux)
234{
235	struct spdmem_i2c_softc *sc = device_private(self);
236	struct i2c_attach_args *ia = aux;
237
238	sc->sc_tag = ia->ia_tag;
239	sc->sc_addr = ia->ia_addr;
240	sc->sc_page0 = SPDCTL_SPA0;
241	sc->sc_page1 = SPDCTL_SPA1;
242	sc->sc_base.sc_read = spdmem_i2c_read;
243
244	if (!pmf_device_register(self, NULL, NULL))
245		aprint_error_dev(self, "couldn't establish power handler\n");
246
247	spdmem_common_attach(&sc->sc_base, self);
248}
249
250static int
251spdmem_i2c_detach(device_t self, int flags)
252{
253	struct spdmem_i2c_softc *sc = device_private(self);
254
255	pmf_device_deregister(self);
256
257	return spdmem_common_detach(&sc->sc_base, self);
258}
259
260static int
261spdmem_i2c_read(struct spdmem_softc *softc, uint16_t addr, uint8_t *val)
262{
263	uint8_t reg;
264	struct spdmem_i2c_softc *sc = (struct spdmem_i2c_softc *)softc;
265	static uint8_t dummy = 0;
266	int rv;
267
268	reg = addr & 0xff;
269
270	rv = iic_acquire_bus(sc->sc_tag, 0);
271	if (rv)
272		return rv;
273
274	if (addr & 0x100) {
275		rv = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_page1,
276		    &dummy, 1, &dummy, 1, 0);
277		rv |= iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
278		    &reg, 1, val, 1, 0);
279		rv |= iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
280		    sc->sc_page0, &dummy, 1, &dummy, 1, 0);
281	} else {
282		rv = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
283		    &reg, 1, val, 1, 0);
284	}
285
286	iic_release_bus(sc->sc_tag, 0);
287
288	return rv;
289}
290
291MODULE(MODULE_CLASS_DRIVER, spdmem, "i2cexec");
292
293#ifdef _MODULE
294#include "ioconf.c"
295#endif
296
297static int
298spdmem_modcmd(modcmd_t cmd, void *opaque)
299{
300	int error = 0;
301#ifdef _MODULE
302	static struct sysctllog *spdmem_sysctl_clog;
303#endif
304
305	switch (cmd) {
306	case MODULE_CMD_INIT:
307#ifdef _MODULE
308		error = config_init_component(cfdriver_ioconf_spdmem,
309		    cfattach_ioconf_spdmem, cfdata_ioconf_spdmem);
310#endif
311		return error;
312	case MODULE_CMD_FINI:
313#ifdef _MODULE
314		error = config_fini_component(cfdriver_ioconf_spdmem,
315		    cfattach_ioconf_spdmem, cfdata_ioconf_spdmem);
316		sysctl_teardown(&spdmem_sysctl_clog);
317#endif
318		return error;
319	default:
320		return ENOTTY;
321	}
322}
323