osiop_pcctwo.c revision 1.1.2.3
1 1.1.2.3 nathanw /* $NetBSD: osiop_pcctwo.c,v 1.1.2.3 2002/10/18 02:42:50 nathanw Exp $ */ 2 1.1.2.2 nathanw 3 1.1.2.2 nathanw /*- 4 1.1.2.2 nathanw * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. 5 1.1.2.2 nathanw * All rights reserved. 6 1.1.2.2 nathanw * 7 1.1.2.2 nathanw * This code is derived from software contributed to The NetBSD Foundation 8 1.1.2.2 nathanw * by Steve C. Woodford. 9 1.1.2.2 nathanw * 10 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without 11 1.1.2.2 nathanw * modification, are permitted provided that the following conditions 12 1.1.2.2 nathanw * are met: 13 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 14 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer. 15 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 16 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 17 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution. 18 1.1.2.2 nathanw * 3. All advertising materials mentioning features or use of this software 19 1.1.2.2 nathanw * must display the following acknowledgement: 20 1.1.2.2 nathanw * This product includes software developed by the NetBSD 21 1.1.2.2 nathanw * Foundation, Inc. and its contributors. 22 1.1.2.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.1.2.2 nathanw * contributors may be used to endorse or promote products derived 24 1.1.2.2 nathanw * from this software without specific prior written permission. 25 1.1.2.2 nathanw * 26 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.1.2.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.1.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.1.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.1.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.1.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.1.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.1.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.1.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.1.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.1.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE. 37 1.1.2.2 nathanw */ 38 1.1.2.2 nathanw 39 1.1.2.2 nathanw /* 40 1.1.2.2 nathanw * Front-end attachment code for the ncr53c710 SCSI controller 41 1.1.2.2 nathanw * on mvme68k/mvme88k boards. 42 1.1.2.2 nathanw */ 43 1.1.2.2 nathanw 44 1.1.2.2 nathanw #include <sys/param.h> 45 1.1.2.2 nathanw #include <sys/systm.h> 46 1.1.2.2 nathanw #include <sys/kernel.h> 47 1.1.2.2 nathanw #include <sys/device.h> 48 1.1.2.2 nathanw 49 1.1.2.2 nathanw #include <dev/scsipi/scsi_all.h> 50 1.1.2.2 nathanw #include <dev/scsipi/scsipi_all.h> 51 1.1.2.2 nathanw #include <dev/scsipi/scsiconf.h> 52 1.1.2.2 nathanw 53 1.1.2.2 nathanw #include <machine/cpu.h> 54 1.1.2.2 nathanw #include <machine/bus.h> 55 1.1.2.2 nathanw #include <machine/autoconf.h> 56 1.1.2.2 nathanw 57 1.1.2.2 nathanw #include <dev/ic/osiopreg.h> 58 1.1.2.2 nathanw #include <dev/ic/osiopvar.h> 59 1.1.2.2 nathanw 60 1.1.2.2 nathanw #include <dev/mvme/pcctworeg.h> 61 1.1.2.2 nathanw #include <dev/mvme/pcctwovar.h> 62 1.1.2.2 nathanw 63 1.1.2.2 nathanw 64 1.1.2.2 nathanw int osiop_pcctwo_match __P((struct device *, struct cfdata *, void *)); 65 1.1.2.2 nathanw void osiop_pcctwo_attach __P((struct device *, struct device *, void *)); 66 1.1.2.2 nathanw 67 1.1.2.2 nathanw struct osiop_pcctwo_softc { 68 1.1.2.2 nathanw struct osiop_softc sc_osiop; 69 1.1.2.2 nathanw struct evcnt sc_evcnt; 70 1.1.2.2 nathanw }; 71 1.1.2.2 nathanw 72 1.1.2.3 nathanw CFATTACH_DECL(osiop_pcctwo, sizeof(struct osiop_pcctwo_softc), 73 1.1.2.3 nathanw osiop_pcctwo_match, osiop_pcctwo_attach, NULL, NULL); 74 1.1.2.2 nathanw 75 1.1.2.2 nathanw static int osiop_pcctwo_intr __P((void *)); 76 1.1.2.2 nathanw 77 1.1.2.2 nathanw extern struct cfdriver osiop_cd; 78 1.1.2.2 nathanw 79 1.1.2.2 nathanw /* ARGSUSED */ 80 1.1.2.2 nathanw int 81 1.1.2.2 nathanw osiop_pcctwo_match(parent, cf, args) 82 1.1.2.2 nathanw struct device *parent; 83 1.1.2.2 nathanw struct cfdata *cf; 84 1.1.2.2 nathanw void *args; 85 1.1.2.2 nathanw { 86 1.1.2.2 nathanw struct pcctwo_attach_args *pa; 87 1.1.2.2 nathanw 88 1.1.2.2 nathanw pa = args; 89 1.1.2.2 nathanw 90 1.1.2.2 nathanw if (strcmp(pa->pa_name, osiop_cd.cd_name)) 91 1.1.2.2 nathanw return (0); 92 1.1.2.2 nathanw 93 1.1.2.2 nathanw pa->pa_ipl = cf->pcctwocf_ipl; 94 1.1.2.2 nathanw 95 1.1.2.2 nathanw return (1); 96 1.1.2.2 nathanw } 97 1.1.2.2 nathanw 98 1.1.2.2 nathanw /* ARGSUSED */ 99 1.1.2.2 nathanw void 100 1.1.2.2 nathanw osiop_pcctwo_attach(parent, self, args) 101 1.1.2.2 nathanw struct device *parent; 102 1.1.2.2 nathanw struct device *self; 103 1.1.2.2 nathanw void *args; 104 1.1.2.2 nathanw { 105 1.1.2.2 nathanw struct pcctwo_attach_args *pa; 106 1.1.2.2 nathanw struct osiop_pcctwo_softc *sc; 107 1.1.2.2 nathanw int clk, ctest7; 108 1.1.2.2 nathanw 109 1.1.2.2 nathanw pa = (struct pcctwo_attach_args *) args; 110 1.1.2.2 nathanw sc = (struct osiop_pcctwo_softc *) self; 111 1.1.2.2 nathanw 112 1.1.2.2 nathanw /* 113 1.1.2.2 nathanw * On the '17x the siop's clock is the same as the cpu clock. 114 1.1.2.2 nathanw * On the other boards, the siop runs at twice the cpu clock. 115 1.1.2.2 nathanw * Also, the 17x cannot do proper bus-snooping (the 68060 is 116 1.1.2.2 nathanw * lame in this repspect) so don't enable it on that board. 117 1.1.2.2 nathanw */ 118 1.1.2.2 nathanw #ifdef MVME68K 119 1.1.2.2 nathanw if (machineid == MVME_172 || machineid == MVME_177) { 120 1.1.2.2 nathanw clk = cpuspeed; 121 1.1.2.2 nathanw ctest7 = 0; 122 1.1.2.2 nathanw } else { 123 1.1.2.2 nathanw clk = cpuspeed * 2; 124 1.1.2.2 nathanw ctest7 = OSIOP_CTEST7_SC0; 125 1.1.2.2 nathanw } 126 1.1.2.2 nathanw #else 127 1.1.2.2 nathanw #error Set up siop clock speed for mvme187 128 1.1.2.2 nathanw #endif 129 1.1.2.2 nathanw 130 1.1.2.2 nathanw sc->sc_osiop.sc_bst = pa->pa_bust; 131 1.1.2.2 nathanw sc->sc_osiop.sc_dmat = pa->pa_dmat; 132 1.1.2.2 nathanw (void) bus_space_map(sc->sc_osiop.sc_bst, pa->pa_offset, OSIOP_NREGS, 133 1.1.2.2 nathanw 0, &sc->sc_osiop.sc_reg); 134 1.1.2.2 nathanw 135 1.1.2.2 nathanw sc->sc_osiop.sc_clock_freq = clk; 136 1.1.2.2 nathanw sc->sc_osiop.sc_ctest7 = ctest7 | OSIOP_CTEST7_TT1; 137 1.1.2.2 nathanw sc->sc_osiop.sc_dcntl = OSIOP_DCNTL_EA; 138 1.1.2.2 nathanw sc->sc_osiop.sc_id = 7; /* XXX: Could use NVRAM setting */ 139 1.1.2.2 nathanw 140 1.1.2.2 nathanw /* Attach main MI driver */ 141 1.1.2.2 nathanw osiop_attach(&sc->sc_osiop); 142 1.1.2.2 nathanw 143 1.1.2.2 nathanw /* Register the event counter */ 144 1.1.2.2 nathanw evcnt_attach_dynamic(&sc->sc_evcnt, EVCNT_TYPE_INTR, 145 1.1.2.2 nathanw pcctwointr_evcnt(pa->pa_ipl), "disk", sc->sc_osiop.sc_dev.dv_xname); 146 1.1.2.2 nathanw 147 1.1.2.2 nathanw /* Hook the chip's interrupt */ 148 1.1.2.2 nathanw pcctwointr_establish(PCCTWOV_SCSI, osiop_pcctwo_intr, pa->pa_ipl, sc, 149 1.1.2.2 nathanw &sc->sc_evcnt); 150 1.1.2.2 nathanw } 151 1.1.2.2 nathanw 152 1.1.2.2 nathanw static int 153 1.1.2.2 nathanw osiop_pcctwo_intr(arg) 154 1.1.2.2 nathanw void *arg; 155 1.1.2.2 nathanw { 156 1.1.2.2 nathanw struct osiop_pcctwo_softc *sc = (struct osiop_pcctwo_softc *) arg; 157 1.1.2.2 nathanw u_char istat; 158 1.1.2.2 nathanw 159 1.1.2.2 nathanw /* 160 1.1.2.2 nathanw * Catch any errors which can happen when the SIOP is 161 1.1.2.2 nathanw * local bus master... 162 1.1.2.2 nathanw */ 163 1.1.2.2 nathanw istat = pcc2_reg_read(sys_pcctwo, PCC2REG_SCSI_ERR_STATUS); 164 1.1.2.2 nathanw if ((istat & PCCTWO_ERR_SR_MASK) != 0) { 165 1.1.2.2 nathanw printf("%s: Local bus error: 0x%02x\n", 166 1.1.2.2 nathanw sc->sc_osiop.sc_dev.dv_xname, istat); 167 1.1.2.2 nathanw istat |= PCCTWO_ERR_SR_SCLR; 168 1.1.2.2 nathanw pcc2_reg_write(sys_pcctwo, PCC2REG_SCSI_ERR_STATUS, istat); 169 1.1.2.2 nathanw } 170 1.1.2.2 nathanw 171 1.1.2.2 nathanw /* This is potentially nasty, since the IRQ is level triggered... */ 172 1.1.2.2 nathanw if (sc->sc_osiop.sc_flags & OSIOP_INTSOFF) 173 1.1.2.2 nathanw return (0); 174 1.1.2.2 nathanw 175 1.1.2.2 nathanw istat = osiop_read_1(&sc->sc_osiop, OSIOP_ISTAT); 176 1.1.2.2 nathanw 177 1.1.2.2 nathanw if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0) 178 1.1.2.2 nathanw return (0); 179 1.1.2.2 nathanw 180 1.1.2.2 nathanw /* Save interrupt details for the back-end interrupt handler */ 181 1.1.2.2 nathanw sc->sc_osiop.sc_sstat0 = osiop_read_1(&sc->sc_osiop, OSIOP_SSTAT0); 182 1.1.2.2 nathanw sc->sc_osiop.sc_istat = istat; 183 1.1.2.2 nathanw sc->sc_osiop.sc_dstat = osiop_read_1(&sc->sc_osiop, OSIOP_DSTAT); 184 1.1.2.2 nathanw 185 1.1.2.2 nathanw /* Deal with the interrupt */ 186 1.1.2.2 nathanw osiop_intr(&sc->sc_osiop); 187 1.1.2.2 nathanw 188 1.1.2.2 nathanw return (1); 189 1.1.2.2 nathanw } 190
Indexes created Sat Nov 01 21:09:44 GMT 2025