if_an_pci.c revision 1.9
11.9Sthorpej/* $NetBSD: if_an_pci.c,v 1.9 2002/10/02 16:51:18 thorpej Exp $ */ 21.1Sonoe 31.1Sonoe/* 41.1Sonoe * Copyright (c) 2000 The NetBSD Foundation, Inc. 51.1Sonoe * All rights reserved. 61.1Sonoe * 71.1Sonoe * This code is derived from software contributed to The NetBSD Foundation 81.1Sonoe * by Atsushi Onoe. 91.1Sonoe * 101.1Sonoe * Redistribution and use in source and binary forms, with or without 111.1Sonoe * modification, are permitted provided that the following conditions 121.1Sonoe * are met: 131.1Sonoe * 1. Redistributions of source code must retain the above copyright 141.1Sonoe * notice, this list of conditions and the following disclaimer. 151.1Sonoe * 2. Redistributions in binary form must reproduce the above copyright 161.1Sonoe * notice, this list of conditions and the following disclaimer in the 171.1Sonoe * documentation and/or other materials provided with the distribution. 181.1Sonoe * 3. All advertising materials mentioning features or use of this software 191.1Sonoe * must display the following acknowledgement: 201.1Sonoe * This product includes software developed by the NetBSD 211.1Sonoe * Foundation, Inc. and its contributors. 221.1Sonoe * 4. Neither the name of The NetBSD Foundation nor the names of its 231.1Sonoe * contributors may be used to endorse or promote products derived 241.1Sonoe * from this software without specific prior written permission. 251.1Sonoe * 261.1Sonoe * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 271.1Sonoe * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 281.1Sonoe * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 291.1Sonoe * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 301.1Sonoe * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 311.1Sonoe * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 321.1Sonoe * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 331.1Sonoe * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 341.1Sonoe * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 351.1Sonoe * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 361.1Sonoe * POSSIBILITY OF SUCH DAMAGE. 371.1Sonoe */ 381.1Sonoe 391.1Sonoe/* 401.1Sonoe * PCI bus front-end for the Aironet PC4500/PC4800 Wireless LAN Adapter. 411.1Sonoe * Unlike WaveLAN, this adapter attached as PCI device using a PLX 9050 421.1Sonoe * PCI to "dumb bus" bridge chip. 431.1Sonoe */ 441.6Slukem 451.6Slukem#include <sys/cdefs.h> 461.9Sthorpej__KERNEL_RCSID(0, "$NetBSD: if_an_pci.c,v 1.9 2002/10/02 16:51:18 thorpej Exp $"); 471.1Sonoe 481.1Sonoe#include <sys/param.h> 491.1Sonoe#include <sys/systm.h> 501.1Sonoe#include <sys/mbuf.h> 511.1Sonoe#include <sys/malloc.h> 521.1Sonoe#include <sys/kernel.h> 531.1Sonoe#include <sys/socket.h> 541.1Sonoe#include <sys/ioctl.h> 551.1Sonoe#include <sys/errno.h> 561.1Sonoe#include <sys/device.h> 571.1Sonoe#include <sys/callout.h> 581.1Sonoe 591.1Sonoe#include <machine/endian.h> 601.1Sonoe 611.1Sonoe#include <net/if.h> 621.1Sonoe#include <net/if_dl.h> 631.1Sonoe#include <net/if_media.h> 641.1Sonoe#include <net/if_ether.h> 651.4Sonoe#include <net/if_ieee80211.h> 661.1Sonoe 671.1Sonoe#include <machine/bus.h> 681.1Sonoe#include <machine/intr.h> 691.1Sonoe 701.1Sonoe#include <dev/ic/anreg.h> 711.1Sonoe#include <dev/ic/anvar.h> 721.1Sonoe 731.1Sonoe#include <dev/pci/pcivar.h> 741.1Sonoe#include <dev/pci/pcireg.h> 751.1Sonoe#include <dev/pci/pcidevs.h> 761.1Sonoe 771.1Sonoe#define AN_PCI_PLX_IOBA 0x14 /* i/o base for PLX chip */ 781.1Sonoe#define AN_PCI_IOBA 0x18 /* i/o base */ 791.1Sonoe 801.1Sonoestruct an_pci_softc { 811.1Sonoe struct an_softc sc_an; /* real "an" softc */ 821.1Sonoe 831.1Sonoe /* PCI-specific goo. */ 841.1Sonoe void *sc_ih; /* interrupt handle */ 851.1Sonoe}; 861.1Sonoe 871.1Sonoeint an_pci_match __P((struct device *, struct cfdata *, void *)); 881.1Sonoevoid an_pci_attach __P((struct device *, struct device *, void *)); 891.1Sonoe 901.8SthorpejCFATTACH_DECL(an_pci, sizeof(struct an_pci_softc), 911.9Sthorpej an_pci_match, an_pci_attach, NULL, NULL); 921.1Sonoe 931.1Sonoeconst struct an_pci_product { 941.1Sonoe u_int32_t app_vendor; /* PCI vendor ID */ 951.1Sonoe u_int32_t app_product; /* PCI product ID */ 961.1Sonoe} an_pci_products[] = { 971.1Sonoe { PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PC4xxx }, 981.1Sonoe { PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PC4500 }, 991.1Sonoe { PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PC4800 }, 1001.4Sonoe { PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_350 }, 1011.1Sonoe { 0, 0 } 1021.1Sonoe}; 1031.1Sonoe 1041.1Sonoeint 1051.1Sonoean_pci_match(struct device *parent, struct cfdata *match, void *aux) 1061.1Sonoe{ 1071.1Sonoe struct pci_attach_args *pa = aux; 1081.1Sonoe const struct an_pci_product *app; 1091.1Sonoe 1101.1Sonoe for (app = an_pci_products; app->app_vendor != 0; app++) { 1111.1Sonoe if (PCI_VENDOR(pa->pa_id) == app->app_vendor && 1121.1Sonoe PCI_PRODUCT(pa->pa_id) == app->app_product) 1131.1Sonoe return 1; 1141.1Sonoe } 1151.1Sonoe return 0; 1161.1Sonoe} 1171.1Sonoe 1181.1Sonoevoid 1191.1Sonoean_pci_attach(struct device *parent, struct device *self, void *aux) 1201.1Sonoe{ 1211.1Sonoe struct pci_attach_args *pa = (struct pci_attach_args *)aux; 1221.1Sonoe struct an_pci_softc *psc = (struct an_pci_softc *) self; 1231.1Sonoe struct an_softc *sc = &psc->sc_an; 1241.1Sonoe char devinfo[256]; 1251.1Sonoe char const *intrstr; 1261.1Sonoe pci_intr_handle_t ih; 1271.1Sonoe u_int32_t csr; 1281.1Sonoe 1291.1Sonoe pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 1301.1Sonoe printf(": %s\n", devinfo); 1311.1Sonoe 1321.1Sonoe /* Map I/O registers */ 1331.1Sonoe if (pci_mapreg_map(pa, AN_PCI_IOBA, PCI_MAPREG_TYPE_IO, 0, 1341.1Sonoe &sc->an_btag, &sc->an_bhandle, NULL, NULL) != 0) { 1351.1Sonoe printf("%s: unable to map registers\n", self->dv_xname); 1361.1Sonoe return; 1371.1Sonoe } 1381.1Sonoe 1391.1Sonoe /* Enable the device. */ 1401.1Sonoe csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1411.1Sonoe pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1421.1Sonoe csr | PCI_COMMAND_MASTER_ENABLE); 1431.1Sonoe 1441.1Sonoe /* Map and establish the interrupt. */ 1451.2Ssommerfe if (pci_intr_map(pa, &ih)) { 1461.1Sonoe printf("%s: unable to map interrupt\n", self->dv_xname); 1471.1Sonoe return; 1481.1Sonoe } 1491.1Sonoe intrstr = pci_intr_string(pa->pa_pc, ih); 1501.1Sonoe psc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, an_intr, sc); 1511.1Sonoe if (psc->sc_ih == NULL) { 1521.1Sonoe printf("%s: unable to establish interrupt", self->dv_xname); 1531.1Sonoe if (intrstr != NULL) 1541.1Sonoe printf(" at %s", intrstr); 1551.1Sonoe printf("\n"); 1561.1Sonoe return; 1571.1Sonoe } 1581.1Sonoe printf("%s: interrupting at %s\n", self->dv_xname, intrstr); 1591.1Sonoe sc->sc_enabled = 1; 1601.1Sonoe 1611.1Sonoe if (an_attach(sc) != 0) { 1621.1Sonoe printf("%s: failed to attach controller\n", self->dv_xname); 1631.1Sonoe pci_intr_disestablish(pa->pa_pc, psc->sc_ih); 1641.1Sonoe bus_space_unmap(sc->an_btag, sc->an_bhandle, AN_IOSIZ); 1651.1Sonoe } 1661.1Sonoe} 167