if_ral_pci.c revision 1.21.6.1 1 1.21.6.1 skrll /* $NetBSD: if_ral_pci.c,v 1.21.6.1 2016/05/29 08:44:21 skrll Exp $ */
2 1.21.6.1 skrll /* $OpenBSD: if_ral_pci.c,v 1.24 2015/11/24 17:11:39 mpi Exp $ */
3 1.1 drochner
4 1.1 drochner /*-
5 1.21.6.1 skrll * Copyright (c) 2005-2010 Damien Bergamini <damien.bergamini (at) free.fr>
6 1.1 drochner *
7 1.1 drochner * Permission to use, copy, modify, and distribute this software for any
8 1.1 drochner * purpose with or without fee is hereby granted, provided that the above
9 1.1 drochner * copyright notice and this permission notice appear in all copies.
10 1.1 drochner *
11 1.1 drochner * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 drochner * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 drochner * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 drochner * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 drochner * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 drochner * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 drochner * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 drochner */
19 1.1 drochner
20 1.1 drochner /*
21 1.21.6.1 skrll * PCI front-end for the Ralink RT2560/RT2561/RT2860/RT3090 driver.
22 1.1 drochner */
23 1.1 drochner #include <sys/cdefs.h>
24 1.21.6.1 skrll __KERNEL_RCSID(0, "$NetBSD: if_ral_pci.c,v 1.21.6.1 2016/05/29 08:44:21 skrll Exp $");
25 1.1 drochner
26 1.1 drochner
27 1.1 drochner #include <sys/param.h>
28 1.1 drochner #include <sys/sockio.h>
29 1.1 drochner #include <sys/mbuf.h>
30 1.1 drochner #include <sys/kernel.h>
31 1.1 drochner #include <sys/socket.h>
32 1.1 drochner #include <sys/systm.h>
33 1.1 drochner #include <sys/malloc.h>
34 1.1 drochner #include <sys/device.h>
35 1.1 drochner
36 1.7 ad #include <sys/bus.h>
37 1.7 ad #include <sys/intr.h>
38 1.1 drochner
39 1.1 drochner #include <net/if.h>
40 1.1 drochner #include <net/if_dl.h>
41 1.4 rpaulo #include <net/if_media.h>
42 1.1 drochner #include <net/if_ether.h>
43 1.1 drochner
44 1.1 drochner #include <netinet/in.h>
45 1.1 drochner
46 1.1 drochner #include <net80211/ieee80211_var.h>
47 1.9 scw #include <net80211/ieee80211_amrr.h>
48 1.1 drochner #include <net80211/ieee80211_rssadapt.h>
49 1.1 drochner #include <net80211/ieee80211_radiotap.h>
50 1.1 drochner
51 1.4 rpaulo #include <dev/ic/rt2560var.h>
52 1.4 rpaulo #include <dev/ic/rt2661var.h>
53 1.21.6.1 skrll #include <dev/ic/rt2860var.h>
54 1.1 drochner
55 1.1 drochner #include <dev/pci/pcireg.h>
56 1.1 drochner #include <dev/pci/pcivar.h>
57 1.1 drochner #include <dev/pci/pcidevs.h>
58 1.1 drochner
59 1.21.6.1 skrll #define RAL_POWER_MANAGEMENT 0 /* Disabled for now */
60 1.21.6.1 skrll
61 1.4 rpaulo static struct ral_opns {
62 1.4 rpaulo int (*attach)(void *, int);
63 1.4 rpaulo int (*detach)(void *);
64 1.21.6.1 skrll #if RAL_POWER_MANAGEMENT
65 1.21.6.1 skrll void (*suspend)(void *);
66 1.21.6.1 skrll void (*wakeup)(void *);
67 1.21.6.1 skrll #endif
68 1.4 rpaulo int (*intr)(void *);
69 1.4 rpaulo
70 1.4 rpaulo } ral_rt2560_opns = {
71 1.4 rpaulo rt2560_attach,
72 1.4 rpaulo rt2560_detach,
73 1.21.6.1 skrll #if RAL_POWER_MANAGEMENT
74 1.21.6.1 skrll rt2560_suspend,
75 1.21.6.1 skrll rt2560_wakeup,
76 1.21.6.1 skrll #endif
77 1.4 rpaulo rt2560_intr
78 1.4 rpaulo
79 1.4 rpaulo }, ral_rt2661_opns = {
80 1.4 rpaulo rt2661_attach,
81 1.4 rpaulo rt2661_detach,
82 1.21.6.1 skrll #if RAL_POWER_MANAGEMENT
83 1.21.6.1 skrll rt2661_suspend,
84 1.21.6.1 skrll rt2661_wakeup,
85 1.21.6.1 skrll #endif
86 1.4 rpaulo rt2661_intr
87 1.21.6.1 skrll
88 1.21.6.1 skrll }, ral_rt2860_opns = {
89 1.21.6.1 skrll rt2860_attach,
90 1.21.6.1 skrll rt2860_detach,
91 1.21.6.1 skrll #if RAL_POWER_MANAGEMENT
92 1.21.6.1 skrll rt2860_suspend,
93 1.21.6.1 skrll rt2860_wakeup,
94 1.21.6.1 skrll #endif
95 1.21.6.1 skrll rt2860_intr
96 1.4 rpaulo };
97 1.4 rpaulo
98 1.1 drochner struct ral_pci_softc {
99 1.4 rpaulo union {
100 1.4 rpaulo struct rt2560_softc sc_rt2560;
101 1.4 rpaulo struct rt2661_softc sc_rt2661;
102 1.21.6.1 skrll struct rt2860_softc sc_rt2860;
103 1.4 rpaulo } u;
104 1.4 rpaulo #define sc_sc u.sc_rt2560
105 1.1 drochner
106 1.1 drochner /* PCI specific goo */
107 1.4 rpaulo struct ral_opns *sc_opns;
108 1.1 drochner pci_chipset_tag_t sc_pc;
109 1.1 drochner void *sc_ih;
110 1.1 drochner bus_size_t sc_mapsize;
111 1.1 drochner };
112 1.1 drochner
113 1.1 drochner /* Base Address Register */
114 1.18 dyoung #define RAL_PCI_BAR0 PCI_BAR(0)
115 1.1 drochner
116 1.11 cegger int ral_pci_match(device_t, cfdata_t, void *);
117 1.11 cegger void ral_pci_attach(device_t, device_t, void *);
118 1.11 cegger int ral_pci_detach(device_t, int);
119 1.21.6.1 skrll #if RAL_POWER_MANAGEMENT
120 1.21.6.1 skrll int ral_pci_activate(struct device *, devact_t);
121 1.21.6.1 skrll void ral_pci_wakeup(struct ral_pci_softc *);
122 1.21.6.1 skrll #else
123 1.21.6.1 skrll #define ral_pci_activate NULL
124 1.21.6.1 skrll #endif
125 1.1 drochner
126 1.20 drochner CFATTACH_DECL_NEW(ral_pci, sizeof (struct ral_pci_softc),
127 1.21.6.1 skrll ral_pci_match, ral_pci_attach, ral_pci_detach, ral_pci_activate);
128 1.21.6.1 skrll
129 1.21.6.1 skrll static const struct ral_pci_matchid {
130 1.21.6.1 skrll pci_vendor_id_t ral_vendor;
131 1.21.6.1 skrll pci_product_id_t ral_product;
132 1.21.6.1 skrll } ral_pci_devices[] = {
133 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2560 },
134 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561 },
135 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561S },
136 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2661 },
137 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860 },
138 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2890 },
139 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2760 },
140 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2790 },
141 1.21.6.1 skrll { PCI_VENDOR_AWT, PCI_PRODUCT_AWT_RT2890 },
142 1.21.6.1 skrll { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_1 },
143 1.21.6.1 skrll { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_2 },
144 1.21.6.1 skrll { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_3 },
145 1.21.6.1 skrll { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_4 },
146 1.21.6.1 skrll { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_5 },
147 1.21.6.1 skrll { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_6 },
148 1.21.6.1 skrll { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_7 },
149 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3060 },
150 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3062 },
151 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3090 },
152 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3091 },
153 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3092 },
154 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3562 },
155 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3592 },
156 1.21.6.1 skrll { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3593 }
157 1.21.6.1 skrll };
158 1.1 drochner
159 1.1 drochner int
160 1.11 cegger ral_pci_match(device_t parent, cfdata_t cfdata,
161 1.5 christos void *aux)
162 1.1 drochner {
163 1.1 drochner struct pci_attach_args *pa = aux;
164 1.1 drochner
165 1.21.6.1 skrll for (size_t i = 0; i < __arraycount(ral_pci_devices); i++) {
166 1.21.6.1 skrll const struct ral_pci_matchid *ral = &ral_pci_devices[i];
167 1.21.6.1 skrll if (PCI_VENDOR(pa->pa_id) == ral->ral_vendor &&
168 1.21.6.1 skrll PCI_PRODUCT(pa->pa_id) == ral->ral_product)
169 1.21.6.1 skrll return 1;
170 1.4 rpaulo }
171 1.1 drochner
172 1.1 drochner return 0;
173 1.1 drochner }
174 1.1 drochner
175 1.1 drochner void
176 1.11 cegger ral_pci_attach(device_t parent, device_t self, void *aux)
177 1.1 drochner {
178 1.12 cegger struct ral_pci_softc *psc = device_private(self);
179 1.4 rpaulo struct rt2560_softc *sc = &psc->sc_sc;
180 1.17 dyoung const struct pci_attach_args *pa = aux;
181 1.1 drochner const char *intrstr;
182 1.1 drochner bus_addr_t base;
183 1.1 drochner pci_intr_handle_t ih;
184 1.21.6.1 skrll pcireg_t memtype, reg;
185 1.19 drochner int error;
186 1.21 christos char intrbuf[PCI_INTRSTR_LEN];
187 1.4 rpaulo
188 1.19 drochner pci_aprint_devinfo(pa, NULL);
189 1.4 rpaulo
190 1.21.6.1 skrll if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RALINK) {
191 1.21.6.1 skrll switch (PCI_PRODUCT(pa->pa_id)) {
192 1.21.6.1 skrll case PCI_PRODUCT_RALINK_RT2560:
193 1.21.6.1 skrll psc->sc_opns = &ral_rt2560_opns;
194 1.21.6.1 skrll break;
195 1.21.6.1 skrll case PCI_PRODUCT_RALINK_RT2561:
196 1.21.6.1 skrll case PCI_PRODUCT_RALINK_RT2561S:
197 1.21.6.1 skrll case PCI_PRODUCT_RALINK_RT2661:
198 1.21.6.1 skrll psc->sc_opns = &ral_rt2661_opns;
199 1.21.6.1 skrll break;
200 1.21.6.1 skrll default:
201 1.21.6.1 skrll psc->sc_opns = &ral_rt2860_opns;
202 1.21.6.1 skrll break;
203 1.21.6.1 skrll }
204 1.21.6.1 skrll } else {
205 1.21.6.1 skrll /* all other vendors are RT2860 only */
206 1.21.6.1 skrll psc->sc_opns = &ral_rt2860_opns;
207 1.21.6.1 skrll }
208 1.4 rpaulo
209 1.20 drochner sc->sc_dev = self;
210 1.1 drochner sc->sc_dmat = pa->pa_dmat;
211 1.1 drochner psc->sc_pc = pa->pa_pc;
212 1.1 drochner
213 1.1 drochner /* enable the appropriate bits in the PCI CSR */
214 1.1 drochner reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
215 1.1 drochner reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
216 1.1 drochner pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
217 1.1 drochner
218 1.1 drochner /* map control/status registers */
219 1.21.6.1 skrll memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RAL_PCI_BAR0);
220 1.21.6.1 skrll error = pci_mapreg_map(pa, RAL_PCI_BAR0, memtype, 0, &sc->sc_st,
221 1.21.6.1 skrll &sc->sc_sh, &base, &psc->sc_mapsize);
222 1.4 rpaulo
223 1.1 drochner if (error != 0) {
224 1.4 rpaulo aprint_error(": could not map memory space\n");
225 1.1 drochner return;
226 1.1 drochner }
227 1.1 drochner
228 1.1 drochner if (pci_intr_map(pa, &ih) != 0) {
229 1.4 rpaulo aprint_error(": could not map interrupt\n");
230 1.1 drochner return;
231 1.1 drochner }
232 1.1 drochner
233 1.21 christos intrstr = pci_intr_string(psc->sc_pc, ih, intrbuf, sizeof(intrbuf));
234 1.4 rpaulo psc->sc_ih = pci_intr_establish(psc->sc_pc, ih, IPL_NET,
235 1.4 rpaulo psc->sc_opns->intr, sc);
236 1.4 rpaulo
237 1.1 drochner if (psc->sc_ih == NULL) {
238 1.4 rpaulo aprint_error(": could not establish interrupt");
239 1.1 drochner if (intrstr != NULL)
240 1.14 njoly aprint_error(" at %s", intrstr);
241 1.4 rpaulo aprint_error("\n");
242 1.1 drochner return;
243 1.1 drochner }
244 1.20 drochner aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
245 1.1 drochner
246 1.4 rpaulo (*psc->sc_opns->attach)(sc, PCI_PRODUCT(pa->pa_id));
247 1.1 drochner }
248 1.1 drochner
249 1.1 drochner int
250 1.11 cegger ral_pci_detach(device_t self, int flags)
251 1.1 drochner {
252 1.12 cegger struct ral_pci_softc *psc = device_private(self);
253 1.4 rpaulo struct rt2560_softc *sc = &psc->sc_sc;
254 1.21.6.1 skrll int error;
255 1.21.6.1 skrll
256 1.21.6.1 skrll if (psc->sc_ih != NULL) {
257 1.21.6.1 skrll pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
258 1.21.6.1 skrll
259 1.21.6.1 skrll error = (*psc->sc_opns->detach)(sc);
260 1.21.6.1 skrll if (error != 0)
261 1.21.6.1 skrll return error;
262 1.21.6.1 skrll }
263 1.21.6.1 skrll
264 1.21.6.1 skrll if (psc->sc_mapsize > 0)
265 1.21.6.1 skrll bus_space_unmap(sc->sc_st, sc->sc_sh, psc->sc_mapsize);
266 1.1 drochner
267 1.21.6.1 skrll return 0;
268 1.21.6.1 skrll }
269 1.21.6.1 skrll
270 1.21.6.1 skrll #if RAL_POWER_MANAGEMENT
271 1.21.6.1 skrll int
272 1.21.6.1 skrll ral_pci_activate(struct device *self, devact_t act)
273 1.21.6.1 skrll {
274 1.21.6.1 skrll struct ral_pci_softc *psc = (struct ral_pci_softc *)self;
275 1.21.6.1 skrll struct rt2560_softc *sc = &psc->sc_sc;
276 1.1 drochner
277 1.21.6.1 skrll switch (act) {
278 1.21.6.1 skrll case DVACT_SUSPEND:
279 1.21.6.1 skrll (*psc->sc_opns->suspend)(sc);
280 1.21.6.1 skrll break;
281 1.21.6.1 skrll case DVACT_WAKEUP:
282 1.21.6.1 skrll ral_pci_wakeup(psc);
283 1.21.6.1 skrll break;
284 1.21.6.1 skrll }
285 1.1 drochner return 0;
286 1.1 drochner }
287 1.4 rpaulo
288 1.21.6.1 skrll void
289 1.21.6.1 skrll ral_pci_wakeup(struct ral_pci_softc *psc)
290 1.21.6.1 skrll {
291 1.21.6.1 skrll struct rt2560_softc *sc = &psc->sc_sc;
292 1.21.6.1 skrll int s;
293 1.21.6.1 skrll
294 1.21.6.1 skrll s = splnet();
295 1.21.6.1 skrll (*psc->sc_opns->wakeup)(sc);
296 1.21.6.1 skrll splx(s);
297 1.21.6.1 skrll }
298 1.21.6.1 skrll #endif
299