ohci_pci.c revision 1.43
1/*	$NetBSD: ohci_pci.c,v 1.43 2009/04/26 08:54:13 cegger Exp $	*/
2
3/*
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart@augustsson.net) at
9 * Carlstedt Research & Technology.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: ohci_pci.c,v 1.43 2009/04/26 08:54:13 cegger Exp $");
35
36#include "ehci.h"
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/kernel.h>
41#include <sys/device.h>
42#include <sys/proc.h>
43#include <sys/queue.h>
44
45#include <sys/bus.h>
46
47#include <dev/pci/pcivar.h>
48#include <dev/pci/usb_pci.h>
49
50#include <dev/usb/usb.h>
51#include <dev/usb/usbdi.h>
52#include <dev/usb/usbdivar.h>
53#include <dev/usb/usb_mem.h>
54
55#include <dev/usb/ohcireg.h>
56#include <dev/usb/ohcivar.h>
57
58struct ohci_pci_softc {
59	ohci_softc_t		sc;
60#if NEHCI > 0
61	struct usb_pci		sc_pci;
62#endif
63	pci_chipset_tag_t	sc_pc;
64	pcitag_t		sc_tag;
65	void 			*sc_ih;		/* interrupt vectoring */
66};
67
68static int
69ohci_pci_match(device_t parent, cfdata_t match, void *aux)
70{
71	struct pci_attach_args *pa = (struct pci_attach_args *) aux;
72
73	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
74	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
75	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI)
76		return 1;
77
78	return 0;
79}
80
81static void
82ohci_pci_attach(device_t parent, device_t self, void *aux)
83{
84	struct ohci_pci_softc *sc = device_private(self);
85	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
86	pci_chipset_tag_t pc = pa->pa_pc;
87	pcitag_t tag = pa->pa_tag;
88	char const *intrstr;
89	pci_intr_handle_t ih;
90	pcireg_t csr;
91	char devinfo[256];
92	usbd_status r;
93	const char *vendor;
94
95	sc->sc.sc_dev = self;
96	sc->sc.sc_bus.hci_private = sc;
97
98	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
99	aprint_normal(": %s (rev. 0x%02x)\n",
100	    devinfo, PCI_REVISION(pa->pa_class));
101
102	/* Map I/O registers */
103	if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
104			   &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
105		sc->sc.sc_size = 0;
106		aprint_error_dev(self, "can't map mem space\n");
107		return;
108	}
109
110	/* Disable interrupts, so we don't get any spurious ones. */
111	bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
112			  OHCI_ALL_INTRS);
113
114	sc->sc_pc = pc;
115	sc->sc_tag = tag;
116	sc->sc.sc_bus.dmatag = pa->pa_dmat;
117
118	/* Enable the device. */
119	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
120	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
121		       csr | PCI_COMMAND_MASTER_ENABLE);
122
123	/* Map and establish the interrupt. */
124	if (pci_intr_map(pa, &ih)) {
125		aprint_error_dev(self, "couldn't map interrupt\n");
126		goto fail;
127	}
128
129	/*
130	 * Allocate IRQ
131	 */
132	intrstr = pci_intr_string(pc, ih);
133	sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ohci_intr, sc);
134	if (sc->sc_ih == NULL) {
135		aprint_error_dev(self, "couldn't establish interrupt");
136		if (intrstr != NULL)
137			aprint_error(" at %s", intrstr);
138		aprint_error("\n");
139		goto fail;
140	}
141	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
142
143	/* Figure out vendor for root hub descriptor. */
144	vendor = pci_findvendor(pa->pa_id);
145	sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
146	if (vendor)
147		strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
148	else
149		snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
150		    "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
151
152	r = ohci_init(&sc->sc);
153	if (r != USBD_NORMAL_COMPLETION) {
154		aprint_error_dev(self, "init failed, error=%d\n", r);
155		goto fail;
156	}
157
158#if NEHCI > 0
159	usb_pci_add(&sc->sc_pci, pa, self);
160#endif
161
162	if (!pmf_device_register1(self, ohci_suspend, ohci_resume,
163	                          ohci_shutdown))
164		aprint_error_dev(self, "couldn't establish power handler\n");
165
166	/* Attach usb device. */
167	sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
168	return;
169
170fail:
171	if (sc->sc_ih) {
172		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
173		sc->sc_ih = NULL;
174	}
175	if (sc->sc.sc_size) {
176		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
177		sc->sc.sc_size = 0;
178	}
179	return;
180}
181
182static int
183ohci_pci_detach(device_t self, int flags)
184{
185	struct ohci_pci_softc *sc = device_private(self);
186	int rv;
187
188	pmf_device_deregister(self);
189	rv = ohci_detach(&sc->sc, flags);
190	if (rv)
191		return rv;
192
193	if (sc->sc.sc_size) {
194		/* Disable interrupts, so we don't get any spurious ones. */
195		bus_space_write_4(sc->sc.iot, sc->sc.ioh,
196				  OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
197	}
198
199	if (sc->sc_ih != NULL) {
200		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
201		sc->sc_ih = NULL;
202	}
203	if (sc->sc.sc_size) {
204		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
205		sc->sc.sc_size = 0;
206	}
207#if NEHCI > 0
208	usb_pci_rem(&sc->sc_pci);
209#endif
210	return 0;
211}
212
213CFATTACH_DECL3_NEW(ohci_pci, sizeof(struct ohci_pci_softc),
214    ohci_pci_match, ohci_pci_attach, ohci_pci_detach, ohci_activate, NULL,
215    ohci_childdet, DVF_DETACH_SHUTDOWN);
216