siisata_pci.c revision 1.4
1/* $NetBSD: siisata_pci.c,v 1.4 2009/07/04 20:36:57 jakllsch Exp $ */ 2 3/* 4 * Copyright (c) 2006 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33/*- 34 * Copyright (c) 2007, 2008, 2009 Jonathan A. Kollasch. 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 48 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 49 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 50 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 51 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 52 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 53 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 54 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 55 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 56 * 57 */ 58 59#include <sys/cdefs.h> 60 61 62#include <sys/types.h> 63#include <sys/malloc.h> 64#include <sys/param.h> 65#include <sys/kernel.h> 66#include <sys/systm.h> 67 68#include <uvm/uvm_extern.h> 69 70#include <dev/pci/pcivar.h> 71#include <dev/pci/pcidevs.h> 72#include <dev/ic/siisatavar.h> 73 74struct siisata_pci_softc { 75 struct siisata_softc si_sc; 76 pci_chipset_tag_t sc_pc; 77 pcitag_t sc_pcitag; 78 void * sc_ih; 79}; 80 81static int siisata_pci_match(device_t, cfdata_t, void *); 82static void siisata_pci_attach(device_t, device_t, void *); 83static int siisata_pci_detach(device_t, int); 84static bool siisata_pci_resume(device_t PMF_FN_PROTO); 85 86struct siisata_pci_board { 87 pci_vendor_id_t spb_vend; 88 pci_product_id_t spb_prod; 89 uint16_t spb_port; 90 uint16_t spb_chip; 91}; 92 93static const struct siisata_pci_board siisata_pci_boards[] = { 94 { 95 .spb_vend = PCI_VENDOR_CMDTECH, 96 .spb_prod = PCI_PRODUCT_CMDTECH_3124, 97 .spb_port = 4, 98 .spb_chip = 3124, 99 }, 100 { 101 .spb_vend = PCI_VENDOR_CMDTECH, 102 .spb_prod = PCI_PRODUCT_CMDTECH_3132, 103 .spb_port = 2, 104 .spb_chip = 3132, 105 }, 106 { 107 .spb_vend = PCI_VENDOR_CMDTECH, 108 .spb_prod = PCI_PRODUCT_CMDTECH_3531, 109 .spb_port = 1, 110 .spb_chip = 3531, 111 }, 112}; 113 114CFATTACH_DECL_NEW(siisata_pci, sizeof(struct siisata_pci_softc), 115 siisata_pci_match, siisata_pci_attach, siisata_pci_detach, NULL); 116 117static const struct siisata_pci_board * 118siisata_pci_lookup(const struct pci_attach_args * pa) 119{ 120 int i; 121 122 for (i = 0; i < __arraycount(siisata_pci_boards); i++) { 123 if (siisata_pci_boards[i].spb_vend != PCI_VENDOR(pa->pa_id)) 124 continue; 125 if (siisata_pci_boards[i].spb_prod == PCI_PRODUCT(pa->pa_id)) 126 return &siisata_pci_boards[i]; 127 } 128 129 return NULL; 130} 131 132static int 133siisata_pci_match(device_t parent, cfdata_t match, void *aux) 134{ 135 struct pci_attach_args *pa = aux; 136 137 if (siisata_pci_lookup(pa) != NULL) 138 return 3; 139 140 return 0; 141} 142 143static void 144siisata_pci_attach(device_t parent, device_t self, void *aux) 145{ 146 struct pci_attach_args *pa = aux; 147 struct siisata_pci_softc *psc = device_private(self); 148 struct siisata_softc *sc = &psc->si_sc; 149 char devinfo[256]; 150 const char *intrstr; 151 pcireg_t csr, memtype; 152 const struct siisata_pci_board *spbp; 153 pci_intr_handle_t intrhandle; 154 bus_space_tag_t memt; 155 bus_space_handle_t memh; 156 uint32_t gcreg; 157 int memh_valid; 158 bus_size_t grsize, prsize; 159 160 sc->sc_atac.atac_dev = self; 161 162 psc->sc_pc = pa->pa_pc; 163 psc->sc_pcitag = pa->pa_tag; 164 165 pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo, sizeof(devinfo)); 166 aprint_naive(": SATA-II HBA\n"); 167 aprint_normal(": %s\n", devinfo); 168 169 /* map BAR 0, global registers */ 170 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR0); 171 switch (memtype) { 172 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 173 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 174 memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR0, 175 memtype, 0, &memt, &memh, NULL, &grsize) == 0); 176 break; 177 default: 178 memh_valid = 0; 179 } 180 if (memh_valid) { 181 sc->sc_grt = memt; 182 sc->sc_grh = memh; 183 sc->sc_grs = grsize; 184 } else { 185 aprint_error_dev(self, "couldn't map global registers\n"); 186 return; 187 } 188 189 /* map BAR 1, port registers */ 190 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR1); 191 switch (memtype) { 192 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 193 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 194 memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR1, 195 memtype, 0, &memt, &memh, NULL, &prsize) == 0); 196 break; 197 default: 198 memh_valid = 0; 199 } 200 if (memh_valid) { 201 sc->sc_prt = memt; 202 sc->sc_prh = memh; 203 sc->sc_prs = prsize; 204 } else { 205 bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize); 206 aprint_error_dev(self, "couldn't map port registers\n"); 207 return; 208 } 209 210 if (pci_dma64_available(pa)) 211 sc->sc_dmat = pa->pa_dmat64; 212 else 213 sc->sc_dmat = pa->pa_dmat; 214 215 /* map interrupt */ 216 if (pci_intr_map(pa, &intrhandle) != 0) { 217 bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize); 218 bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize); 219 aprint_error_dev(self, "couldn't map interrupt\n"); 220 return; 221 } 222 intrstr = pci_intr_string(pa->pa_pc, intrhandle); 223 psc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, 224 IPL_BIO, siisata_intr, sc); 225 if (psc->sc_ih == NULL) { 226 bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize); 227 bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize); 228 aprint_error_dev(self, "couldn't establish interrupt at %s\n", 229 intrstr); 230 return; 231 } 232 aprint_normal_dev(self, "interrupting at %s\n", 233 intrstr ? intrstr : "unknown interrupt"); 234 235 /* fill in number of ports on this device */ 236 spbp = siisata_pci_lookup(pa); 237 KASSERT(spbp != NULL); 238 sc->sc_atac.atac_nchannels = spbp->spb_port; 239 240 /* set the necessary bits in case the firmware didn't */ 241 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 242 csr |= PCI_COMMAND_MASTER_ENABLE; 243 csr |= PCI_COMMAND_MEM_ENABLE; 244 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr); 245 246 gcreg = GRREAD(sc, GR_GC); 247 248 aprint_verbose_dev(self, "SiI%d, %sGb/s\n", 249 spbp->spb_chip, (gcreg & GR_GC_3GBPS) ? "3.0" : "1.5" ); 250 if (spbp->spb_chip == 3124) { 251 short width; 252 short speed; 253 char pcix = 1; 254 255 width = (gcreg & GR_GC_REQ64) ? 64 : 32; 256 257 switch (gcreg & (GR_GC_DEVSEL | GR_GC_STOP | GR_GC_TRDY)) { 258 case 0: 259 speed = (gcreg & GR_GC_M66EN) ? 66 : 33; 260 pcix = 0; 261 break; 262 case GR_GC_TRDY: 263 speed = 66; 264 break; 265 case GR_GC_STOP: 266 speed = 100; 267 break; 268 case GR_GC_STOP | GR_GC_TRDY: 269 speed = 133; 270 break; 271 default: 272 speed = -1; 273 break; 274 } 275 aprint_verbose_dev(self, "%hd-bit %hdMHz PCI%s\n", 276 width, speed, pcix ? "-X" : ""); 277 } 278 279 siisata_attach(sc); 280 281 if (!pmf_device_register(self, NULL, siisata_pci_resume)) 282 aprint_error_dev(self, "couldn't establish power handler\n"); 283} 284 285static int 286siisata_pci_detach(device_t dv, int flags) 287{ 288 struct siisata_pci_softc *psc = device_private(dv); 289 struct siisata_softc *sc = &psc->si_sc; 290 int rv; 291 292 rv = siisata_detach(sc, flags); 293 if (rv) 294 return rv; 295 296 if (psc->sc_ih != NULL) { 297 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 298 } 299 300 bus_space_unmap(sc->sc_prt, sc->sc_prh, sc->sc_prs); 301 bus_space_unmap(sc->sc_grt, sc->sc_grh, sc->sc_grs); 302 303 return 0; 304} 305 306static bool 307siisata_pci_resume(device_t dv PMF_FN_ARGS) 308{ 309 struct siisata_pci_softc *psc = device_private(dv); 310 struct siisata_softc *sc = &psc->si_sc; 311 int s; 312 313 s = splbio(); 314 siisata_resume(sc); 315 splx(s); 316 317 return true; 318} 319