bmx280thpspi.c revision 1.2
11.2Sthorpej/* $NetBSD: bmx280thpspi.c,v 1.2 2025/09/10 00:50:33 thorpej Exp $ */ 21.1Sbrad 31.1Sbrad/* 41.1Sbrad * Copyright (c) 2022 Brad Spencer <brad@anduin.eldar.org> 51.1Sbrad * 61.1Sbrad * Permission to use, copy, modify, and distribute this software for any 71.1Sbrad * purpose with or without fee is hereby granted, provided that the above 81.1Sbrad * copyright notice and this permission notice appear in all copies. 91.1Sbrad * 101.1Sbrad * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 111.1Sbrad * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 121.1Sbrad * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 131.1Sbrad * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 141.1Sbrad * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 151.1Sbrad * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 161.1Sbrad * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 171.1Sbrad */ 181.1Sbrad 191.1Sbrad#include <sys/cdefs.h> 201.2Sthorpej__KERNEL_RCSID(0, "$NetBSD: bmx280thpspi.c,v 1.2 2025/09/10 00:50:33 thorpej Exp $"); 211.1Sbrad 221.1Sbrad/* 231.1Sbrad * SPI driver for the Bosch BMP280 / BME280 sensor. 241.1Sbrad * Uses the common bmx280thp driver to do the real work. 251.1Sbrad*/ 261.1Sbrad 271.1Sbrad#include <sys/param.h> 281.1Sbrad#include <sys/systm.h> 291.1Sbrad#include <sys/kernel.h> 301.1Sbrad#include <sys/device.h> 311.1Sbrad#include <sys/module.h> 321.1Sbrad#include <sys/conf.h> 331.1Sbrad#include <sys/sysctl.h> 341.1Sbrad#include <sys/mutex.h> 351.1Sbrad#include <sys/condvar.h> 361.1Sbrad#include <sys/pool.h> 371.1Sbrad#include <sys/kmem.h> 381.1Sbrad 391.1Sbrad#include <dev/sysmon/sysmonvar.h> 401.1Sbrad#include <dev/i2c/i2cvar.h> 411.1Sbrad#include <dev/spi/spivar.h> 421.1Sbrad#include <dev/ic/bmx280reg.h> 431.1Sbrad#include <dev/ic/bmx280var.h> 441.1Sbrad 451.1Sbradextern void bmx280_attach(struct bmx280_sc *); 461.1Sbrad 471.1Sbradstatic int bmx280thpspi_match(device_t, cfdata_t, void *); 481.1Sbradstatic void bmx280thpspi_attach(device_t, device_t, void *); 491.1Sbradstatic int bmx280thpspi_detach(device_t, int); 501.1Sbrad 511.1Sbrad#define BMX280_DEBUG 521.1Sbrad#ifdef BMX280_DEBUG 531.1Sbrad#define DPRINTF(s, l, x) \ 541.1Sbrad do { \ 551.1Sbrad if (l <= s->sc_bmx280debug) \ 561.1Sbrad printf x; \ 571.1Sbrad } while (/*CONSTCOND*/0) 581.1Sbrad#else 591.1Sbrad#define DPRINTF(s, l, x) 601.1Sbrad#endif 611.1Sbrad 621.1SbradCFATTACH_DECL_NEW(bmx280thpspi, sizeof(struct bmx280_sc), 631.1Sbrad bmx280thpspi_match, bmx280thpspi_attach, bmx280thpspi_detach, NULL); 641.1Sbrad 651.1Sbrad/* The SPI interface of the chip, assuming that it has managed to get into that 661.1Sbrad * mode to start with, is pretty simple. Simply send the register MINUS the 7th 671.1Sbrad * bit which will be 1 and then do as many reads as you want. The chip will 681.1Sbrad * auto increment for you. 691.1Sbrad * 701.1Sbrad * The delays are only hinted at in the data sheet. 711.1Sbrad */ 721.1Sbrad 731.1Sbradstatic int 741.1Sbradbmx280thpspi_read_reg_direct(struct spi_handle *sh, uint8_t reg, 751.1Sbrad uint8_t *buf, size_t rlen) 761.1Sbrad{ 771.1Sbrad int err = 0; 781.1Sbrad uint8_t rreg = reg | 0x80; 791.1Sbrad 801.1Sbrad if (buf != NULL) { 811.1Sbrad err = spi_send_recv(sh, 1, &rreg, 821.1Sbrad rlen, buf); 831.1Sbrad } else { 841.1Sbrad err = spi_send(sh, 1, &rreg); 851.1Sbrad } 861.1Sbrad 871.1Sbrad return err; 881.1Sbrad} 891.1Sbrad 901.1Sbradstatic int 911.1Sbradbmx280thpspi_read_reg(struct bmx280_sc *sc, uint8_t reg, uint8_t *buf, size_t rlen) 921.1Sbrad{ 931.1Sbrad return bmx280thpspi_read_reg_direct(sc->sc_sh, reg, buf, rlen); 941.1Sbrad} 951.1Sbrad 961.1Sbrad/* SPI writes to this device are normal enough. You send the register 971.1Sbrad * you want making sure that the high bit, 0x80, is clear and then the 981.1Sbrad * data. These pairs can be repeated as many times as you like. 991.1Sbrad */ 1001.1Sbradstatic int 1011.1Sbradbmx280thpspi_write_reg_direct(struct spi_handle *sh, uint8_t *buf, size_t slen) 1021.1Sbrad{ 1031.1Sbrad int err = 0; 1041.1Sbrad int i; 1051.1Sbrad 1061.1Sbrad /* XXX - 1071.1Sbrad this is probably BAD thing to do... but we must insure that the 1081.1Sbrad registers have a cleared bit.. otherwise it is a read .... 1091.1Sbrad */ 1101.1Sbrad 1111.1Sbrad for(i = 0; i < slen;i+=2) { 1121.1Sbrad buf[i] = buf[i] & 0x7F; 1131.1Sbrad } 1141.1Sbrad 1151.1Sbrad err = spi_send(sh, slen, buf); 1161.1Sbrad 1171.1Sbrad return err; 1181.1Sbrad} 1191.1Sbrad 1201.1Sbradstatic int 1211.1Sbradbmx280thpspi_write_reg(struct bmx280_sc *sc, uint8_t *buf, size_t slen) 1221.1Sbrad{ 1231.1Sbrad return bmx280thpspi_write_reg_direct(sc->sc_sh, buf, slen); 1241.1Sbrad} 1251.1Sbrad 1261.1Sbrad/* These are to satisfy the common code */ 1271.1Sbradstatic int 1281.1Sbradbmx280thpspi_acquire_bus(struct bmx280_sc *sc) 1291.1Sbrad{ 1301.1Sbrad return 0; 1311.1Sbrad} 1321.1Sbrad 1331.1Sbradstatic void 1341.1Sbradbmx280thpspi_release_bus(struct bmx280_sc *sc) 1351.1Sbrad{ 1361.1Sbrad return; 1371.1Sbrad} 1381.1Sbrad 1391.1Sbrad/* Nothing more is done here. Assumptions on whether or not 1401.1Sbrad * the SPI interface is set up may not be proper.... for better 1411.1Sbrad * or worse... and there is setting that are needed such as the 1421.1Sbrad * SPI mode and bus speed that really should not be done here, so 1431.1Sbrad * any active match might not work anyway. 1441.1Sbrad */ 1451.1Sbradstatic int 1461.1Sbradbmx280thpspi_match(device_t parent, cfdata_t match, void *aux) 1471.1Sbrad{ 1481.1Sbrad const bool matchdebug = false; 1491.1Sbrad 1501.1Sbrad if (matchdebug) { 1511.1Sbrad printf("Trying to match\n"); 1521.1Sbrad } 1531.1Sbrad 1541.1Sbrad return 1; 1551.1Sbrad} 1561.1Sbrad 1571.1Sbradstatic void 1581.1Sbradbmx280thpspi_attach(device_t parent, device_t self, void *aux) 1591.1Sbrad{ 1601.1Sbrad struct bmx280_sc *sc; 1611.1Sbrad struct spi_attach_args *sa; 1621.1Sbrad int error; 1631.1Sbrad 1641.1Sbrad sa = aux; 1651.1Sbrad sc = device_private(self); 1661.1Sbrad 1671.1Sbrad sc->sc_dev = self; 1681.1Sbrad sc->sc_sh = sa->sa_handle; 1691.1Sbrad sc->sc_bmx280debug = 0; 1701.1Sbrad sc->sc_func_acquire_bus = &bmx280thpspi_acquire_bus; 1711.1Sbrad sc->sc_func_release_bus = &bmx280thpspi_release_bus; 1721.1Sbrad sc->sc_func_read_register = &bmx280thpspi_read_reg; 1731.1Sbrad sc->sc_func_write_register = &bmx280thpspi_write_reg; 1741.1Sbrad 1751.1Sbrad /* Configure for 1MHz and SPI mode 0 according to the data sheet. 1761.1Sbrad * The chip will actually handle a number of different modes and 1771.1Sbrad * can go a lot faster, just use this for now... 1781.1Sbrad */ 1791.2Sthorpej error = spi_configure(self, sa->sa_handle, SPI_MODE_0, SPI_FREQ_MHz(1)); 1801.1Sbrad if (error) { 1811.1Sbrad return; 1821.1Sbrad } 1831.1Sbrad 1841.1Sbrad /* Please note that if the pins are not set up for SPI, the attachment 1851.1Sbrad * will probably not work out. 1861.1Sbrad */ 1871.1Sbrad bmx280_attach(sc); 1881.1Sbrad 1891.1Sbrad return; 1901.1Sbrad} 1911.1Sbrad 1921.1Sbrad/* These really do not do a whole lot, as SPI devices do not seem to work 1931.1Sbrad * as modules. 1941.1Sbrad */ 1951.1Sbradstatic int 1961.1Sbradbmx280thpspi_detach(device_t self, int flags) 1971.1Sbrad{ 1981.1Sbrad struct bmx280_sc *sc; 1991.1Sbrad 2001.1Sbrad sc = device_private(self); 2011.1Sbrad 2021.1Sbrad mutex_destroy(&sc->sc_mutex); 2031.1Sbrad 2041.1Sbrad return 0; 2051.1Sbrad} 206