sljitNativeARM_T2_32.c revision 1.4
1/*	$NetBSD: sljitNativeARM_T2_32.c,v 1.4 2019/01/20 23:14:16 alnsn Exp $	*/
2
3/*
4 *    Stack-less Just-In-Time compiler
5 *
6 *    Copyright Zoltan Herczeg (hzmester@freemail.hu). All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without modification, are
9 * permitted provided that the following conditions are met:
10 *
11 *   1. Redistributions of source code must retain the above copyright notice, this list of
12 *      conditions and the following disclaimer.
13 *
14 *   2. Redistributions in binary form must reproduce the above copyright notice, this list
15 *      of conditions and the following disclaimer in the documentation and/or other materials
16 *      provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
19 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
21 * SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
23 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29SLJIT_API_FUNC_ATTRIBUTE const char* sljit_get_platform_name(void)
30{
31	return "ARM-Thumb2" SLJIT_CPUINFO;
32}
33
34/* Length of an instruction word. */
35typedef sljit_u32 sljit_ins;
36
37/* Last register + 1. */
38#define TMP_REG1	(SLJIT_NUMBER_OF_REGISTERS + 2)
39#define TMP_REG2	(SLJIT_NUMBER_OF_REGISTERS + 3)
40#define TMP_PC		(SLJIT_NUMBER_OF_REGISTERS + 4)
41
42#define TMP_FREG1	(0)
43#define TMP_FREG2	(SLJIT_NUMBER_OF_FLOAT_REGISTERS + 1)
44
45/* See sljit_emit_enter and sljit_emit_op0 if you want to change them. */
46static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = {
47	0, 0, 1, 2, 12, 11, 10, 9, 8, 7, 6, 5, 4, 13, 3, 14, 15
48};
49
50#define COPY_BITS(src, from, to, bits) \
51	((from >= to ? (src >> (from - to)) : (src << (to - from))) & (((1 << bits) - 1) << to))
52
53/* Thumb16 encodings. */
54#define RD3(rd) (reg_map[rd])
55#define RN3(rn) (reg_map[rn] << 3)
56#define RM3(rm) (reg_map[rm] << 6)
57#define RDN3(rdn) (reg_map[rdn] << 8)
58#define IMM3(imm) (imm << 6)
59#define IMM8(imm) (imm)
60
61/* Thumb16 helpers. */
62#define SET_REGS44(rd, rn) \
63	((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4))
64#define IS_2_LO_REGS(reg1, reg2) \
65	(reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
66#define IS_3_LO_REGS(reg1, reg2, reg3) \
67	(reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
68
69/* Thumb32 encodings. */
70#define RD4(rd) (reg_map[rd] << 8)
71#define RN4(rn) (reg_map[rn] << 16)
72#define RM4(rm) (reg_map[rm])
73#define RT4(rt) (reg_map[rt] << 12)
74#define DD4(dd) ((dd) << 12)
75#define DN4(dn) ((dn) << 16)
76#define DM4(dm) (dm)
77#define IMM5(imm) \
78	(COPY_BITS(imm, 2, 12, 3) | ((imm & 0x3) << 6))
79#define IMM12(imm) \
80	(COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff))
81
82/* --------------------------------------------------------------------- */
83/*  Instrucion forms                                                     */
84/* --------------------------------------------------------------------- */
85
86/* dot '.' changed to _
87   I immediate form (possibly followed by number of immediate bits). */
88#define ADCI		0xf1400000
89#define ADCS		0x4140
90#define ADC_W		0xeb400000
91#define ADD		0x4400
92#define ADDS		0x1800
93#define ADDSI3		0x1c00
94#define ADDSI8		0x3000
95#define ADD_W		0xeb000000
96#define ADDWI		0xf2000000
97#define ADD_SP		0xb000
98#define ADD_W		0xeb000000
99#define ADD_WI		0xf1000000
100#define ANDI		0xf0000000
101#define ANDS		0x4000
102#define AND_W		0xea000000
103#define ASRS		0x4100
104#define ASRSI		0x1000
105#define ASR_W		0xfa40f000
106#define ASR_WI		0xea4f0020
107#define BICI		0xf0200000
108#define BKPT		0xbe00
109#define BLX		0x4780
110#define BX		0x4700
111#define CLZ		0xfab0f080
112#define CMPI		0x2800
113#define CMP_W		0xebb00f00
114#define EORI		0xf0800000
115#define EORS		0x4040
116#define EOR_W		0xea800000
117#define IT		0xbf00
118#define LSLS		0x4080
119#define LSLSI		0x0000
120#define LSL_W		0xfa00f000
121#define LSL_WI		0xea4f0000
122#define LSRS		0x40c0
123#define LSRSI		0x0800
124#define LSR_W		0xfa20f000
125#define LSR_WI		0xea4f0010
126#define MOV		0x4600
127#define MOVS		0x0000
128#define MOVSI		0x2000
129#define MOVT		0xf2c00000
130#define MOVW		0xf2400000
131#define MOV_W		0xea4f0000
132#define MOV_WI		0xf04f0000
133#define MUL		0xfb00f000
134#define MVNS		0x43c0
135#define MVN_W		0xea6f0000
136#define MVN_WI		0xf06f0000
137#define NOP		0xbf00
138#define ORNI		0xf0600000
139#define ORRI		0xf0400000
140#define ORRS		0x4300
141#define ORR_W		0xea400000
142#define POP		0xbc00
143#define POP_W		0xe8bd0000
144#define PUSH		0xb400
145#define PUSH_W		0xe92d0000
146#define RSB_WI		0xf1c00000
147#define RSBSI		0x4240
148#define SBCI		0xf1600000
149#define SBCS		0x4180
150#define SBC_W		0xeb600000
151#define SMULL		0xfb800000
152#define STR_SP		0x9000
153#define SUBS		0x1a00
154#define SUBSI3		0x1e00
155#define SUBSI8		0x3800
156#define SUB_W		0xeba00000
157#define SUBWI		0xf2a00000
158#define SUB_SP		0xb080
159#define SUB_WI		0xf1a00000
160#define SXTB		0xb240
161#define SXTB_W		0xfa4ff080
162#define SXTH		0xb200
163#define SXTH_W		0xfa0ff080
164#define TST		0x4200
165#define UMULL		0xfba00000
166#define UXTB		0xb2c0
167#define UXTB_W		0xfa5ff080
168#define UXTH		0xb280
169#define UXTH_W		0xfa1ff080
170#define VABS_F32	0xeeb00ac0
171#define VADD_F32	0xee300a00
172#define VCMP_F32	0xeeb40a40
173#define VCVT_F32_S32	0xeeb80ac0
174#define VCVT_F64_F32	0xeeb70ac0
175#define VCVT_S32_F32	0xeebd0ac0
176#define VDIV_F32	0xee800a00
177#define VMOV_F32	0xeeb00a40
178#define VMOV		0xee000a10
179#define VMRS		0xeef1fa10
180#define VMUL_F32	0xee200a00
181#define VNEG_F32	0xeeb10a40
182#define VSTR_F32	0xed000a00
183#define VSUB_F32	0xee300a40
184
185static sljit_s32 push_inst16(struct sljit_compiler *compiler, sljit_ins inst)
186{
187	sljit_u16 *ptr;
188	SLJIT_ASSERT(!(inst & 0xffff0000));
189
190	ptr = (sljit_u16*)ensure_buf(compiler, sizeof(sljit_u16));
191	FAIL_IF(!ptr);
192	*ptr = inst;
193	compiler->size++;
194	return SLJIT_SUCCESS;
195}
196
197static sljit_s32 push_inst32(struct sljit_compiler *compiler, sljit_ins inst)
198{
199	sljit_u16 *ptr = (sljit_u16*)ensure_buf(compiler, sizeof(sljit_ins));
200	FAIL_IF(!ptr);
201	*ptr++ = inst >> 16;
202	*ptr = inst;
203	compiler->size += 2;
204	return SLJIT_SUCCESS;
205}
206
207static SLJIT_INLINE sljit_s32 emit_imm32_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_uw imm)
208{
209	FAIL_IF(push_inst32(compiler, MOVW | RD4(dst) |
210		COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff)));
211	return push_inst32(compiler, MOVT | RD4(dst) |
212		COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) | ((imm & 0xff0000) >> 16));
213}
214
215static SLJIT_INLINE void modify_imm32_const(sljit_u16 *inst, sljit_uw new_imm)
216{
217	sljit_s32 dst = inst[1] & 0x0f00;
218	SLJIT_ASSERT(((inst[0] & 0xfbf0) == (MOVW >> 16)) && ((inst[2] & 0xfbf0) == (MOVT >> 16)) && dst == (inst[3] & 0x0f00));
219	inst[0] = (MOVW >> 16) | COPY_BITS(new_imm, 12, 0, 4) | COPY_BITS(new_imm, 11, 10, 1);
220	inst[1] = dst | COPY_BITS(new_imm, 8, 12, 3) | (new_imm & 0xff);
221	inst[2] = (MOVT >> 16) | COPY_BITS(new_imm, 12 + 16, 0, 4) | COPY_BITS(new_imm, 11 + 16, 10, 1);
222	inst[3] = dst | COPY_BITS(new_imm, 8 + 16, 12, 3) | ((new_imm & 0xff0000) >> 16);
223}
224
225static SLJIT_INLINE sljit_s32 detect_jump_type(struct sljit_jump *jump, sljit_u16 *code_ptr, sljit_u16 *code, sljit_sw executable_offset)
226{
227	sljit_sw diff;
228
229	if (jump->flags & SLJIT_REWRITABLE_JUMP)
230		return 0;
231
232	if (jump->flags & JUMP_ADDR) {
233		/* Branch to ARM code is not optimized yet. */
234		if (!(jump->u.target & 0x1))
235			return 0;
236		diff = ((sljit_sw)jump->u.target - (sljit_sw)(code_ptr + 2) - executable_offset) >> 1;
237	}
238	else {
239		SLJIT_ASSERT(jump->flags & JUMP_LABEL);
240		diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)(code_ptr + 2)) >> 1;
241	}
242
243	if (jump->flags & IS_COND) {
244		SLJIT_ASSERT(!(jump->flags & IS_BL));
245		if (diff <= 127 && diff >= -128) {
246			jump->flags |= PATCH_TYPE1;
247			return 5;
248		}
249		if (diff <= 524287 && diff >= -524288) {
250			jump->flags |= PATCH_TYPE2;
251			return 4;
252		}
253		/* +1 comes from the prefix IT instruction. */
254		diff--;
255		if (diff <= 8388607 && diff >= -8388608) {
256			jump->flags |= PATCH_TYPE3;
257			return 3;
258		}
259	}
260	else if (jump->flags & IS_BL) {
261		if (diff <= 8388607 && diff >= -8388608) {
262			jump->flags |= PATCH_BL;
263			return 3;
264		}
265	}
266	else {
267		if (diff <= 1023 && diff >= -1024) {
268			jump->flags |= PATCH_TYPE4;
269			return 4;
270		}
271		if (diff <= 8388607 && diff >= -8388608) {
272			jump->flags |= PATCH_TYPE5;
273			return 3;
274		}
275	}
276
277	return 0;
278}
279
280static SLJIT_INLINE void set_jump_instruction(struct sljit_jump *jump, sljit_sw executable_offset)
281{
282	sljit_s32 type = (jump->flags >> 4) & 0xf;
283	sljit_sw diff;
284	sljit_u16 *jump_inst;
285	sljit_s32 s, j1, j2;
286
287	if (SLJIT_UNLIKELY(type == 0)) {
288		modify_imm32_const((sljit_u16*)jump->addr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target);
289		return;
290	}
291
292	if (jump->flags & JUMP_ADDR) {
293		SLJIT_ASSERT(jump->u.target & 0x1);
294		diff = ((sljit_sw)jump->u.target - (sljit_sw)(jump->addr + sizeof(sljit_u32)) - executable_offset) >> 1;
295	}
296	else {
297		SLJIT_ASSERT(jump->u.label->addr & 0x1);
298		diff = ((sljit_sw)(jump->u.label->addr) - (sljit_sw)(jump->addr + sizeof(sljit_u32)) - executable_offset) >> 1;
299	}
300	jump_inst = (sljit_u16*)jump->addr;
301
302	switch (type) {
303	case 1:
304		/* Encoding T1 of 'B' instruction */
305		SLJIT_ASSERT(diff <= 127 && diff >= -128 && (jump->flags & IS_COND));
306		jump_inst[0] = 0xd000 | (jump->flags & 0xf00) | (diff & 0xff);
307		return;
308	case 2:
309		/* Encoding T3 of 'B' instruction */
310		SLJIT_ASSERT(diff <= 524287 && diff >= -524288 && (jump->flags & IS_COND));
311		jump_inst[0] = 0xf000 | COPY_BITS(jump->flags, 8, 6, 4) | COPY_BITS(diff, 11, 0, 6) | COPY_BITS(diff, 19, 10, 1);
312		jump_inst[1] = 0x8000 | COPY_BITS(diff, 17, 13, 1) | COPY_BITS(diff, 18, 11, 1) | (diff & 0x7ff);
313		return;
314	case 3:
315		SLJIT_ASSERT(jump->flags & IS_COND);
316		*jump_inst++ = IT | ((jump->flags >> 4) & 0xf0) | 0x8;
317		diff--;
318		type = 5;
319		break;
320	case 4:
321		/* Encoding T2 of 'B' instruction */
322		SLJIT_ASSERT(diff <= 1023 && diff >= -1024 && !(jump->flags & IS_COND));
323		jump_inst[0] = 0xe000 | (diff & 0x7ff);
324		return;
325	}
326
327	SLJIT_ASSERT(diff <= 8388607 && diff >= -8388608);
328
329	/* Really complex instruction form for branches. */
330	s = (diff >> 23) & 0x1;
331	j1 = (~(diff >> 21) ^ s) & 0x1;
332	j2 = (~(diff >> 22) ^ s) & 0x1;
333	jump_inst[0] = 0xf000 | (s << 10) | COPY_BITS(diff, 11, 0, 10);
334	jump_inst[1] = (j1 << 13) | (j2 << 11) | (diff & 0x7ff);
335
336	/* The others have a common form. */
337	if (type == 5) /* Encoding T4 of 'B' instruction */
338		jump_inst[1] |= 0x9000;
339	else if (type == 6) /* Encoding T1 of 'BL' instruction */
340		jump_inst[1] |= 0xd000;
341	else
342		SLJIT_UNREACHABLE();
343}
344
345SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
346{
347	struct sljit_memory_fragment *buf;
348	sljit_u16 *code;
349	sljit_u16 *code_ptr;
350	sljit_u16 *buf_ptr;
351	sljit_u16 *buf_end;
352	sljit_uw half_count;
353	sljit_sw executable_offset;
354
355	struct sljit_label *label;
356	struct sljit_jump *jump;
357	struct sljit_const *const_;
358
359	CHECK_ERROR_PTR();
360	CHECK_PTR(check_sljit_generate_code(compiler));
361	reverse_buf(compiler);
362
363	code = (sljit_u16*)SLJIT_MALLOC_EXEC(compiler->size * sizeof(sljit_u16));
364	PTR_FAIL_WITH_EXEC_IF(code);
365	buf = compiler->buf;
366
367	code_ptr = code;
368	half_count = 0;
369	executable_offset = SLJIT_EXEC_OFFSET(code);
370
371	label = compiler->labels;
372	jump = compiler->jumps;
373	const_ = compiler->consts;
374
375	do {
376		buf_ptr = (sljit_u16*)buf->memory;
377		buf_end = buf_ptr + (buf->used_size >> 1);
378		do {
379			*code_ptr = *buf_ptr++;
380			/* These structures are ordered by their address. */
381			SLJIT_ASSERT(!label || label->size >= half_count);
382			SLJIT_ASSERT(!jump || jump->addr >= half_count);
383			SLJIT_ASSERT(!const_ || const_->addr >= half_count);
384			if (label && label->size == half_count) {
385				label->addr = ((sljit_uw)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset)) | 0x1;
386				label->size = code_ptr - code;
387				label = label->next;
388			}
389			if (jump && jump->addr == half_count) {
390					jump->addr = (sljit_uw)code_ptr - ((jump->flags & IS_COND) ? 10 : 8);
391					code_ptr -= detect_jump_type(jump, code_ptr, code, executable_offset);
392					jump = jump->next;
393			}
394			if (const_ && const_->addr == half_count) {
395				const_->addr = (sljit_uw)code_ptr;
396				const_ = const_->next;
397			}
398			code_ptr ++;
399			half_count ++;
400		} while (buf_ptr < buf_end);
401
402		buf = buf->next;
403	} while (buf);
404
405	if (label && label->size == half_count) {
406		label->addr = ((sljit_uw)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset)) | 0x1;
407		label->size = code_ptr - code;
408		label = label->next;
409	}
410
411	SLJIT_ASSERT(!label);
412	SLJIT_ASSERT(!jump);
413	SLJIT_ASSERT(!const_);
414	SLJIT_ASSERT(code_ptr - code <= (sljit_sw)compiler->size);
415
416	jump = compiler->jumps;
417	while (jump) {
418		set_jump_instruction(jump, executable_offset);
419		jump = jump->next;
420	}
421
422	compiler->error = SLJIT_ERR_COMPILED;
423	compiler->executable_offset = executable_offset;
424	compiler->executable_size = (code_ptr - code) * sizeof(sljit_u16);
425
426	code = (sljit_u16 *)SLJIT_ADD_EXEC_OFFSET(code, executable_offset);
427	code_ptr = (sljit_u16 *)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset);
428
429	SLJIT_CACHE_FLUSH(code, code_ptr);
430	/* Set thumb mode flag. */
431	return (void*)((sljit_uw)code | 0x1);
432}
433
434/* --------------------------------------------------------------------- */
435/*  Core code generator functions.                                       */
436/* --------------------------------------------------------------------- */
437
438#define INVALID_IMM	0x80000000
439static sljit_uw get_imm(sljit_uw imm)
440{
441	/* Thumb immediate form. */
442	sljit_s32 counter;
443
444	if (imm <= 0xff)
445		return imm;
446
447	if ((imm & 0xffff) == (imm >> 16)) {
448		/* Some special cases. */
449		if (!(imm & 0xff00))
450			return (1 << 12) | (imm & 0xff);
451		if (!(imm & 0xff))
452			return (2 << 12) | ((imm >> 8) & 0xff);
453		if ((imm & 0xff00) == ((imm & 0xff) << 8))
454			return (3 << 12) | (imm & 0xff);
455	}
456
457	/* Assembly optimization: count leading zeroes? */
458	counter = 8;
459	if (!(imm & 0xffff0000)) {
460		counter += 16;
461		imm <<= 16;
462	}
463	if (!(imm & 0xff000000)) {
464		counter += 8;
465		imm <<= 8;
466	}
467	if (!(imm & 0xf0000000)) {
468		counter += 4;
469		imm <<= 4;
470	}
471	if (!(imm & 0xc0000000)) {
472		counter += 2;
473		imm <<= 2;
474	}
475	if (!(imm & 0x80000000)) {
476		counter += 1;
477		imm <<= 1;
478	}
479	/* Since imm >= 128, this must be true. */
480	SLJIT_ASSERT(counter <= 31);
481
482	if (imm & 0x00ffffff)
483		return INVALID_IMM; /* Cannot be encoded. */
484
485	return ((imm >> 24) & 0x7f) | COPY_BITS(counter, 4, 26, 1) | COPY_BITS(counter, 1, 12, 3) | COPY_BITS(counter, 0, 7, 1);
486}
487
488static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst, sljit_uw imm)
489{
490	sljit_uw tmp;
491
492	if (imm >= 0x10000) {
493		tmp = get_imm(imm);
494		if (tmp != INVALID_IMM)
495			return push_inst32(compiler, MOV_WI | RD4(dst) | tmp);
496		tmp = get_imm(~imm);
497		if (tmp != INVALID_IMM)
498			return push_inst32(compiler, MVN_WI | RD4(dst) | tmp);
499	}
500
501	/* set low 16 bits, set hi 16 bits to 0. */
502	FAIL_IF(push_inst32(compiler, MOVW | RD4(dst) |
503		COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff)));
504
505	/* set hi 16 bit if needed. */
506	if (imm >= 0x10000)
507		return push_inst32(compiler, MOVT | RD4(dst) |
508			COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) | ((imm & 0xff0000) >> 16));
509	return SLJIT_SUCCESS;
510}
511
512#define ARG1_IMM	0x0010000
513#define ARG2_IMM	0x0020000
514/* SET_FLAGS must be 0x100000 as it is also the value of S bit (can be used for optimization). */
515#define SET_FLAGS	0x0100000
516#define UNUSED_RETURN	0x0200000
517
518static sljit_s32 emit_op_imm(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 dst, sljit_uw arg1, sljit_uw arg2)
519{
520	/* dst must be register, TMP_REG1
521	   arg1 must be register, imm
522	   arg2 must be register, imm */
523	sljit_s32 reg;
524	sljit_uw imm, nimm;
525
526	if (SLJIT_UNLIKELY((flags & (ARG1_IMM | ARG2_IMM)) == (ARG1_IMM | ARG2_IMM))) {
527		/* Both are immediates, no temporaries are used. */
528		flags &= ~ARG1_IMM;
529		FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
530		arg1 = TMP_REG1;
531	}
532
533	if (flags & (ARG1_IMM | ARG2_IMM)) {
534		reg = (flags & ARG2_IMM) ? arg1 : arg2;
535		imm = (flags & ARG2_IMM) ? arg2 : arg1;
536
537		switch (flags & 0xffff) {
538		case SLJIT_CLZ:
539		case SLJIT_MUL:
540			/* No form with immediate operand. */
541			break;
542		case SLJIT_MOV:
543			SLJIT_ASSERT(!(flags & SET_FLAGS) && (flags & ARG2_IMM) && arg1 == TMP_REG2);
544			return load_immediate(compiler, dst, imm);
545		case SLJIT_NOT:
546			if (!(flags & SET_FLAGS))
547				return load_immediate(compiler, dst, ~imm);
548			/* Since the flags should be set, we just fallback to the register mode.
549			   Although some clever things could be done here, "NOT IMM" does not worth the efforts. */
550			break;
551		case SLJIT_ADD:
552			nimm = -imm;
553			if (IS_2_LO_REGS(reg, dst)) {
554				if (imm <= 0x7)
555					return push_inst16(compiler, ADDSI3 | IMM3(imm) | RD3(dst) | RN3(reg));
556				if (nimm <= 0x7)
557					return push_inst16(compiler, SUBSI3 | IMM3(nimm) | RD3(dst) | RN3(reg));
558				if (reg == dst) {
559					if (imm <= 0xff)
560						return push_inst16(compiler, ADDSI8 | IMM8(imm) | RDN3(dst));
561					if (nimm <= 0xff)
562						return push_inst16(compiler, SUBSI8 | IMM8(nimm) | RDN3(dst));
563				}
564			}
565			if (!(flags & SET_FLAGS)) {
566				if (imm <= 0xfff)
567					return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(imm));
568				if (nimm <= 0xfff)
569					return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(nimm));
570			}
571			imm = get_imm(imm);
572			if (imm != INVALID_IMM)
573				return push_inst32(compiler, ADD_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
574			break;
575		case SLJIT_ADDC:
576			imm = get_imm(imm);
577			if (imm != INVALID_IMM)
578				return push_inst32(compiler, ADCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
579			break;
580		case SLJIT_SUB:
581			if (flags & ARG1_IMM) {
582				if (imm == 0 && IS_2_LO_REGS(reg, dst))
583					return push_inst16(compiler, RSBSI | RD3(dst) | RN3(reg));
584				imm = get_imm(imm);
585				if (imm != INVALID_IMM)
586					return push_inst32(compiler, RSB_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
587				break;
588			}
589			nimm = -imm;
590			if (IS_2_LO_REGS(reg, dst)) {
591				if (imm <= 0x7)
592					return push_inst16(compiler, SUBSI3 | IMM3(imm) | RD3(dst) | RN3(reg));
593				if (nimm <= 0x7)
594					return push_inst16(compiler, ADDSI3 | IMM3(nimm) | RD3(dst) | RN3(reg));
595				if (reg == dst) {
596					if (imm <= 0xff)
597						return push_inst16(compiler, SUBSI8 | IMM8(imm) | RDN3(dst));
598					if (nimm <= 0xff)
599						return push_inst16(compiler, ADDSI8 | IMM8(nimm) | RDN3(dst));
600				}
601				if (imm <= 0xff && (flags & UNUSED_RETURN))
602					return push_inst16(compiler, CMPI | IMM8(imm) | RDN3(reg));
603			}
604			if (!(flags & SET_FLAGS)) {
605				if (imm <= 0xfff)
606					return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(imm));
607				if (nimm <= 0xfff)
608					return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(nimm));
609			}
610			imm = get_imm(imm);
611			if (imm != INVALID_IMM)
612				return push_inst32(compiler, SUB_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
613			break;
614		case SLJIT_SUBC:
615			if (flags & ARG1_IMM)
616				break;
617			imm = get_imm(imm);
618			if (imm != INVALID_IMM)
619				return push_inst32(compiler, SBCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
620			break;
621		case SLJIT_AND:
622			nimm = get_imm(imm);
623			if (nimm != INVALID_IMM)
624				return push_inst32(compiler, ANDI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | nimm);
625			imm = get_imm(imm);
626			if (imm != INVALID_IMM)
627				return push_inst32(compiler, BICI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
628			break;
629		case SLJIT_OR:
630			nimm = get_imm(imm);
631			if (nimm != INVALID_IMM)
632				return push_inst32(compiler, ORRI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | nimm);
633			imm = get_imm(imm);
634			if (imm != INVALID_IMM)
635				return push_inst32(compiler, ORNI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
636			break;
637		case SLJIT_XOR:
638			imm = get_imm(imm);
639			if (imm != INVALID_IMM)
640				return push_inst32(compiler, EORI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
641			break;
642		case SLJIT_SHL:
643		case SLJIT_LSHR:
644		case SLJIT_ASHR:
645			if (flags & ARG1_IMM)
646				break;
647			imm &= 0x1f;
648			if (imm == 0) {
649				if (!(flags & SET_FLAGS))
650					return push_inst16(compiler, MOV | SET_REGS44(dst, reg));
651				if (IS_2_LO_REGS(dst, reg))
652					return push_inst16(compiler, MOVS | RD3(dst) | RN3(reg));
653				return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(dst) | RM4(reg));
654			}
655			switch (flags & 0xffff) {
656			case SLJIT_SHL:
657				if (IS_2_LO_REGS(dst, reg))
658					return push_inst16(compiler, LSLSI | RD3(dst) | RN3(reg) | (imm << 6));
659				return push_inst32(compiler, LSL_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
660			case SLJIT_LSHR:
661				if (IS_2_LO_REGS(dst, reg))
662					return push_inst16(compiler, LSRSI | RD3(dst) | RN3(reg) | (imm << 6));
663				return push_inst32(compiler, LSR_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
664			default: /* SLJIT_ASHR */
665				if (IS_2_LO_REGS(dst, reg))
666					return push_inst16(compiler, ASRSI | RD3(dst) | RN3(reg) | (imm << 6));
667				return push_inst32(compiler, ASR_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
668			}
669		default:
670			SLJIT_UNREACHABLE();
671			break;
672		}
673
674		if (flags & ARG2_IMM) {
675			imm = arg2;
676			arg2 = (arg1 == TMP_REG1) ? TMP_REG2 : TMP_REG1;
677			FAIL_IF(load_immediate(compiler, arg2, imm));
678		}
679		else {
680			imm = arg1;
681			arg1 = (arg2 == TMP_REG1) ? TMP_REG2 : TMP_REG1;
682			FAIL_IF(load_immediate(compiler, arg1, imm));
683		}
684
685		SLJIT_ASSERT(arg1 != arg2);
686	}
687
688	/* Both arguments are registers. */
689	switch (flags & 0xffff) {
690	case SLJIT_MOV:
691	case SLJIT_MOV_U32:
692	case SLJIT_MOV_S32:
693	case SLJIT_MOV_P:
694	case SLJIT_MOVU:
695	case SLJIT_MOVU_U32:
696	case SLJIT_MOVU_S32:
697	case SLJIT_MOVU_P:
698		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
699		if (dst == arg2)
700			return SLJIT_SUCCESS;
701		return push_inst16(compiler, MOV | SET_REGS44(dst, arg2));
702	case SLJIT_MOV_U8:
703	case SLJIT_MOVU_U8:
704		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
705		if (IS_2_LO_REGS(dst, arg2))
706			return push_inst16(compiler, UXTB | RD3(dst) | RN3(arg2));
707		return push_inst32(compiler, UXTB_W | RD4(dst) | RM4(arg2));
708	case SLJIT_MOV_S8:
709	case SLJIT_MOVU_S8:
710		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
711		if (IS_2_LO_REGS(dst, arg2))
712			return push_inst16(compiler, SXTB | RD3(dst) | RN3(arg2));
713		return push_inst32(compiler, SXTB_W | RD4(dst) | RM4(arg2));
714	case SLJIT_MOV_U16:
715	case SLJIT_MOVU_U16:
716		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
717		if (IS_2_LO_REGS(dst, arg2))
718			return push_inst16(compiler, UXTH | RD3(dst) | RN3(arg2));
719		return push_inst32(compiler, UXTH_W | RD4(dst) | RM4(arg2));
720	case SLJIT_MOV_S16:
721	case SLJIT_MOVU_S16:
722		SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
723		if (IS_2_LO_REGS(dst, arg2))
724			return push_inst16(compiler, SXTH | RD3(dst) | RN3(arg2));
725		return push_inst32(compiler, SXTH_W | RD4(dst) | RM4(arg2));
726	case SLJIT_NOT:
727		SLJIT_ASSERT(arg1 == TMP_REG2);
728		if (IS_2_LO_REGS(dst, arg2))
729			return push_inst16(compiler, MVNS | RD3(dst) | RN3(arg2));
730		return push_inst32(compiler, MVN_W | (flags & SET_FLAGS) | RD4(dst) | RM4(arg2));
731	case SLJIT_CLZ:
732		SLJIT_ASSERT(arg1 == TMP_REG2);
733		FAIL_IF(push_inst32(compiler, CLZ | RN4(arg2) | RD4(dst) | RM4(arg2)));
734		if (flags & SET_FLAGS) {
735			if (reg_map[dst] <= 7)
736				return push_inst16(compiler, CMPI | RDN3(dst));
737			return push_inst32(compiler, ADD_WI | SET_FLAGS | RN4(dst) | RD4(dst));
738		}
739		return SLJIT_SUCCESS;
740	case SLJIT_ADD:
741		if (IS_3_LO_REGS(dst, arg1, arg2))
742			return push_inst16(compiler, ADDS | RD3(dst) | RN3(arg1) | RM3(arg2));
743		if (dst == arg1 && !(flags & SET_FLAGS))
744			return push_inst16(compiler, ADD | SET_REGS44(dst, arg2));
745		return push_inst32(compiler, ADD_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
746	case SLJIT_ADDC:
747		if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
748			return push_inst16(compiler, ADCS | RD3(dst) | RN3(arg2));
749		return push_inst32(compiler, ADC_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
750	case SLJIT_SUB:
751		if (IS_3_LO_REGS(dst, arg1, arg2))
752			return push_inst16(compiler, SUBS | RD3(dst) | RN3(arg1) | RM3(arg2));
753		return push_inst32(compiler, SUB_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
754	case SLJIT_SUBC:
755		if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
756			return push_inst16(compiler, SBCS | RD3(dst) | RN3(arg2));
757		return push_inst32(compiler, SBC_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
758	case SLJIT_MUL:
759		if (!(flags & SET_FLAGS))
760			return push_inst32(compiler, MUL | RD4(dst) | RN4(arg1) | RM4(arg2));
761		SLJIT_ASSERT(dst != TMP_REG2);
762		FAIL_IF(push_inst32(compiler, SMULL | RT4(dst) | RD4(TMP_REG2) | RN4(arg1) | RM4(arg2)));
763		/* cmp TMP_REG2, dst asr #31. */
764		return push_inst32(compiler, CMP_W | RN4(TMP_REG2) | 0x70e0 | RM4(dst));
765	case SLJIT_AND:
766		if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
767			return push_inst16(compiler, ANDS | RD3(dst) | RN3(arg2));
768		if ((flags & UNUSED_RETURN) && IS_2_LO_REGS(arg1, arg2))
769			return push_inst16(compiler, TST | RD3(arg1) | RN3(arg2));
770		return push_inst32(compiler, AND_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
771	case SLJIT_OR:
772		if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
773			return push_inst16(compiler, ORRS | RD3(dst) | RN3(arg2));
774		return push_inst32(compiler, ORR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
775	case SLJIT_XOR:
776		if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
777			return push_inst16(compiler, EORS | RD3(dst) | RN3(arg2));
778		return push_inst32(compiler, EOR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
779	case SLJIT_SHL:
780		if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
781			return push_inst16(compiler, LSLS | RD3(dst) | RN3(arg2));
782		return push_inst32(compiler, LSL_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
783	case SLJIT_LSHR:
784		if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
785			return push_inst16(compiler, LSRS | RD3(dst) | RN3(arg2));
786		return push_inst32(compiler, LSR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
787	case SLJIT_ASHR:
788		if (dst == arg1 && IS_2_LO_REGS(dst, arg2))
789			return push_inst16(compiler, ASRS | RD3(dst) | RN3(arg2));
790		return push_inst32(compiler, ASR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
791	}
792
793	SLJIT_UNREACHABLE();
794	return SLJIT_SUCCESS;
795}
796
797#define STORE		0x01
798#define SIGNED		0x02
799
800#define WORD_SIZE	0x00
801#define BYTE_SIZE	0x04
802#define HALF_SIZE	0x08
803
804#define UPDATE		0x10
805
806#define IS_WORD_SIZE(flags)		(!(flags & (BYTE_SIZE | HALF_SIZE)))
807#define OFFSET_CHECK(imm, shift)	(!(argw & ~(imm << shift)))
808
809/*
810  1st letter:
811  w = word
812  b = byte
813  h = half
814
815  2nd letter:
816  s = signed
817  u = unsigned
818
819  3rd letter:
820  l = load
821  s = store
822*/
823
824static const sljit_ins sljit_mem16[12] = {
825/* w u l */ 0x5800 /* ldr */,
826/* w u s */ 0x5000 /* str */,
827/* w s l */ 0x5800 /* ldr */,
828/* w s s */ 0x5000 /* str */,
829
830/* b u l */ 0x5c00 /* ldrb */,
831/* b u s */ 0x5400 /* strb */,
832/* b s l */ 0x5600 /* ldrsb */,
833/* b s s */ 0x5400 /* strb */,
834
835/* h u l */ 0x5a00 /* ldrh */,
836/* h u s */ 0x5200 /* strh */,
837/* h s l */ 0x5e00 /* ldrsh */,
838/* h s s */ 0x5200 /* strh */,
839};
840
841static const sljit_ins sljit_mem16_imm5[12] = {
842/* w u l */ 0x6800 /* ldr imm5 */,
843/* w u s */ 0x6000 /* str imm5 */,
844/* w s l */ 0x6800 /* ldr imm5 */,
845/* w s s */ 0x6000 /* str imm5 */,
846
847/* b u l */ 0x7800 /* ldrb imm5 */,
848/* b u s */ 0x7000 /* strb imm5 */,
849/* b s l */ 0x0000 /* not allowed */,
850/* b s s */ 0x7000 /* strb imm5 */,
851
852/* h u l */ 0x8800 /* ldrh imm5 */,
853/* h u s */ 0x8000 /* strh imm5 */,
854/* h s l */ 0x0000 /* not allowed */,
855/* h s s */ 0x8000 /* strh imm5 */,
856};
857
858#define MEM_IMM8	0xc00
859#define MEM_IMM12	0x800000
860static const sljit_ins sljit_mem32[12] = {
861/* w u l */ 0xf8500000 /* ldr.w */,
862/* w u s */ 0xf8400000 /* str.w */,
863/* w s l */ 0xf8500000 /* ldr.w */,
864/* w s s */ 0xf8400000 /* str.w */,
865
866/* b u l */ 0xf8100000 /* ldrb.w */,
867/* b u s */ 0xf8000000 /* strb.w */,
868/* b s l */ 0xf9100000 /* ldrsb.w */,
869/* b s s */ 0xf8000000 /* strb.w */,
870
871/* h u l */ 0xf8300000 /* ldrh.w */,
872/* h u s */ 0xf8200000 /* strsh.w */,
873/* h s l */ 0xf9300000 /* ldrsh.w */,
874/* h s s */ 0xf8200000 /* strsh.w */,
875};
876
877/* Helper function. Dst should be reg + value, using at most 1 instruction, flags does not set. */
878static sljit_s32 emit_set_delta(struct sljit_compiler *compiler, sljit_s32 dst, sljit_s32 reg, sljit_sw value)
879{
880	if (value >= 0) {
881		if (value <= 0xfff)
882			return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(value));
883		value = get_imm(value);
884		if (value != INVALID_IMM)
885			return push_inst32(compiler, ADD_WI | RD4(dst) | RN4(reg) | value);
886	}
887	else {
888		value = -value;
889		if (value <= 0xfff)
890			return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(value));
891		value = get_imm(value);
892		if (value != INVALID_IMM)
893			return push_inst32(compiler, SUB_WI | RD4(dst) | RN4(reg) | value);
894	}
895	return SLJIT_ERR_UNSUPPORTED;
896}
897
898static SLJIT_INLINE sljit_s32 emit_op_mem(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg,
899	sljit_s32 arg, sljit_sw argw, sljit_s32 tmp_reg)
900{
901	sljit_s32 other_r;
902	sljit_s32 update = flags & UPDATE;
903	sljit_uw tmp;
904
905	SLJIT_ASSERT(arg & SLJIT_MEM);
906	SLJIT_ASSERT((arg & REG_MASK) != tmp_reg);
907	flags &= ~UPDATE;
908	arg &= ~SLJIT_MEM;
909
910	if (SLJIT_UNLIKELY(!(arg & REG_MASK))) {
911		FAIL_IF(load_immediate(compiler, tmp_reg, argw));
912		if (IS_2_LO_REGS(reg, tmp_reg) && sljit_mem16_imm5[flags])
913			return push_inst16(compiler, sljit_mem16_imm5[flags] | RD3(reg) | RN3(tmp_reg));
914		return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(tmp_reg));
915	}
916
917	if (SLJIT_UNLIKELY(update)) {
918		SLJIT_ASSERT(reg != arg);
919
920		if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
921			other_r = OFFS_REG(arg);
922			arg &= 0xf;
923
924			if (IS_3_LO_REGS(reg, arg, other_r))
925				FAIL_IF(push_inst16(compiler, sljit_mem16[flags] | RD3(reg) | RN3(arg) | RM3(other_r)));
926			else
927				FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(other_r)));
928			return push_inst16(compiler, ADD | SET_REGS44(arg, other_r));
929		}
930
931		if (argw > 0xff) {
932			tmp = get_imm(argw & ~0xff);
933			if (tmp != INVALID_IMM) {
934				push_inst32(compiler, ADD_WI | RD4(arg) | RN4(arg) | tmp);
935				argw = argw & 0xff;
936			}
937		}
938		else if (argw < -0xff) {
939			tmp = get_imm(-argw & ~0xff);
940			if (tmp != INVALID_IMM) {
941				push_inst32(compiler, SUB_WI | RD4(arg) | RN4(arg) | tmp);
942				argw = -(-argw & 0xff);
943			}
944		}
945
946		if (argw == 0) {
947			if (IS_2_LO_REGS(reg, arg) && sljit_mem16_imm5[flags])
948				return push_inst16(compiler, sljit_mem16_imm5[flags] | RD3(reg) | RN3(arg));
949			return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(arg));
950		}
951
952		if (argw <= 0xff && argw >= -0xff) {
953			if (argw >= 0)
954				argw |= 0x200;
955			else {
956				argw = -argw;
957			}
958
959			SLJIT_ASSERT(argw >= 0 && (argw & 0xff) <= 0xff);
960			return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM8 | RT4(reg) | RN4(arg) | 0x100 | argw);
961		}
962
963		FAIL_IF(load_immediate(compiler, tmp_reg, argw));
964
965		SLJIT_ASSERT(reg != tmp_reg);
966
967		if (IS_3_LO_REGS(reg, arg, tmp_reg))
968			FAIL_IF(push_inst16(compiler, sljit_mem16[flags] | RD3(reg) | RN3(arg) | RM3(tmp_reg)));
969		else
970			FAIL_IF(push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(tmp_reg)));
971		return push_inst16(compiler, ADD | SET_REGS44(arg, tmp_reg));
972	}
973
974	if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
975		argw &= 0x3;
976		other_r = OFFS_REG(arg);
977		arg &= 0xf;
978
979		if (!argw && IS_3_LO_REGS(reg, arg, other_r))
980			return push_inst16(compiler, sljit_mem16[flags] | RD3(reg) | RN3(arg) | RM3(other_r));
981		return push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(other_r) | (argw << 4));
982	}
983
984	if (argw > 0xfff) {
985		tmp = get_imm(argw & ~0xfff);
986		if (tmp != INVALID_IMM) {
987			push_inst32(compiler, ADD_WI | RD4(tmp_reg) | RN4(arg) | tmp);
988			arg = tmp_reg;
989			argw = argw & 0xfff;
990		}
991	}
992	else if (argw < -0xff) {
993		tmp = get_imm(-argw & ~0xff);
994		if (tmp != INVALID_IMM) {
995			push_inst32(compiler, SUB_WI | RD4(tmp_reg) | RN4(arg) | tmp);
996			arg = tmp_reg;
997			argw = -(-argw & 0xff);
998		}
999	}
1000
1001	if (IS_2_LO_REGS(reg, arg) && sljit_mem16_imm5[flags]) {
1002		tmp = 3;
1003		if (IS_WORD_SIZE(flags)) {
1004			if (OFFSET_CHECK(0x1f, 2))
1005				tmp = 2;
1006		}
1007		else if (flags & BYTE_SIZE)
1008		{
1009			if (OFFSET_CHECK(0x1f, 0))
1010				tmp = 0;
1011		}
1012		else {
1013			SLJIT_ASSERT(flags & HALF_SIZE);
1014			if (OFFSET_CHECK(0x1f, 1))
1015				tmp = 1;
1016		}
1017
1018		if (tmp < 3)
1019			return push_inst16(compiler, sljit_mem16_imm5[flags] | RD3(reg) | RN3(arg) | (argw << (6 - tmp)));
1020	}
1021	else if (SLJIT_UNLIKELY(arg == SLJIT_SP) && IS_WORD_SIZE(flags) && OFFSET_CHECK(0xff, 2) && reg_map[reg] <= 7) {
1022		/* SP based immediate. */
1023		return push_inst16(compiler, STR_SP | ((flags & STORE) ? 0 : 0x800) | RDN3(reg) | (argw >> 2));
1024	}
1025
1026	if (argw >= 0 && argw <= 0xfff)
1027		return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM12 | RT4(reg) | RN4(arg) | argw);
1028	else if (argw < 0 && argw >= -0xff)
1029		return push_inst32(compiler, sljit_mem32[flags] | MEM_IMM8 | RT4(reg) | RN4(arg) | -argw);
1030
1031	SLJIT_ASSERT(arg != tmp_reg);
1032
1033	FAIL_IF(load_immediate(compiler, tmp_reg, argw));
1034	if (IS_3_LO_REGS(reg, arg, tmp_reg))
1035		return push_inst16(compiler, sljit_mem16[flags] | RD3(reg) | RN3(arg) | RM3(tmp_reg));
1036	return push_inst32(compiler, sljit_mem32[flags] | RT4(reg) | RN4(arg) | RM4(tmp_reg));
1037}
1038
1039/* --------------------------------------------------------------------- */
1040/*  Entry, exit                                                          */
1041/* --------------------------------------------------------------------- */
1042
1043SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_enter(struct sljit_compiler *compiler,
1044	sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
1045	sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size)
1046{
1047	sljit_s32 size, i, tmp;
1048	sljit_ins push = 0;
1049
1050	CHECK_ERROR();
1051	CHECK(check_sljit_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size));
1052	set_emit_enter(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size);
1053
1054	tmp = saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - saveds) : SLJIT_FIRST_SAVED_REG;
1055	for (i = SLJIT_S0; i >= tmp; i--)
1056		push |= 1 << reg_map[i];
1057
1058	for (i = scratches; i >= SLJIT_FIRST_SAVED_REG; i--)
1059		push |= 1 << reg_map[i];
1060
1061	FAIL_IF((push & 0xff00)
1062		? push_inst32(compiler, PUSH_W | (1 << 14) | push)
1063		: push_inst16(compiler, PUSH | (1 << 8) | push));
1064
1065	/* Stack must be aligned to 8 bytes: (LR, R4) */
1066	size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1);
1067	local_size = ((size + local_size + 7) & ~7) - size;
1068	compiler->local_size = local_size;
1069	if (local_size > 0) {
1070		if (local_size <= (127 << 2))
1071			FAIL_IF(push_inst16(compiler, SUB_SP | (local_size >> 2)));
1072		else
1073			FAIL_IF(emit_op_imm(compiler, SLJIT_SUB | ARG2_IMM, SLJIT_SP, SLJIT_SP, local_size));
1074	}
1075
1076	if (args >= 1)
1077		FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(SLJIT_S0, SLJIT_R0)));
1078	if (args >= 2)
1079		FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(SLJIT_S1, SLJIT_R1)));
1080	if (args >= 3)
1081		FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(SLJIT_S2, SLJIT_R2)));
1082
1083	return SLJIT_SUCCESS;
1084}
1085
1086SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_set_context(struct sljit_compiler *compiler,
1087	sljit_s32 options, sljit_s32 args, sljit_s32 scratches, sljit_s32 saveds,
1088	sljit_s32 fscratches, sljit_s32 fsaveds, sljit_s32 local_size)
1089{
1090	sljit_s32 size;
1091
1092	CHECK_ERROR();
1093	CHECK(check_sljit_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size));
1094	set_set_context(compiler, options, args, scratches, saveds, fscratches, fsaveds, local_size);
1095
1096	size = GET_SAVED_REGISTERS_SIZE(scratches, saveds, 1);
1097	compiler->local_size = ((size + local_size + 7) & ~7) - size;
1098	return SLJIT_SUCCESS;
1099}
1100
1101SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src, sljit_sw srcw)
1102{
1103	sljit_s32 i, tmp;
1104	sljit_ins pop = 0;
1105
1106	CHECK_ERROR();
1107	CHECK(check_sljit_emit_return(compiler, op, src, srcw));
1108
1109	FAIL_IF(emit_mov_before_return(compiler, op, src, srcw));
1110
1111	if (compiler->local_size > 0) {
1112		if (compiler->local_size <= (127 << 2))
1113			FAIL_IF(push_inst16(compiler, ADD_SP | (compiler->local_size >> 2)));
1114		else
1115			FAIL_IF(emit_op_imm(compiler, SLJIT_ADD | ARG2_IMM, SLJIT_SP, SLJIT_SP, compiler->local_size));
1116	}
1117
1118	tmp = compiler->saveds < SLJIT_NUMBER_OF_SAVED_REGISTERS ? (SLJIT_S0 + 1 - compiler->saveds) : SLJIT_FIRST_SAVED_REG;
1119	for (i = SLJIT_S0; i >= tmp; i--)
1120		pop |= 1 << reg_map[i];
1121
1122	for (i = compiler->scratches; i >= SLJIT_FIRST_SAVED_REG; i--)
1123		pop |= 1 << reg_map[i];
1124
1125	return (pop & 0xff00)
1126		? push_inst32(compiler, POP_W | (1 << 15) | pop)
1127		: push_inst16(compiler, POP | (1 << 8) | pop);
1128}
1129
1130/* --------------------------------------------------------------------- */
1131/*  Operators                                                            */
1132/* --------------------------------------------------------------------- */
1133
1134#ifdef __cplusplus
1135extern "C" {
1136#endif
1137
1138#if defined(__GNUC__)
1139extern unsigned int __aeabi_uidivmod(unsigned int numerator, int unsigned denominator);
1140extern int __aeabi_idivmod(int numerator, int denominator);
1141#else
1142#error "Software divmod functions are needed"
1143#endif
1144
1145#ifdef __cplusplus
1146}
1147#endif
1148
1149SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op0(struct sljit_compiler *compiler, sljit_s32 op)
1150{
1151	sljit_sw saved_reg_list[3];
1152	sljit_sw saved_reg_count;
1153
1154	CHECK_ERROR();
1155	CHECK(check_sljit_emit_op0(compiler, op));
1156
1157	op = GET_OPCODE(op);
1158	switch (op) {
1159	case SLJIT_BREAKPOINT:
1160		return push_inst16(compiler, BKPT);
1161	case SLJIT_NOP:
1162		return push_inst16(compiler, NOP);
1163	case SLJIT_LMUL_UW:
1164	case SLJIT_LMUL_SW:
1165		return push_inst32(compiler, (op == SLJIT_LMUL_UW ? UMULL : SMULL)
1166			| (reg_map[SLJIT_R1] << 8)
1167			| (reg_map[SLJIT_R0] << 12)
1168			| (reg_map[SLJIT_R0] << 16)
1169			| reg_map[SLJIT_R1]);
1170	case SLJIT_DIVMOD_UW:
1171	case SLJIT_DIVMOD_SW:
1172	case SLJIT_DIV_UW:
1173	case SLJIT_DIV_SW:
1174		SLJIT_COMPILE_ASSERT((SLJIT_DIVMOD_UW & 0x2) == 0 && SLJIT_DIV_UW - 0x2 == SLJIT_DIVMOD_UW, bad_div_opcode_assignments);
1175		SLJIT_ASSERT(reg_map[2] == 1 && reg_map[3] == 2 && reg_map[4] == 12);
1176
1177		saved_reg_count = 0;
1178		if (compiler->scratches >= 4)
1179			saved_reg_list[saved_reg_count++] = 12;
1180		if (compiler->scratches >= 3)
1181			saved_reg_list[saved_reg_count++] = 2;
1182		if (op >= SLJIT_DIV_UW)
1183			saved_reg_list[saved_reg_count++] = 1;
1184
1185		if (saved_reg_count > 0) {
1186			FAIL_IF(push_inst32(compiler, 0xf84d0d00 | (saved_reg_count >= 3 ? 16 : 8)
1187						| (saved_reg_list[0] << 12) /* str rX, [sp, #-8/-16]! */));
1188			if (saved_reg_count >= 2) {
1189				SLJIT_ASSERT(saved_reg_list[1] < 8);
1190				FAIL_IF(push_inst16(compiler, 0x9001 | (saved_reg_list[1] << 8) /* str rX, [sp, #4] */));
1191			}
1192			if (saved_reg_count >= 3) {
1193				SLJIT_ASSERT(saved_reg_list[2] < 8);
1194				FAIL_IF(push_inst16(compiler, 0x9002 | (saved_reg_list[2] << 8) /* str rX, [sp, #8] */));
1195			}
1196		}
1197
1198#if defined(__GNUC__)
1199		FAIL_IF(sljit_emit_ijump(compiler, SLJIT_FAST_CALL, SLJIT_IMM,
1200			((op | 0x2) == SLJIT_DIV_UW ? SLJIT_FUNC_OFFSET(__aeabi_uidivmod) : SLJIT_FUNC_OFFSET(__aeabi_idivmod))));
1201#else
1202#error "Software divmod functions are needed"
1203#endif
1204
1205		if (saved_reg_count > 0) {
1206			if (saved_reg_count >= 3) {
1207				SLJIT_ASSERT(saved_reg_list[2] < 8);
1208				FAIL_IF(push_inst16(compiler, 0x9802 | (saved_reg_list[2] << 8) /* ldr rX, [sp, #8] */));
1209			}
1210			if (saved_reg_count >= 2) {
1211				SLJIT_ASSERT(saved_reg_list[1] < 8);
1212				FAIL_IF(push_inst16(compiler, 0x9801 | (saved_reg_list[1] << 8) /* ldr rX, [sp, #4] */));
1213			}
1214			return push_inst32(compiler, 0xf85d0b00 | (saved_reg_count >= 3 ? 16 : 8)
1215						| (saved_reg_list[0] << 12) /* ldr rX, [sp], #8/16 */);
1216		}
1217		return SLJIT_SUCCESS;
1218	}
1219
1220	return SLJIT_SUCCESS;
1221}
1222
1223SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op1(struct sljit_compiler *compiler, sljit_s32 op,
1224	sljit_s32 dst, sljit_sw dstw,
1225	sljit_s32 src, sljit_sw srcw)
1226{
1227	sljit_s32 dst_r, flags;
1228	sljit_s32 op_flags = GET_ALL_FLAGS(op);
1229
1230	CHECK_ERROR();
1231	CHECK(check_sljit_emit_op1(compiler, op, dst, dstw, src, srcw));
1232	ADJUST_LOCAL_OFFSET(dst, dstw);
1233	ADJUST_LOCAL_OFFSET(src, srcw);
1234
1235	dst_r = SLOW_IS_REG(dst) ? dst : TMP_REG1;
1236
1237	op = GET_OPCODE(op);
1238	if (op >= SLJIT_MOV && op <= SLJIT_MOVU_P) {
1239		switch (op) {
1240		case SLJIT_MOV:
1241		case SLJIT_MOV_U32:
1242		case SLJIT_MOV_S32:
1243		case SLJIT_MOV_P:
1244			flags = WORD_SIZE;
1245			break;
1246		case SLJIT_MOV_U8:
1247			flags = BYTE_SIZE;
1248			if (src & SLJIT_IMM)
1249				srcw = (sljit_u8)srcw;
1250			break;
1251		case SLJIT_MOV_S8:
1252			flags = BYTE_SIZE | SIGNED;
1253			if (src & SLJIT_IMM)
1254				srcw = (sljit_s8)srcw;
1255			break;
1256		case SLJIT_MOV_U16:
1257			flags = HALF_SIZE;
1258			if (src & SLJIT_IMM)
1259				srcw = (sljit_u16)srcw;
1260			break;
1261		case SLJIT_MOV_S16:
1262			flags = HALF_SIZE | SIGNED;
1263			if (src & SLJIT_IMM)
1264				srcw = (sljit_s16)srcw;
1265			break;
1266		case SLJIT_MOVU:
1267		case SLJIT_MOVU_U32:
1268		case SLJIT_MOVU_S32:
1269		case SLJIT_MOVU_P:
1270			flags = WORD_SIZE | UPDATE;
1271			break;
1272		case SLJIT_MOVU_U8:
1273			flags = BYTE_SIZE | UPDATE;
1274			if (src & SLJIT_IMM)
1275				srcw = (sljit_u8)srcw;
1276			break;
1277		case SLJIT_MOVU_S8:
1278			flags = BYTE_SIZE | SIGNED | UPDATE;
1279			if (src & SLJIT_IMM)
1280				srcw = (sljit_s8)srcw;
1281			break;
1282		case SLJIT_MOVU_U16:
1283			flags = HALF_SIZE | UPDATE;
1284			if (src & SLJIT_IMM)
1285				srcw = (sljit_u16)srcw;
1286			break;
1287		case SLJIT_MOVU_S16:
1288			flags = HALF_SIZE | SIGNED | UPDATE;
1289			if (src & SLJIT_IMM)
1290				srcw = (sljit_s16)srcw;
1291			break;
1292		default:
1293			SLJIT_UNREACHABLE();
1294			flags = 0;
1295			break;
1296		}
1297
1298		if (src & SLJIT_IMM)
1299			FAIL_IF(emit_op_imm(compiler, SLJIT_MOV | ARG2_IMM, dst_r, TMP_REG2, srcw));
1300		else if (src & SLJIT_MEM) {
1301			FAIL_IF(emit_op_mem(compiler, flags, dst_r, src, srcw, ((flags & UPDATE) && dst_r == TMP_REG1) ? TMP_REG2 : TMP_REG1));
1302		} else {
1303			if (dst_r != TMP_REG1)
1304				return emit_op_imm(compiler, op, dst_r, TMP_REG2, src);
1305			dst_r = src;
1306		}
1307
1308		if (!(dst & SLJIT_MEM))
1309			return SLJIT_SUCCESS;
1310
1311		return emit_op_mem(compiler, flags | STORE, dst_r, dst, dstw, (dst_r == TMP_REG1) ? TMP_REG2 : TMP_REG1);
1312	}
1313
1314	if (op == SLJIT_NEG) {
1315#if (defined SLJIT_VERBOSE && SLJIT_VERBOSE) \
1316			|| (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
1317		compiler->skip_checks = 1;
1318#endif
1319		return sljit_emit_op2(compiler, SLJIT_SUB | op_flags, dst, dstw, SLJIT_IMM, 0, src, srcw);
1320	}
1321
1322	flags = HAS_FLAGS(op_flags) ? SET_FLAGS : 0;
1323
1324	if (src & SLJIT_IMM)
1325		flags |= ARG2_IMM;
1326	else if (src & SLJIT_MEM) {
1327		FAIL_IF(emit_op_mem(compiler, WORD_SIZE, TMP_REG1, src, srcw, TMP_REG1));
1328		srcw = TMP_REG1;
1329	}
1330	else
1331		srcw = src;
1332
1333	emit_op_imm(compiler, flags | op, dst_r, TMP_REG2, srcw);
1334
1335	if (!(dst & SLJIT_MEM))
1336		return SLJIT_SUCCESS;
1337	return emit_op_mem(compiler, flags | STORE, dst_r, dst, dstw, TMP_REG2);
1338}
1339
1340SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op,
1341	sljit_s32 dst, sljit_sw dstw,
1342	sljit_s32 src1, sljit_sw src1w,
1343	sljit_s32 src2, sljit_sw src2w)
1344{
1345	sljit_s32 dst_reg, flags, src2_reg;
1346
1347	CHECK_ERROR();
1348	CHECK(check_sljit_emit_op2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1349	ADJUST_LOCAL_OFFSET(dst, dstw);
1350	ADJUST_LOCAL_OFFSET(src1, src1w);
1351	ADJUST_LOCAL_OFFSET(src2, src2w);
1352
1353	dst_reg = SLOW_IS_REG(dst) ? dst : TMP_REG1;
1354	flags = HAS_FLAGS(op) ? SET_FLAGS : 0;
1355
1356	if (src1 & SLJIT_IMM)
1357		flags |= ARG1_IMM;
1358	else if (src1 & SLJIT_MEM) {
1359		emit_op_mem(compiler, WORD_SIZE, TMP_REG1, src1, src1w, TMP_REG1);
1360		src1w = TMP_REG1;
1361	}
1362	else
1363		src1w = src1;
1364
1365	if (src2 & SLJIT_IMM)
1366		flags |= ARG2_IMM;
1367	else if (src2 & SLJIT_MEM) {
1368		src2_reg = (!(flags & ARG1_IMM) && (src1w == TMP_REG1)) ? TMP_REG2 : TMP_REG1;
1369		emit_op_mem(compiler, WORD_SIZE, src2_reg, src2, src2w, src2_reg);
1370		src2w = src2_reg;
1371	}
1372	else
1373		src2w = src2;
1374
1375	if (dst == SLJIT_UNUSED)
1376		flags |= UNUSED_RETURN;
1377
1378	emit_op_imm(compiler, flags | GET_OPCODE(op), dst_reg, src1w, src2w);
1379
1380	if (!(dst & SLJIT_MEM))
1381		return SLJIT_SUCCESS;
1382	return emit_op_mem(compiler, WORD_SIZE | STORE, dst_reg, dst, dstw, TMP_REG2);
1383}
1384
1385SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_register_index(sljit_s32 reg)
1386{
1387	CHECK_REG_INDEX(check_sljit_get_register_index(reg));
1388	return reg_map[reg];
1389}
1390
1391SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_float_register_index(sljit_s32 reg)
1392{
1393	CHECK_REG_INDEX(check_sljit_get_float_register_index(reg));
1394	return reg << 1;
1395}
1396
1397SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_custom(struct sljit_compiler *compiler,
1398	void *instruction, sljit_s32 size)
1399{
1400	CHECK_ERROR();
1401	CHECK(check_sljit_emit_op_custom(compiler, instruction, size));
1402
1403	if (size == 2)
1404		return push_inst16(compiler, *(sljit_u16*)instruction);
1405	return push_inst32(compiler, *(sljit_ins*)instruction);
1406}
1407
1408/* --------------------------------------------------------------------- */
1409/*  Floating point operators                                             */
1410/* --------------------------------------------------------------------- */
1411
1412SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_is_fpu_available(void)
1413{
1414#ifdef SLJIT_IS_FPU_AVAILABLE
1415	return SLJIT_IS_FPU_AVAILABLE;
1416#else
1417	/* Available by default. */
1418	return 1;
1419#endif
1420}
1421
1422#define FPU_LOAD (1 << 20)
1423
1424static sljit_s32 emit_fop_mem(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 reg, sljit_s32 arg, sljit_sw argw)
1425{
1426	sljit_uw imm;
1427	sljit_sw inst = VSTR_F32 | (flags & (SLJIT_F32_OP | FPU_LOAD));
1428
1429	SLJIT_ASSERT(arg & SLJIT_MEM);
1430
1431	/* Fast loads and stores. */
1432	if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {
1433		FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(arg & REG_MASK) | RM4(OFFS_REG(arg)) | ((argw & 0x3) << 6)));
1434		arg = SLJIT_MEM | TMP_REG1;
1435		argw = 0;
1436	}
1437
1438	if ((arg & REG_MASK) && (argw & 0x3) == 0) {
1439		if (!(argw & ~0x3fc))
1440			return push_inst32(compiler, inst | 0x800000 | RN4(arg & REG_MASK) | DD4(reg) | (argw >> 2));
1441		if (!(-argw & ~0x3fc))
1442			return push_inst32(compiler, inst | RN4(arg & REG_MASK) | DD4(reg) | (-argw >> 2));
1443	}
1444
1445	if (arg & REG_MASK) {
1446		if (emit_set_delta(compiler, TMP_REG1, arg & REG_MASK, argw) != SLJIT_ERR_UNSUPPORTED) {
1447			FAIL_IF(compiler->error);
1448			return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG1) | DD4(reg));
1449		}
1450		imm = get_imm(argw & ~0x3fc);
1451		if (imm != INVALID_IMM) {
1452			FAIL_IF(push_inst32(compiler, ADD_WI | RD4(TMP_REG1) | RN4(arg & REG_MASK) | imm));
1453			return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG1) | DD4(reg) | ((argw & 0x3fc) >> 2));
1454		}
1455		imm = get_imm(-argw & ~0x3fc);
1456		if (imm != INVALID_IMM) {
1457			argw = -argw;
1458			FAIL_IF(push_inst32(compiler, SUB_WI | RD4(TMP_REG1) | RN4(arg & REG_MASK) | imm));
1459			return push_inst32(compiler, inst | RN4(TMP_REG1) | DD4(reg) | ((argw & 0x3fc) >> 2));
1460		}
1461	}
1462
1463	FAIL_IF(load_immediate(compiler, TMP_REG1, argw));
1464	if (arg & REG_MASK)
1465		FAIL_IF(push_inst16(compiler, ADD | SET_REGS44(TMP_REG1, (arg & REG_MASK))));
1466	return push_inst32(compiler, inst | 0x800000 | RN4(TMP_REG1) | DD4(reg));
1467}
1468
1469static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_sw_from_f64(struct sljit_compiler *compiler, sljit_s32 op,
1470	sljit_s32 dst, sljit_sw dstw,
1471	sljit_s32 src, sljit_sw srcw)
1472{
1473	op ^= SLJIT_F32_OP;
1474
1475	if (src & SLJIT_MEM) {
1476		FAIL_IF(emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG1, src, srcw));
1477		src = TMP_FREG1;
1478	}
1479
1480	FAIL_IF(push_inst32(compiler, VCVT_S32_F32 | (op & SLJIT_F32_OP) | DD4(TMP_FREG1) | DM4(src)));
1481
1482	if (dst == SLJIT_UNUSED)
1483		return SLJIT_SUCCESS;
1484
1485	if (FAST_IS_REG(dst))
1486		return push_inst32(compiler, VMOV | (1 << 20) | RT4(dst) | DN4(TMP_FREG1));
1487
1488	/* Store the integer value from a VFP register. */
1489	return emit_fop_mem(compiler, 0, TMP_FREG1, dst, dstw);
1490}
1491
1492static SLJIT_INLINE sljit_s32 sljit_emit_fop1_conv_f64_from_sw(struct sljit_compiler *compiler, sljit_s32 op,
1493	sljit_s32 dst, sljit_sw dstw,
1494	sljit_s32 src, sljit_sw srcw)
1495{
1496	sljit_s32 dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1497
1498	op ^= SLJIT_F32_OP;
1499
1500	if (FAST_IS_REG(src))
1501		FAIL_IF(push_inst32(compiler, VMOV | RT4(src) | DN4(TMP_FREG1)));
1502	else if (src & SLJIT_MEM) {
1503		/* Load the integer value into a VFP register. */
1504		FAIL_IF(emit_fop_mem(compiler, FPU_LOAD, TMP_FREG1, src, srcw));
1505	}
1506	else {
1507		FAIL_IF(load_immediate(compiler, TMP_REG1, srcw));
1508		FAIL_IF(push_inst32(compiler, VMOV | RT4(TMP_REG1) | DN4(TMP_FREG1)));
1509	}
1510
1511	FAIL_IF(push_inst32(compiler, VCVT_F32_S32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(TMP_FREG1)));
1512
1513	if (dst & SLJIT_MEM)
1514		return emit_fop_mem(compiler, (op & SLJIT_F32_OP), TMP_FREG1, dst, dstw);
1515	return SLJIT_SUCCESS;
1516}
1517
1518static SLJIT_INLINE sljit_s32 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op,
1519	sljit_s32 src1, sljit_sw src1w,
1520	sljit_s32 src2, sljit_sw src2w)
1521{
1522	op ^= SLJIT_F32_OP;
1523
1524	if (src1 & SLJIT_MEM) {
1525		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG1, src1, src1w);
1526		src1 = TMP_FREG1;
1527	}
1528
1529	if (src2 & SLJIT_MEM) {
1530		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG2, src2, src2w);
1531		src2 = TMP_FREG2;
1532	}
1533
1534	FAIL_IF(push_inst32(compiler, VCMP_F32 | (op & SLJIT_F32_OP) | DD4(src1) | DM4(src2)));
1535	return push_inst32(compiler, VMRS);
1536}
1537
1538SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop1(struct sljit_compiler *compiler, sljit_s32 op,
1539	sljit_s32 dst, sljit_sw dstw,
1540	sljit_s32 src, sljit_sw srcw)
1541{
1542	sljit_s32 dst_r;
1543
1544	CHECK_ERROR();
1545
1546	SLJIT_COMPILE_ASSERT((SLJIT_F32_OP == 0x100), float_transfer_bit_error);
1547	SELECT_FOP1_OPERATION_WITH_CHECKS(compiler, op, dst, dstw, src, srcw);
1548
1549	dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1550
1551	if (GET_OPCODE(op) != SLJIT_CONV_F64_FROM_F32)
1552		op ^= SLJIT_F32_OP;
1553
1554	if (src & SLJIT_MEM) {
1555		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, dst_r, src, srcw);
1556		src = dst_r;
1557	}
1558
1559	switch (GET_OPCODE(op)) {
1560	case SLJIT_MOV_F64:
1561		if (src != dst_r) {
1562			if (dst_r != TMP_FREG1)
1563				FAIL_IF(push_inst32(compiler, VMOV_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(src)));
1564			else
1565				dst_r = src;
1566		}
1567		break;
1568	case SLJIT_NEG_F64:
1569		FAIL_IF(push_inst32(compiler, VNEG_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(src)));
1570		break;
1571	case SLJIT_ABS_F64:
1572		FAIL_IF(push_inst32(compiler, VABS_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(src)));
1573		break;
1574	case SLJIT_CONV_F64_FROM_F32:
1575		FAIL_IF(push_inst32(compiler, VCVT_F64_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DM4(src)));
1576		op ^= SLJIT_F32_OP;
1577		break;
1578	}
1579
1580	if (dst & SLJIT_MEM)
1581		return emit_fop_mem(compiler, (op & SLJIT_F32_OP), dst_r, dst, dstw);
1582	return SLJIT_SUCCESS;
1583}
1584
1585SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op,
1586	sljit_s32 dst, sljit_sw dstw,
1587	sljit_s32 src1, sljit_sw src1w,
1588	sljit_s32 src2, sljit_sw src2w)
1589{
1590	sljit_s32 dst_r;
1591
1592	CHECK_ERROR();
1593	CHECK(check_sljit_emit_fop2(compiler, op, dst, dstw, src1, src1w, src2, src2w));
1594	ADJUST_LOCAL_OFFSET(dst, dstw);
1595	ADJUST_LOCAL_OFFSET(src1, src1w);
1596	ADJUST_LOCAL_OFFSET(src2, src2w);
1597
1598	op ^= SLJIT_F32_OP;
1599
1600	dst_r = FAST_IS_REG(dst) ? dst : TMP_FREG1;
1601	if (src1 & SLJIT_MEM) {
1602		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG1, src1, src1w);
1603		src1 = TMP_FREG1;
1604	}
1605	if (src2 & SLJIT_MEM) {
1606		emit_fop_mem(compiler, (op & SLJIT_F32_OP) | FPU_LOAD, TMP_FREG2, src2, src2w);
1607		src2 = TMP_FREG2;
1608	}
1609
1610	switch (GET_OPCODE(op)) {
1611	case SLJIT_ADD_F64:
1612		FAIL_IF(push_inst32(compiler, VADD_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1613		break;
1614	case SLJIT_SUB_F64:
1615		FAIL_IF(push_inst32(compiler, VSUB_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1616		break;
1617	case SLJIT_MUL_F64:
1618		FAIL_IF(push_inst32(compiler, VMUL_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1619		break;
1620	case SLJIT_DIV_F64:
1621		FAIL_IF(push_inst32(compiler, VDIV_F32 | (op & SLJIT_F32_OP) | DD4(dst_r) | DN4(src1) | DM4(src2)));
1622		break;
1623	}
1624
1625	if (!(dst & SLJIT_MEM))
1626		return SLJIT_SUCCESS;
1627	return emit_fop_mem(compiler, (op & SLJIT_F32_OP), TMP_FREG1, dst, dstw);
1628}
1629
1630#undef FPU_LOAD
1631
1632/* --------------------------------------------------------------------- */
1633/*  Other instructions                                                   */
1634/* --------------------------------------------------------------------- */
1635
1636SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_enter(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw)
1637{
1638	CHECK_ERROR();
1639	CHECK(check_sljit_emit_fast_enter(compiler, dst, dstw));
1640	ADJUST_LOCAL_OFFSET(dst, dstw);
1641
1642	SLJIT_ASSERT(reg_map[TMP_REG2] == 14);
1643
1644	/* For UNUSED dst. Uncommon, but possible. */
1645	if (dst == SLJIT_UNUSED)
1646		return SLJIT_SUCCESS;
1647
1648	if (FAST_IS_REG(dst))
1649		return push_inst16(compiler, MOV | SET_REGS44(dst, TMP_REG2));
1650
1651	/* Memory. */
1652	return emit_op_mem(compiler, WORD_SIZE | STORE, TMP_REG2, dst, dstw, TMP_REG1);
1653}
1654
1655SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_fast_return(struct sljit_compiler *compiler, sljit_s32 src, sljit_sw srcw)
1656{
1657	CHECK_ERROR();
1658	CHECK(check_sljit_emit_fast_return(compiler, src, srcw));
1659	ADJUST_LOCAL_OFFSET(src, srcw);
1660
1661	SLJIT_ASSERT(reg_map[TMP_REG2] == 14);
1662
1663	if (FAST_IS_REG(src))
1664		FAIL_IF(push_inst16(compiler, MOV | SET_REGS44(TMP_REG2, src)));
1665	else if (src & SLJIT_MEM) {
1666		FAIL_IF(emit_op_mem(compiler, WORD_SIZE, TMP_REG2, src, srcw, TMP_REG2));
1667	}
1668	else if (src & SLJIT_IMM)
1669		FAIL_IF(load_immediate(compiler, TMP_REG2, srcw));
1670	return push_inst16(compiler, BX | RN3(TMP_REG2));
1671}
1672
1673/* --------------------------------------------------------------------- */
1674/*  Conditional instructions                                             */
1675/* --------------------------------------------------------------------- */
1676
1677static sljit_uw get_cc(sljit_s32 type)
1678{
1679	switch (type) {
1680	case SLJIT_EQUAL:
1681	case SLJIT_MUL_NOT_OVERFLOW:
1682	case SLJIT_EQUAL_F64:
1683		return 0x0;
1684
1685	case SLJIT_NOT_EQUAL:
1686	case SLJIT_MUL_OVERFLOW:
1687	case SLJIT_NOT_EQUAL_F64:
1688		return 0x1;
1689
1690	case SLJIT_LESS:
1691	case SLJIT_LESS_F64:
1692		return 0x3;
1693
1694	case SLJIT_GREATER_EQUAL:
1695	case SLJIT_GREATER_EQUAL_F64:
1696		return 0x2;
1697
1698	case SLJIT_GREATER:
1699	case SLJIT_GREATER_F64:
1700		return 0x8;
1701
1702	case SLJIT_LESS_EQUAL:
1703	case SLJIT_LESS_EQUAL_F64:
1704		return 0x9;
1705
1706	case SLJIT_SIG_LESS:
1707		return 0xb;
1708
1709	case SLJIT_SIG_GREATER_EQUAL:
1710		return 0xa;
1711
1712	case SLJIT_SIG_GREATER:
1713		return 0xc;
1714
1715	case SLJIT_SIG_LESS_EQUAL:
1716		return 0xd;
1717
1718	case SLJIT_OVERFLOW:
1719	case SLJIT_UNORDERED_F64:
1720		return 0x6;
1721
1722	case SLJIT_NOT_OVERFLOW:
1723	case SLJIT_ORDERED_F64:
1724		return 0x7;
1725
1726	default: /* SLJIT_JUMP */
1727		SLJIT_UNREACHABLE();
1728		return 0xe;
1729	}
1730}
1731
1732SLJIT_API_FUNC_ATTRIBUTE struct sljit_label* sljit_emit_label(struct sljit_compiler *compiler)
1733{
1734	struct sljit_label *label;
1735
1736	CHECK_ERROR_PTR();
1737	CHECK_PTR(check_sljit_emit_label(compiler));
1738
1739	if (compiler->last_label && compiler->last_label->size == compiler->size)
1740		return compiler->last_label;
1741
1742	label = (struct sljit_label*)ensure_abuf(compiler, sizeof(struct sljit_label));
1743	PTR_FAIL_IF(!label);
1744	set_label(label, compiler);
1745	return label;
1746}
1747
1748SLJIT_API_FUNC_ATTRIBUTE struct sljit_jump* sljit_emit_jump(struct sljit_compiler *compiler, sljit_s32 type)
1749{
1750	struct sljit_jump *jump;
1751	sljit_ins cc;
1752
1753	CHECK_ERROR_PTR();
1754	CHECK_PTR(check_sljit_emit_jump(compiler, type));
1755
1756	jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1757	PTR_FAIL_IF(!jump);
1758	set_jump(jump, compiler, type & SLJIT_REWRITABLE_JUMP);
1759	type &= 0xff;
1760
1761	/* In ARM, we don't need to touch the arguments. */
1762	PTR_FAIL_IF(emit_imm32_const(compiler, TMP_REG1, 0));
1763	if (type < SLJIT_JUMP) {
1764		jump->flags |= IS_COND;
1765		cc = get_cc(type);
1766		jump->flags |= cc << 8;
1767		PTR_FAIL_IF(push_inst16(compiler, IT | (cc << 4) | 0x8));
1768	}
1769
1770	jump->addr = compiler->size;
1771	if (type <= SLJIT_JUMP)
1772		PTR_FAIL_IF(push_inst16(compiler, BX | RN3(TMP_REG1)));
1773	else {
1774		jump->flags |= IS_BL;
1775		PTR_FAIL_IF(push_inst16(compiler, BLX | RN3(TMP_REG1)));
1776	}
1777
1778	return jump;
1779}
1780
1781SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_ijump(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src, sljit_sw srcw)
1782{
1783	struct sljit_jump *jump;
1784
1785	CHECK_ERROR();
1786	CHECK(check_sljit_emit_ijump(compiler, type, src, srcw));
1787	ADJUST_LOCAL_OFFSET(src, srcw);
1788
1789	/* In ARM, we don't need to touch the arguments. */
1790	if (!(src & SLJIT_IMM)) {
1791		if (FAST_IS_REG(src))
1792			return push_inst16(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RN3(src));
1793
1794		FAIL_IF(emit_op_mem(compiler, WORD_SIZE, type <= SLJIT_JUMP ? TMP_PC : TMP_REG1, src, srcw, TMP_REG1));
1795		if (type >= SLJIT_FAST_CALL)
1796			return push_inst16(compiler, BLX | RN3(TMP_REG1));
1797	}
1798
1799	jump = (struct sljit_jump*)ensure_abuf(compiler, sizeof(struct sljit_jump));
1800	FAIL_IF(!jump);
1801	set_jump(jump, compiler, JUMP_ADDR | ((type >= SLJIT_FAST_CALL) ? IS_BL : 0));
1802	jump->u.target = srcw;
1803
1804	FAIL_IF(emit_imm32_const(compiler, TMP_REG1, 0));
1805	jump->addr = compiler->size;
1806	return push_inst16(compiler, (type <= SLJIT_JUMP ? BX : BLX) | RN3(TMP_REG1));
1807}
1808
1809SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_flags(struct sljit_compiler *compiler, sljit_s32 op,
1810	sljit_s32 dst, sljit_sw dstw,
1811	sljit_s32 src, sljit_sw srcw,
1812	sljit_s32 type)
1813{
1814	sljit_s32 dst_r, flags = GET_ALL_FLAGS(op);
1815	sljit_ins cc, ins;
1816
1817	CHECK_ERROR();
1818	CHECK(check_sljit_emit_op_flags(compiler, op, dst, dstw, src, srcw, type));
1819	ADJUST_LOCAL_OFFSET(dst, dstw);
1820	ADJUST_LOCAL_OFFSET(src, srcw);
1821
1822	if (dst == SLJIT_UNUSED)
1823		return SLJIT_SUCCESS;
1824
1825	op = GET_OPCODE(op);
1826	cc = get_cc(type & 0xff);
1827	dst_r = FAST_IS_REG(dst) ? dst : TMP_REG1;
1828
1829	if (op < SLJIT_ADD) {
1830		FAIL_IF(push_inst16(compiler, IT | (cc << 4) | (((cc & 0x1) ^ 0x1) << 3) | 0x4));
1831		if (reg_map[dst_r] > 7) {
1832			FAIL_IF(push_inst32(compiler, MOV_WI | RD4(dst_r) | 1));
1833			FAIL_IF(push_inst32(compiler, MOV_WI | RD4(dst_r) | 0));
1834		} else {
1835			FAIL_IF(push_inst16(compiler, MOVSI | RDN3(dst_r) | 1));
1836			FAIL_IF(push_inst16(compiler, MOVSI | RDN3(dst_r) | 0));
1837		}
1838		if (dst_r != TMP_REG1)
1839			return SLJIT_SUCCESS;
1840		return emit_op_mem(compiler, WORD_SIZE | STORE, TMP_REG1, dst, dstw, TMP_REG2);
1841	}
1842
1843	ins = (op == SLJIT_AND ? ANDI : (op == SLJIT_OR ? ORRI : EORI));
1844
1845	if ((op == SLJIT_OR || op == SLJIT_XOR) && FAST_IS_REG(dst) && dst == src) {
1846		/* Does not change the other bits. */
1847		FAIL_IF(push_inst16(compiler, IT | (cc << 4) | 0x8));
1848		FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst) | 1));
1849		if (flags & SLJIT_SET_Z) {
1850			/* The condition must always be set, even if the ORRI/EORI is not executed above. */
1851			if (reg_map[dst] <= 7)
1852				return push_inst16(compiler, MOVS | RD3(TMP_REG1) | RN3(dst));
1853			return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(TMP_REG1) | RM4(dst));
1854		}
1855		return SLJIT_SUCCESS;
1856	}
1857
1858	if (src & SLJIT_MEM) {
1859		FAIL_IF(emit_op_mem(compiler, WORD_SIZE, TMP_REG2, src, srcw, TMP_REG2));
1860		src = TMP_REG2;
1861		srcw = 0;
1862	} else if (src & SLJIT_IMM) {
1863		FAIL_IF(load_immediate(compiler, TMP_REG2, srcw));
1864		src = TMP_REG2;
1865		srcw = 0;
1866	}
1867
1868	if (op == SLJIT_AND || src != dst_r) {
1869		FAIL_IF(push_inst16(compiler, IT | (cc << 4) | (((cc & 0x1) ^ 0x1) << 3) | 0x4));
1870		FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst_r) | 1));
1871		FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst_r) | 0));
1872	}
1873	else {
1874		FAIL_IF(push_inst16(compiler, IT | (cc << 4) | 0x8));
1875		FAIL_IF(push_inst32(compiler, ins | RN4(src) | RD4(dst_r) | 1));
1876	}
1877
1878	if (dst_r == TMP_REG1)
1879		FAIL_IF(emit_op_mem(compiler, WORD_SIZE | STORE, TMP_REG1, dst, dstw, TMP_REG2));
1880
1881	if (flags & SLJIT_SET_Z) {
1882		/* The condition must always be set, even if the ORR/EORI is not executed above. */
1883		if (reg_map[dst_r] <= 7)
1884			return push_inst16(compiler, MOVS | RD3(TMP_REG1) | RN3(dst_r));
1885		return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(TMP_REG1) | RM4(dst_r));
1886	}
1887	return SLJIT_SUCCESS;
1888}
1889
1890SLJIT_API_FUNC_ATTRIBUTE struct sljit_const* sljit_emit_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw init_value)
1891{
1892	struct sljit_const *const_;
1893	sljit_s32 dst_r;
1894
1895	CHECK_ERROR_PTR();
1896	CHECK_PTR(check_sljit_emit_const(compiler, dst, dstw, init_value));
1897	ADJUST_LOCAL_OFFSET(dst, dstw);
1898
1899	const_ = (struct sljit_const*)ensure_abuf(compiler, sizeof(struct sljit_const));
1900	PTR_FAIL_IF(!const_);
1901	set_const(const_, compiler);
1902
1903	dst_r = SLOW_IS_REG(dst) ? dst : TMP_REG1;
1904	PTR_FAIL_IF(emit_imm32_const(compiler, dst_r, init_value));
1905
1906	if (dst & SLJIT_MEM)
1907		PTR_FAIL_IF(emit_op_mem(compiler, WORD_SIZE | STORE, dst_r, dst, dstw, TMP_REG2));
1908	return const_;
1909}
1910
1911SLJIT_API_FUNC_ATTRIBUTE void sljit_set_jump_addr(sljit_uw addr, sljit_uw new_target, sljit_sw executable_offset)
1912{
1913	sljit_u16 *inst = (sljit_u16*)addr;
1914	modify_imm32_const(inst, new_target);
1915	inst = (sljit_u16 *)SLJIT_ADD_EXEC_OFFSET(inst, executable_offset);
1916	SLJIT_CACHE_FLUSH(inst, inst + 4);
1917}
1918
1919SLJIT_API_FUNC_ATTRIBUTE void sljit_set_const(sljit_uw addr, sljit_sw new_constant, sljit_sw executable_offset)
1920{
1921	sljit_u16 *inst = (sljit_u16*)addr;
1922	modify_imm32_const(inst, new_constant);
1923	inst = (sljit_u16 *)SLJIT_ADD_EXEC_OFFSET(inst, executable_offset);
1924	SLJIT_CACHE_FLUSH(inst, inst + 4);
1925}
1926