11.1Sjmcneill/* $NetBSD: lsi,axm5516-clks.h,v 1.1.1.2 2020/01/03 14:33:04 skrll Exp $ */ 21.1Sjmcneill 31.1.1.2Sskrll/* SPDX-License-Identifier: GPL-2.0-only */ 41.1Sjmcneill/* 51.1Sjmcneill * Copyright (c) 2014 LSI Corporation 61.1Sjmcneill */ 71.1Sjmcneill 81.1Sjmcneill#ifndef _DT_BINDINGS_CLK_AXM5516_H 91.1Sjmcneill#define _DT_BINDINGS_CLK_AXM5516_H 101.1Sjmcneill 111.1Sjmcneill#define AXXIA_CLK_FAB_PLL 0 121.1Sjmcneill#define AXXIA_CLK_CPU_PLL 1 131.1Sjmcneill#define AXXIA_CLK_SYS_PLL 2 141.1Sjmcneill#define AXXIA_CLK_SM0_PLL 3 151.1Sjmcneill#define AXXIA_CLK_SM1_PLL 4 161.1Sjmcneill#define AXXIA_CLK_FAB_DIV 5 171.1Sjmcneill#define AXXIA_CLK_SYS_DIV 6 181.1Sjmcneill#define AXXIA_CLK_NRCP_DIV 7 191.1Sjmcneill#define AXXIA_CLK_CPU0_DIV 8 201.1Sjmcneill#define AXXIA_CLK_CPU1_DIV 9 211.1Sjmcneill#define AXXIA_CLK_CPU2_DIV 10 221.1Sjmcneill#define AXXIA_CLK_CPU3_DIV 11 231.1Sjmcneill#define AXXIA_CLK_PER_DIV 12 241.1Sjmcneill#define AXXIA_CLK_MMC_DIV 13 251.1Sjmcneill#define AXXIA_CLK_FAB 14 261.1Sjmcneill#define AXXIA_CLK_SYS 15 271.1Sjmcneill#define AXXIA_CLK_NRCP 16 281.1Sjmcneill#define AXXIA_CLK_CPU0 17 291.1Sjmcneill#define AXXIA_CLK_CPU1 18 301.1Sjmcneill#define AXXIA_CLK_CPU2 19 311.1Sjmcneill#define AXXIA_CLK_CPU3 20 321.1Sjmcneill#define AXXIA_CLK_PER 21 331.1Sjmcneill#define AXXIA_CLK_MMC 22 341.1Sjmcneill 351.1Sjmcneill#endif 36