11.1Sjmcneill/*	$NetBSD: qcom,dispcc-sc7180.h,v 1.1.1.1 2021/11/07 16:49:58 jmcneill Exp $	*/
21.1Sjmcneill
31.1Sjmcneill/* SPDX-License-Identifier: GPL-2.0-only */
41.1Sjmcneill/*
51.1Sjmcneill * Copyright (c) 2019, The Linux Foundation. All rights reserved.
61.1Sjmcneill */
71.1Sjmcneill
81.1Sjmcneill#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7180_H
91.1Sjmcneill#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7180_H
101.1Sjmcneill
111.1Sjmcneill#define DISP_CC_PLL0				0
121.1Sjmcneill#define DISP_CC_PLL0_OUT_EVEN			1
131.1Sjmcneill#define DISP_CC_MDSS_AHB_CLK			2
141.1Sjmcneill#define DISP_CC_MDSS_AHB_CLK_SRC		3
151.1Sjmcneill#define DISP_CC_MDSS_BYTE0_CLK			4
161.1Sjmcneill#define DISP_CC_MDSS_BYTE0_CLK_SRC		5
171.1Sjmcneill#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC		6
181.1Sjmcneill#define DISP_CC_MDSS_BYTE0_INTF_CLK		7
191.1Sjmcneill#define DISP_CC_MDSS_DP_AUX_CLK			8
201.1Sjmcneill#define DISP_CC_MDSS_DP_AUX_CLK_SRC		9
211.1Sjmcneill#define DISP_CC_MDSS_DP_CRYPTO_CLK		10
221.1Sjmcneill#define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC		11
231.1Sjmcneill#define DISP_CC_MDSS_DP_LINK_CLK		12
241.1Sjmcneill#define DISP_CC_MDSS_DP_LINK_CLK_SRC		13
251.1Sjmcneill#define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC	14
261.1Sjmcneill#define DISP_CC_MDSS_DP_LINK_INTF_CLK		15
271.1Sjmcneill#define DISP_CC_MDSS_DP_PIXEL_CLK		16
281.1Sjmcneill#define DISP_CC_MDSS_DP_PIXEL_CLK_SRC		17
291.1Sjmcneill#define DISP_CC_MDSS_ESC0_CLK			18
301.1Sjmcneill#define DISP_CC_MDSS_ESC0_CLK_SRC		19
311.1Sjmcneill#define DISP_CC_MDSS_MDP_CLK			20
321.1Sjmcneill#define DISP_CC_MDSS_MDP_CLK_SRC		21
331.1Sjmcneill#define DISP_CC_MDSS_MDP_LUT_CLK		22
341.1Sjmcneill#define DISP_CC_MDSS_NON_GDSC_AHB_CLK		23
351.1Sjmcneill#define DISP_CC_MDSS_PCLK0_CLK			24
361.1Sjmcneill#define DISP_CC_MDSS_PCLK0_CLK_SRC		25
371.1Sjmcneill#define DISP_CC_MDSS_ROT_CLK			26
381.1Sjmcneill#define DISP_CC_MDSS_ROT_CLK_SRC		27
391.1Sjmcneill#define DISP_CC_MDSS_RSCC_AHB_CLK		28
401.1Sjmcneill#define DISP_CC_MDSS_RSCC_VSYNC_CLK		29
411.1Sjmcneill#define DISP_CC_MDSS_VSYNC_CLK			30
421.1Sjmcneill#define DISP_CC_MDSS_VSYNC_CLK_SRC		31
431.1Sjmcneill#define DISP_CC_XO_CLK				32
441.1Sjmcneill
451.1Sjmcneill/* DISP_CC GDSCR */
461.1Sjmcneill#define MDSS_GDSC				0
471.1Sjmcneill
481.1Sjmcneill#endif
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