11.1Sjmcneill/*	$NetBSD: r7s9210-cpg-mssr.h,v 1.1.1.1 2019/01/22 14:57:02 jmcneill Exp $	*/
21.1Sjmcneill
31.1Sjmcneill/* SPDX-License-Identifier: GPL-2.0
41.1Sjmcneill *
51.1Sjmcneill * Copyright (C) 2018 Renesas Electronics Corp.
61.1Sjmcneill *
71.1Sjmcneill */
81.1Sjmcneill
91.1Sjmcneill#ifndef __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__
101.1Sjmcneill#define __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__
111.1Sjmcneill
121.1Sjmcneill#include <dt-bindings/clock/renesas-cpg-mssr.h>
131.1Sjmcneill
141.1Sjmcneill/* R7S9210 CPG Core Clocks */
151.1Sjmcneill#define R7S9210_CLK_I			0
161.1Sjmcneill#define R7S9210_CLK_G			1
171.1Sjmcneill#define R7S9210_CLK_B			2
181.1Sjmcneill#define R7S9210_CLK_P1			3
191.1Sjmcneill#define R7S9210_CLK_P1C			4
201.1Sjmcneill#define R7S9210_CLK_P0			5
211.1Sjmcneill
221.1Sjmcneill#endif /* __DT_BINDINGS_CLOCK_R7S9210_CPG_MSSR_H__ */
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