11.1Sskrll/*	$NetBSD: qcom,msm8974.h,v 1.1.1.1 2020/01/03 14:33:03 skrll Exp $	*/
21.1Sskrll
31.1Sskrll/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
41.1Sskrll/*
51.1Sskrll * Qualcomm msm8974 interconnect IDs
61.1Sskrll *
71.1Sskrll * Copyright (c) 2019 Brian Masney <masneyb@onstation.org>
81.1Sskrll */
91.1Sskrll
101.1Sskrll#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8974_H
111.1Sskrll#define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8974_H
121.1Sskrll
131.1Sskrll#define BIMC_MAS_AMPSS_M0		0
141.1Sskrll#define BIMC_MAS_AMPSS_M1		1
151.1Sskrll#define BIMC_MAS_MSS_PROC		2
161.1Sskrll#define BIMC_TO_MNOC			3
171.1Sskrll#define BIMC_TO_SNOC			4
181.1Sskrll#define BIMC_SLV_EBI_CH0		5
191.1Sskrll#define BIMC_SLV_AMPSS_L2		6
201.1Sskrll
211.1Sskrll#define CNOC_MAS_RPM_INST		0
221.1Sskrll#define CNOC_MAS_RPM_DATA		1
231.1Sskrll#define CNOC_MAS_RPM_SYS		2
241.1Sskrll#define CNOC_MAS_DEHR			3
251.1Sskrll#define CNOC_MAS_QDSS_DAP		4
261.1Sskrll#define CNOC_MAS_SPDM			5
271.1Sskrll#define CNOC_MAS_TIC			6
281.1Sskrll#define CNOC_SLV_CLK_CTL		7
291.1Sskrll#define CNOC_SLV_CNOC_MSS		8
301.1Sskrll#define CNOC_SLV_SECURITY		9
311.1Sskrll#define CNOC_SLV_TCSR			10
321.1Sskrll#define CNOC_SLV_TLMM			11
331.1Sskrll#define CNOC_SLV_CRYPTO_0_CFG		12
341.1Sskrll#define CNOC_SLV_CRYPTO_1_CFG		13
351.1Sskrll#define CNOC_SLV_IMEM_CFG		14
361.1Sskrll#define CNOC_SLV_MESSAGE_RAM		15
371.1Sskrll#define CNOC_SLV_BIMC_CFG		16
381.1Sskrll#define CNOC_SLV_BOOT_ROM		17
391.1Sskrll#define CNOC_SLV_PMIC_ARB		18
401.1Sskrll#define CNOC_SLV_SPDM_WRAPPER		19
411.1Sskrll#define CNOC_SLV_DEHR_CFG		20
421.1Sskrll#define CNOC_SLV_MPM			21
431.1Sskrll#define CNOC_SLV_QDSS_CFG		22
441.1Sskrll#define CNOC_SLV_RBCPR_CFG		23
451.1Sskrll#define CNOC_SLV_RBCPR_QDSS_APU_CFG	24
461.1Sskrll#define CNOC_TO_SNOC			25
471.1Sskrll#define CNOC_SLV_CNOC_ONOC_CFG		26
481.1Sskrll#define CNOC_SLV_CNOC_MNOC_MMSS_CFG	27
491.1Sskrll#define CNOC_SLV_CNOC_MNOC_CFG		28
501.1Sskrll#define CNOC_SLV_PNOC_CFG		29
511.1Sskrll#define CNOC_SLV_SNOC_MPU_CFG		30
521.1Sskrll#define CNOC_SLV_SNOC_CFG		31
531.1Sskrll#define CNOC_SLV_EBI1_DLL_CFG		32
541.1Sskrll#define CNOC_SLV_PHY_APU_CFG		33
551.1Sskrll#define CNOC_SLV_EBI1_PHY_CFG		34
561.1Sskrll#define CNOC_SLV_RPM			35
571.1Sskrll#define CNOC_SLV_SERVICE_CNOC		36
581.1Sskrll
591.1Sskrll#define MNOC_MAS_GRAPHICS_3D		0
601.1Sskrll#define MNOC_MAS_JPEG			1
611.1Sskrll#define MNOC_MAS_MDP_PORT0		2
621.1Sskrll#define MNOC_MAS_VIDEO_P0		3
631.1Sskrll#define MNOC_MAS_VIDEO_P1		4
641.1Sskrll#define MNOC_MAS_VFE			5
651.1Sskrll#define MNOC_TO_CNOC			6
661.1Sskrll#define MNOC_TO_BIMC			7
671.1Sskrll#define MNOC_SLV_CAMERA_CFG		8
681.1Sskrll#define MNOC_SLV_DISPLAY_CFG		9
691.1Sskrll#define MNOC_SLV_OCMEM_CFG		10
701.1Sskrll#define MNOC_SLV_CPR_CFG		11
711.1Sskrll#define MNOC_SLV_CPR_XPU_CFG		12
721.1Sskrll#define MNOC_SLV_MISC_CFG		13
731.1Sskrll#define MNOC_SLV_MISC_XPU_CFG		14
741.1Sskrll#define MNOC_SLV_VENUS_CFG		15
751.1Sskrll#define MNOC_SLV_GRAPHICS_3D_CFG	16
761.1Sskrll#define MNOC_SLV_MMSS_CLK_CFG		17
771.1Sskrll#define MNOC_SLV_MMSS_CLK_XPU_CFG	18
781.1Sskrll#define MNOC_SLV_MNOC_MPU_CFG		19
791.1Sskrll#define MNOC_SLV_ONOC_MPU_CFG		20
801.1Sskrll#define MNOC_SLV_SERVICE_MNOC		21
811.1Sskrll
821.1Sskrll#define OCMEM_NOC_TO_OCMEM_VNOC		0
831.1Sskrll#define OCMEM_MAS_JPEG_OCMEM		1
841.1Sskrll#define OCMEM_MAS_MDP_OCMEM		2
851.1Sskrll#define OCMEM_MAS_VIDEO_P0_OCMEM	3
861.1Sskrll#define OCMEM_MAS_VIDEO_P1_OCMEM	4
871.1Sskrll#define OCMEM_MAS_VFE_OCMEM		5
881.1Sskrll#define OCMEM_MAS_CNOC_ONOC_CFG		6
891.1Sskrll#define OCMEM_SLV_SERVICE_ONOC		7
901.1Sskrll#define OCMEM_VNOC_TO_SNOC		8
911.1Sskrll#define OCMEM_VNOC_TO_OCMEM_NOC		9
921.1Sskrll#define OCMEM_VNOC_MAS_GFX3D		10
931.1Sskrll#define OCMEM_SLV_OCMEM			11
941.1Sskrll
951.1Sskrll#define PNOC_MAS_PNOC_CFG		0
961.1Sskrll#define PNOC_MAS_SDCC_1			1
971.1Sskrll#define PNOC_MAS_SDCC_3			2
981.1Sskrll#define PNOC_MAS_SDCC_4			3
991.1Sskrll#define PNOC_MAS_SDCC_2			4
1001.1Sskrll#define PNOC_MAS_TSIF			5
1011.1Sskrll#define PNOC_MAS_BAM_DMA		6
1021.1Sskrll#define PNOC_MAS_BLSP_2			7
1031.1Sskrll#define PNOC_MAS_USB_HSIC		8
1041.1Sskrll#define PNOC_MAS_BLSP_1			9
1051.1Sskrll#define PNOC_MAS_USB_HS			10
1061.1Sskrll#define PNOC_TO_SNOC			11
1071.1Sskrll#define PNOC_SLV_SDCC_1			12
1081.1Sskrll#define PNOC_SLV_SDCC_3			13
1091.1Sskrll#define PNOC_SLV_SDCC_2			14
1101.1Sskrll#define PNOC_SLV_SDCC_4			15
1111.1Sskrll#define PNOC_SLV_TSIF			16
1121.1Sskrll#define PNOC_SLV_BAM_DMA		17
1131.1Sskrll#define PNOC_SLV_BLSP_2			18
1141.1Sskrll#define PNOC_SLV_USB_HSIC		19
1151.1Sskrll#define PNOC_SLV_BLSP_1			20
1161.1Sskrll#define PNOC_SLV_USB_HS			21
1171.1Sskrll#define PNOC_SLV_PDM			22
1181.1Sskrll#define PNOC_SLV_PERIPH_APU_CFG		23
1191.1Sskrll#define PNOC_SLV_PNOC_MPU_CFG		24
1201.1Sskrll#define PNOC_SLV_PRNG			25
1211.1Sskrll#define PNOC_SLV_SERVICE_PNOC		26
1221.1Sskrll
1231.1Sskrll#define SNOC_MAS_LPASS_AHB		0
1241.1Sskrll#define SNOC_MAS_QDSS_BAM		1
1251.1Sskrll#define SNOC_MAS_SNOC_CFG		2
1261.1Sskrll#define SNOC_TO_BIMC			3
1271.1Sskrll#define SNOC_TO_CNOC			4
1281.1Sskrll#define SNOC_TO_PNOC			5
1291.1Sskrll#define SNOC_TO_OCMEM_VNOC		6
1301.1Sskrll#define SNOC_MAS_CRYPTO_CORE0		7
1311.1Sskrll#define SNOC_MAS_CRYPTO_CORE1		8
1321.1Sskrll#define SNOC_MAS_LPASS_PROC		9
1331.1Sskrll#define SNOC_MAS_MSS			10
1341.1Sskrll#define SNOC_MAS_MSS_NAV		11
1351.1Sskrll#define SNOC_MAS_OCMEM_DMA		12
1361.1Sskrll#define SNOC_MAS_WCSS			13
1371.1Sskrll#define SNOC_MAS_QDSS_ETR		14
1381.1Sskrll#define SNOC_MAS_USB3			15
1391.1Sskrll#define SNOC_SLV_AMPSS			16
1401.1Sskrll#define SNOC_SLV_LPASS			17
1411.1Sskrll#define SNOC_SLV_USB3			18
1421.1Sskrll#define SNOC_SLV_WCSS			19
1431.1Sskrll#define SNOC_SLV_OCIMEM			20
1441.1Sskrll#define SNOC_SLV_SNOC_OCMEM		21
1451.1Sskrll#define SNOC_SLV_SERVICE_SNOC		22
1461.1Sskrll#define SNOC_SLV_QDSS_STM		23
1471.1Sskrll
1481.1Sskrll#endif
149