11.1Sjmcneill/*	$NetBSD: qcom,gcc-apq8084.h,v 1.1.1.2 2020/01/03 14:33:06 skrll Exp $	*/
21.1Sjmcneill
31.1.1.2Sskrll/* SPDX-License-Identifier: GPL-2.0-only */
41.1Sjmcneill/*
51.1Sjmcneill * Copyright (c) 2014, The Linux Foundation. All rights reserved.
61.1Sjmcneill */
71.1Sjmcneill
81.1Sjmcneill#ifndef _DT_BINDINGS_RESET_APQ_GCC_8084_H
91.1Sjmcneill#define _DT_BINDINGS_RESET_APQ_GCC_8084_H
101.1Sjmcneill
111.1Sjmcneill#define GCC_SYSTEM_NOC_BCR		0
121.1Sjmcneill#define GCC_CONFIG_NOC_BCR		1
131.1Sjmcneill#define GCC_PERIPH_NOC_BCR		2
141.1Sjmcneill#define GCC_IMEM_BCR			3
151.1Sjmcneill#define GCC_MMSS_BCR			4
161.1Sjmcneill#define GCC_QDSS_BCR			5
171.1Sjmcneill#define GCC_USB_30_BCR			6
181.1Sjmcneill#define GCC_USB3_PHY_BCR		7
191.1Sjmcneill#define GCC_USB_HS_HSIC_BCR		8
201.1Sjmcneill#define GCC_USB_HS_BCR			9
211.1Sjmcneill#define GCC_USB2A_PHY_BCR		10
221.1Sjmcneill#define GCC_USB2B_PHY_BCR		11
231.1Sjmcneill#define GCC_SDCC1_BCR			12
241.1Sjmcneill#define GCC_SDCC2_BCR			13
251.1Sjmcneill#define GCC_SDCC3_BCR			14
261.1Sjmcneill#define GCC_SDCC4_BCR			15
271.1Sjmcneill#define GCC_BLSP1_BCR			16
281.1Sjmcneill#define GCC_BLSP1_QUP1_BCR		17
291.1Sjmcneill#define GCC_BLSP1_UART1_BCR		18
301.1Sjmcneill#define GCC_BLSP1_QUP2_BCR		19
311.1Sjmcneill#define GCC_BLSP1_UART2_BCR		20
321.1Sjmcneill#define GCC_BLSP1_QUP3_BCR		21
331.1Sjmcneill#define GCC_BLSP1_UART3_BCR		22
341.1Sjmcneill#define GCC_BLSP1_QUP4_BCR		23
351.1Sjmcneill#define GCC_BLSP1_UART4_BCR		24
361.1Sjmcneill#define GCC_BLSP1_QUP5_BCR		25
371.1Sjmcneill#define GCC_BLSP1_UART5_BCR		26
381.1Sjmcneill#define GCC_BLSP1_QUP6_BCR		27
391.1Sjmcneill#define GCC_BLSP1_UART6_BCR		28
401.1Sjmcneill#define GCC_BLSP2_BCR			29
411.1Sjmcneill#define GCC_BLSP2_QUP1_BCR		30
421.1Sjmcneill#define GCC_BLSP2_UART1_BCR		31
431.1Sjmcneill#define GCC_BLSP2_QUP2_BCR		32
441.1Sjmcneill#define GCC_BLSP2_UART2_BCR		33
451.1Sjmcneill#define GCC_BLSP2_QUP3_BCR		34
461.1Sjmcneill#define GCC_BLSP2_UART3_BCR		35
471.1Sjmcneill#define GCC_BLSP2_QUP4_BCR		36
481.1Sjmcneill#define GCC_BLSP2_UART4_BCR		37
491.1Sjmcneill#define GCC_BLSP2_QUP5_BCR		38
501.1Sjmcneill#define GCC_BLSP2_UART5_BCR		39
511.1Sjmcneill#define GCC_BLSP2_QUP6_BCR		40
521.1Sjmcneill#define GCC_BLSP2_UART6_BCR		41
531.1Sjmcneill#define GCC_PDM_BCR			42
541.1Sjmcneill#define GCC_PRNG_BCR			43
551.1Sjmcneill#define GCC_BAM_DMA_BCR			44
561.1Sjmcneill#define GCC_TSIF_BCR			45
571.1Sjmcneill#define GCC_TCSR_BCR			46
581.1Sjmcneill#define GCC_BOOT_ROM_BCR		47
591.1Sjmcneill#define GCC_MSG_RAM_BCR			48
601.1Sjmcneill#define GCC_TLMM_BCR			49
611.1Sjmcneill#define GCC_MPM_BCR			50
621.1Sjmcneill#define GCC_MPM_AHB_RESET		51
631.1Sjmcneill#define GCC_MPM_NON_AHB_RESET		52
641.1Sjmcneill#define GCC_SEC_CTRL_BCR		53
651.1Sjmcneill#define GCC_SPMI_BCR			54
661.1Sjmcneill#define GCC_SPDM_BCR			55
671.1Sjmcneill#define GCC_CE1_BCR			56
681.1Sjmcneill#define GCC_CE2_BCR			57
691.1Sjmcneill#define GCC_BIMC_BCR			58
701.1Sjmcneill#define GCC_SNOC_BUS_TIMEOUT0_BCR	59
711.1Sjmcneill#define GCC_SNOC_BUS_TIMEOUT2_BCR	60
721.1Sjmcneill#define GCC_PNOC_BUS_TIMEOUT0_BCR	61
731.1Sjmcneill#define GCC_PNOC_BUS_TIMEOUT1_BCR	62
741.1Sjmcneill#define GCC_PNOC_BUS_TIMEOUT2_BCR	63
751.1Sjmcneill#define GCC_PNOC_BUS_TIMEOUT3_BCR	64
761.1Sjmcneill#define GCC_PNOC_BUS_TIMEOUT4_BCR	65
771.1Sjmcneill#define GCC_CNOC_BUS_TIMEOUT0_BCR	66
781.1Sjmcneill#define GCC_CNOC_BUS_TIMEOUT1_BCR	67
791.1Sjmcneill#define GCC_CNOC_BUS_TIMEOUT2_BCR	68
801.1Sjmcneill#define GCC_CNOC_BUS_TIMEOUT3_BCR	69
811.1Sjmcneill#define GCC_CNOC_BUS_TIMEOUT4_BCR	70
821.1Sjmcneill#define GCC_CNOC_BUS_TIMEOUT5_BCR	71
831.1Sjmcneill#define GCC_CNOC_BUS_TIMEOUT6_BCR	72
841.1Sjmcneill#define GCC_DEHR_BCR			73
851.1Sjmcneill#define GCC_RBCPR_BCR			74
861.1Sjmcneill#define GCC_MSS_RESTART			75
871.1Sjmcneill#define GCC_LPASS_RESTART		76
881.1Sjmcneill#define GCC_WCSS_RESTART		77
891.1Sjmcneill#define GCC_VENUS_RESTART		78
901.1Sjmcneill#define GCC_COPSS_SMMU_BCR		79
911.1Sjmcneill#define GCC_SPSS_BCR			80
921.1Sjmcneill#define GCC_PCIE_0_BCR			81
931.1Sjmcneill#define GCC_PCIE_0_PHY_BCR		82
941.1Sjmcneill#define GCC_PCIE_1_BCR			83
951.1Sjmcneill#define GCC_PCIE_1_PHY_BCR		84
961.1Sjmcneill#define GCC_USB_30_SEC_BCR		85
971.1Sjmcneill#define GCC_USB3_SEC_PHY_BCR		86
981.1Sjmcneill#define GCC_SATA_BCR			87
991.1Sjmcneill#define GCC_CE3_BCR			88
1001.1Sjmcneill#define GCC_UFS_BCR			89
1011.1Sjmcneill#define GCC_USB30_PHY_COM_BCR		90
1021.1Sjmcneill
1031.1Sjmcneill#endif
104