1/* $NetBSD: realtek,rtd1295.h,v 1.1.1.2 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ 4/* 5 * Realtek RTD1295 reset controllers 6 * 7 * Copyright (c) 2017 Andreas Färber 8 */ 9#ifndef DT_BINDINGS_RESET_RTD1295_H 10#define DT_BINDINGS_RESET_RTD1295_H 11 12/* soft reset 1 */ 13#define RTD1295_RSTN_MISC 0 14#define RTD1295_RSTN_NAT 1 15#define RTD1295_RSTN_USB3_PHY0_POW 2 16#define RTD1295_RSTN_GSPI 3 17#define RTD1295_RSTN_USB3_P0_MDIO 4 18#define RTD1295_RSTN_SATA_0 5 19#define RTD1295_RSTN_USB 6 20#define RTD1295_RSTN_SATA_PHY_0 7 21#define RTD1295_RSTN_USB_PHY0 8 22#define RTD1295_RSTN_USB_PHY1 9 23#define RTD1295_RSTN_SATA_PHY_POW_0 10 24#define RTD1295_RSTN_SATA_FUNC_EXIST_0 11 25#define RTD1295_RSTN_HDMI 12 26#define RTD1295_RSTN_VE1 13 27#define RTD1295_RSTN_VE2 14 28#define RTD1295_RSTN_VE3 15 29#define RTD1295_RSTN_ETN 16 30#define RTD1295_RSTN_AIO 17 31#define RTD1295_RSTN_GPU 18 32#define RTD1295_RSTN_TVE 19 33#define RTD1295_RSTN_VO 20 34#define RTD1295_RSTN_LVDS 21 35#define RTD1295_RSTN_SE 22 36#define RTD1295_RSTN_DCU 23 37#define RTD1295_RSTN_DC_PHY 24 38#define RTD1295_RSTN_CP 25 39#define RTD1295_RSTN_MD 26 40#define RTD1295_RSTN_TP 27 41#define RTD1295_RSTN_AE 28 42#define RTD1295_RSTN_NF 29 43#define RTD1295_RSTN_MIPI 30 44#define RTD1295_RSTN_RSA 31 45 46/* soft reset 2 */ 47#define RTD1295_RSTN_ACPU 0 48#define RTD1295_RSTN_JPEG 1 49#define RTD1295_RSTN_USB_PHY3 2 50#define RTD1295_RSTN_USB_PHY2 3 51#define RTD1295_RSTN_USB3_PHY1_POW 4 52#define RTD1295_RSTN_USB3_P1_MDIO 5 53#define RTD1295_RSTN_PCIE0_STITCH 6 54#define RTD1295_RSTN_PCIE0_PHY 7 55#define RTD1295_RSTN_PCIE0 8 56#define RTD1295_RSTN_PCR_CNT 9 57#define RTD1295_RSTN_CR 10 58#define RTD1295_RSTN_EMMC 11 59#define RTD1295_RSTN_SDIO 12 60#define RTD1295_RSTN_PCIE0_CORE 13 61#define RTD1295_RSTN_PCIE0_POWER 14 62#define RTD1295_RSTN_PCIE0_NONSTICH 15 63#define RTD1295_RSTN_PCIE1_PHY 16 64#define RTD1295_RSTN_PCIE1 17 65#define RTD1295_RSTN_I2C_5 18 66#define RTD1295_RSTN_PCIE1_STITCH 19 67#define RTD1295_RSTN_PCIE1_CORE 20 68#define RTD1295_RSTN_PCIE1_POWER 21 69#define RTD1295_RSTN_PCIE1_NONSTICH 22 70#define RTD1295_RSTN_I2C_4 23 71#define RTD1295_RSTN_I2C_3 24 72#define RTD1295_RSTN_I2C_2 25 73#define RTD1295_RSTN_I2C_1 26 74#define RTD1295_RSTN_UR2 27 75#define RTD1295_RSTN_UR1 28 76#define RTD1295_RSTN_MISC_SC 29 77#define RTD1295_RSTN_CBUS_TX 30 78#define RTD1295_RSTN_SDS_PHY 31 79 80/* soft reset 3 */ 81#define RTD1295_RSTN_SB2 0 82 83/* soft reset 4 */ 84#define RTD1295_RSTN_DCPHY_CRT 0 85#define RTD1295_RSTN_DCPHY_ALERT_RX 1 86#define RTD1295_RSTN_DCPHY_PTR 2 87#define RTD1295_RSTN_DCPHY_LDO 3 88#define RTD1295_RSTN_DCPHY_SSC_DIG 4 89#define RTD1295_RSTN_HDMIRX 5 90#define RTD1295_RSTN_CBUSRX 6 91#define RTD1295_RSTN_SATA_PHY_POW_1 7 92#define RTD1295_RSTN_SATA_FUNC_EXIST_1 8 93#define RTD1295_RSTN_SATA_PHY_1 9 94#define RTD1295_RSTN_SATA_1 10 95#define RTD1295_RSTN_FAN 11 96#define RTD1295_RSTN_HDMIRX_WRAP 12 97#define RTD1295_RSTN_PCIE0_PHY_MDIO 13 98#define RTD1295_RSTN_PCIE1_PHY_MDIO 14 99#define RTD1295_RSTN_DISP 15 100 101/* iso reset */ 102#define RTD1295_ISO_RSTN_IR 1 103#define RTD1295_ISO_RSTN_CEC0 2 104#define RTD1295_ISO_RSTN_CEC1 3 105#define RTD1295_ISO_RSTN_DP 4 106#define RTD1295_ISO_RSTN_CBUSTX 5 107#define RTD1295_ISO_RSTN_CBUSRX 6 108#define RTD1295_ISO_RSTN_EFUSE 7 109#define RTD1295_ISO_RSTN_UR0 8 110#define RTD1295_ISO_RSTN_GMAC 9 111#define RTD1295_ISO_RSTN_GPHY 10 112#define RTD1295_ISO_RSTN_I2C_0 11 113#define RTD1295_ISO_RSTN_I2C_1 12 114#define RTD1295_ISO_RSTN_CBUS 13 115 116#endif 117