1b8e80941Smrg/*
2b8e80941Smrg * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3b8e80941Smrg * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
4b8e80941Smrg * Copyright (c) 2008 Red Hat Inc.
5b8e80941Smrg * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6b8e80941Smrg * Copyright (c) 2007-2008 Intel Corporation
7b8e80941Smrg *
8b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a
9b8e80941Smrg * copy of this software and associated documentation files (the "Software"),
10b8e80941Smrg * to deal in the Software without restriction, including without limitation
11b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the
13b8e80941Smrg * Software is furnished to do so, subject to the following conditions:
14b8e80941Smrg *
15b8e80941Smrg * The above copyright notice and this permission notice shall be included in
16b8e80941Smrg * all copies or substantial portions of the Software.
17b8e80941Smrg *
18b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21b8e80941Smrg * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24b8e80941Smrg * IN THE SOFTWARE.
25b8e80941Smrg */
26b8e80941Smrg
27b8e80941Smrg#ifndef _DRM_MODE_H
28b8e80941Smrg#define _DRM_MODE_H
29b8e80941Smrg
30b8e80941Smrg#include "drm.h"
31b8e80941Smrg
32b8e80941Smrg#if defined(__cplusplus)
33b8e80941Smrgextern "C" {
34b8e80941Smrg#endif
35b8e80941Smrg
36b8e80941Smrg#define DRM_DISPLAY_INFO_LEN	32
37b8e80941Smrg#define DRM_CONNECTOR_NAME_LEN	32
38b8e80941Smrg#define DRM_DISPLAY_MODE_LEN	32
39b8e80941Smrg#define DRM_PROP_NAME_LEN	32
40b8e80941Smrg
41b8e80941Smrg#define DRM_MODE_TYPE_BUILTIN	(1<<0) /* deprecated */
42b8e80941Smrg#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
43b8e80941Smrg#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
44b8e80941Smrg#define DRM_MODE_TYPE_PREFERRED	(1<<3)
45b8e80941Smrg#define DRM_MODE_TYPE_DEFAULT	(1<<4) /* deprecated */
46b8e80941Smrg#define DRM_MODE_TYPE_USERDEF	(1<<5)
47b8e80941Smrg#define DRM_MODE_TYPE_DRIVER	(1<<6)
48b8e80941Smrg
49b8e80941Smrg#define DRM_MODE_TYPE_ALL	(DRM_MODE_TYPE_PREFERRED |	\
50b8e80941Smrg				 DRM_MODE_TYPE_USERDEF |	\
51b8e80941Smrg				 DRM_MODE_TYPE_DRIVER)
52b8e80941Smrg
53b8e80941Smrg/* Video mode flags */
54b8e80941Smrg/* bit compatible with the xrandr RR_ definitions (bits 0-13)
55b8e80941Smrg *
56b8e80941Smrg * ABI warning: Existing userspace really expects
57b8e80941Smrg * the mode flags to match the xrandr definitions. Any
58b8e80941Smrg * changes that don't match the xrandr definitions will
59b8e80941Smrg * likely need a new client cap or some other mechanism
60b8e80941Smrg * to avoid breaking existing userspace. This includes
61b8e80941Smrg * allocating new flags in the previously unused bits!
62b8e80941Smrg */
63b8e80941Smrg#define DRM_MODE_FLAG_PHSYNC			(1<<0)
64b8e80941Smrg#define DRM_MODE_FLAG_NHSYNC			(1<<1)
65b8e80941Smrg#define DRM_MODE_FLAG_PVSYNC			(1<<2)
66b8e80941Smrg#define DRM_MODE_FLAG_NVSYNC			(1<<3)
67b8e80941Smrg#define DRM_MODE_FLAG_INTERLACE			(1<<4)
68b8e80941Smrg#define DRM_MODE_FLAG_DBLSCAN			(1<<5)
69b8e80941Smrg#define DRM_MODE_FLAG_CSYNC			(1<<6)
70b8e80941Smrg#define DRM_MODE_FLAG_PCSYNC			(1<<7)
71b8e80941Smrg#define DRM_MODE_FLAG_NCSYNC			(1<<8)
72b8e80941Smrg#define DRM_MODE_FLAG_HSKEW			(1<<9) /* hskew provided */
73b8e80941Smrg#define DRM_MODE_FLAG_BCAST			(1<<10) /* deprecated */
74b8e80941Smrg#define DRM_MODE_FLAG_PIXMUX			(1<<11) /* deprecated */
75b8e80941Smrg#define DRM_MODE_FLAG_DBLCLK			(1<<12)
76b8e80941Smrg#define DRM_MODE_FLAG_CLKDIV2			(1<<13)
77b8e80941Smrg /*
78b8e80941Smrg  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
79b8e80941Smrg  * (define not exposed to user space).
80b8e80941Smrg  */
81b8e80941Smrg#define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
82b8e80941Smrg#define  DRM_MODE_FLAG_3D_NONE		(0<<14)
83b8e80941Smrg#define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
84b8e80941Smrg#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
85b8e80941Smrg#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
86b8e80941Smrg#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
87b8e80941Smrg#define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
88b8e80941Smrg#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
89b8e80941Smrg#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
90b8e80941Smrg#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
91b8e80941Smrg
92b8e80941Smrg/* Picture aspect ratio options */
93b8e80941Smrg#define DRM_MODE_PICTURE_ASPECT_NONE		0
94b8e80941Smrg#define DRM_MODE_PICTURE_ASPECT_4_3		1
95b8e80941Smrg#define DRM_MODE_PICTURE_ASPECT_16_9		2
96b8e80941Smrg#define DRM_MODE_PICTURE_ASPECT_64_27		3
97b8e80941Smrg#define DRM_MODE_PICTURE_ASPECT_256_135		4
98b8e80941Smrg
99b8e80941Smrg/* Content type options */
100b8e80941Smrg#define DRM_MODE_CONTENT_TYPE_NO_DATA		0
101b8e80941Smrg#define DRM_MODE_CONTENT_TYPE_GRAPHICS		1
102b8e80941Smrg#define DRM_MODE_CONTENT_TYPE_PHOTO		2
103b8e80941Smrg#define DRM_MODE_CONTENT_TYPE_CINEMA		3
104b8e80941Smrg#define DRM_MODE_CONTENT_TYPE_GAME		4
105b8e80941Smrg
106b8e80941Smrg/* Aspect ratio flag bitmask (4 bits 22:19) */
107b8e80941Smrg#define DRM_MODE_FLAG_PIC_AR_MASK		(0x0F<<19)
108b8e80941Smrg#define  DRM_MODE_FLAG_PIC_AR_NONE \
109b8e80941Smrg			(DRM_MODE_PICTURE_ASPECT_NONE<<19)
110b8e80941Smrg#define  DRM_MODE_FLAG_PIC_AR_4_3 \
111b8e80941Smrg			(DRM_MODE_PICTURE_ASPECT_4_3<<19)
112b8e80941Smrg#define  DRM_MODE_FLAG_PIC_AR_16_9 \
113b8e80941Smrg			(DRM_MODE_PICTURE_ASPECT_16_9<<19)
114b8e80941Smrg#define  DRM_MODE_FLAG_PIC_AR_64_27 \
115b8e80941Smrg			(DRM_MODE_PICTURE_ASPECT_64_27<<19)
116b8e80941Smrg#define  DRM_MODE_FLAG_PIC_AR_256_135 \
117b8e80941Smrg			(DRM_MODE_PICTURE_ASPECT_256_135<<19)
118b8e80941Smrg
119b8e80941Smrg#define  DRM_MODE_FLAG_ALL	(DRM_MODE_FLAG_PHSYNC |		\
120b8e80941Smrg				 DRM_MODE_FLAG_NHSYNC |		\
121b8e80941Smrg				 DRM_MODE_FLAG_PVSYNC |		\
122b8e80941Smrg				 DRM_MODE_FLAG_NVSYNC |		\
123b8e80941Smrg				 DRM_MODE_FLAG_INTERLACE |	\
124b8e80941Smrg				 DRM_MODE_FLAG_DBLSCAN |	\
125b8e80941Smrg				 DRM_MODE_FLAG_CSYNC |		\
126b8e80941Smrg				 DRM_MODE_FLAG_PCSYNC |		\
127b8e80941Smrg				 DRM_MODE_FLAG_NCSYNC |		\
128b8e80941Smrg				 DRM_MODE_FLAG_HSKEW |		\
129b8e80941Smrg				 DRM_MODE_FLAG_DBLCLK |		\
130b8e80941Smrg				 DRM_MODE_FLAG_CLKDIV2 |	\
131b8e80941Smrg				 DRM_MODE_FLAG_3D_MASK)
132b8e80941Smrg
133b8e80941Smrg/* DPMS flags */
134b8e80941Smrg/* bit compatible with the xorg definitions. */
135b8e80941Smrg#define DRM_MODE_DPMS_ON	0
136b8e80941Smrg#define DRM_MODE_DPMS_STANDBY	1
137b8e80941Smrg#define DRM_MODE_DPMS_SUSPEND	2
138b8e80941Smrg#define DRM_MODE_DPMS_OFF	3
139b8e80941Smrg
140b8e80941Smrg/* Scaling mode options */
141b8e80941Smrg#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
142b8e80941Smrg					     software can still scale) */
143b8e80941Smrg#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
144b8e80941Smrg#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
145b8e80941Smrg#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
146b8e80941Smrg
147b8e80941Smrg/* Dithering mode options */
148b8e80941Smrg#define DRM_MODE_DITHERING_OFF	0
149b8e80941Smrg#define DRM_MODE_DITHERING_ON	1
150b8e80941Smrg#define DRM_MODE_DITHERING_AUTO 2
151b8e80941Smrg
152b8e80941Smrg/* Dirty info options */
153b8e80941Smrg#define DRM_MODE_DIRTY_OFF      0
154b8e80941Smrg#define DRM_MODE_DIRTY_ON       1
155b8e80941Smrg#define DRM_MODE_DIRTY_ANNOTATE 2
156b8e80941Smrg
157b8e80941Smrg/* Link Status options */
158b8e80941Smrg#define DRM_MODE_LINK_STATUS_GOOD	0
159b8e80941Smrg#define DRM_MODE_LINK_STATUS_BAD	1
160b8e80941Smrg
161b8e80941Smrg/*
162b8e80941Smrg * DRM_MODE_ROTATE_<degrees>
163b8e80941Smrg *
164b8e80941Smrg * Signals that a drm plane is been rotated <degrees> degrees in counter
165b8e80941Smrg * clockwise direction.
166b8e80941Smrg *
167b8e80941Smrg * This define is provided as a convenience, looking up the property id
168b8e80941Smrg * using the name->prop id lookup is the preferred method.
169b8e80941Smrg */
170b8e80941Smrg#define DRM_MODE_ROTATE_0       (1<<0)
171b8e80941Smrg#define DRM_MODE_ROTATE_90      (1<<1)
172b8e80941Smrg#define DRM_MODE_ROTATE_180     (1<<2)
173b8e80941Smrg#define DRM_MODE_ROTATE_270     (1<<3)
174b8e80941Smrg
175b8e80941Smrg/*
176b8e80941Smrg * DRM_MODE_ROTATE_MASK
177b8e80941Smrg *
178b8e80941Smrg * Bitmask used to look for drm plane rotations.
179b8e80941Smrg */
180b8e80941Smrg#define DRM_MODE_ROTATE_MASK (\
181b8e80941Smrg		DRM_MODE_ROTATE_0  | \
182b8e80941Smrg		DRM_MODE_ROTATE_90  | \
183b8e80941Smrg		DRM_MODE_ROTATE_180 | \
184b8e80941Smrg		DRM_MODE_ROTATE_270)
185b8e80941Smrg
186b8e80941Smrg/*
187b8e80941Smrg * DRM_MODE_REFLECT_<axis>
188b8e80941Smrg *
189b8e80941Smrg * Signals that the contents of a drm plane is reflected along the <axis> axis,
190b8e80941Smrg * in the same way as mirroring.
191b8e80941Smrg * See kerneldoc chapter "Plane Composition Properties" for more details.
192b8e80941Smrg *
193b8e80941Smrg * This define is provided as a convenience, looking up the property id
194b8e80941Smrg * using the name->prop id lookup is the preferred method.
195b8e80941Smrg */
196b8e80941Smrg#define DRM_MODE_REFLECT_X      (1<<4)
197b8e80941Smrg#define DRM_MODE_REFLECT_Y      (1<<5)
198b8e80941Smrg
199b8e80941Smrg/*
200b8e80941Smrg * DRM_MODE_REFLECT_MASK
201b8e80941Smrg *
202b8e80941Smrg * Bitmask used to look for drm plane reflections.
203b8e80941Smrg */
204b8e80941Smrg#define DRM_MODE_REFLECT_MASK (\
205b8e80941Smrg		DRM_MODE_REFLECT_X | \
206b8e80941Smrg		DRM_MODE_REFLECT_Y)
207b8e80941Smrg
208b8e80941Smrg/* Content Protection Flags */
209b8e80941Smrg#define DRM_MODE_CONTENT_PROTECTION_UNDESIRED	0
210b8e80941Smrg#define DRM_MODE_CONTENT_PROTECTION_DESIRED     1
211b8e80941Smrg#define DRM_MODE_CONTENT_PROTECTION_ENABLED     2
212b8e80941Smrg
213b8e80941Smrgstruct drm_mode_modeinfo {
214b8e80941Smrg	__u32 clock;
215b8e80941Smrg	__u16 hdisplay;
216b8e80941Smrg	__u16 hsync_start;
217b8e80941Smrg	__u16 hsync_end;
218b8e80941Smrg	__u16 htotal;
219b8e80941Smrg	__u16 hskew;
220b8e80941Smrg	__u16 vdisplay;
221b8e80941Smrg	__u16 vsync_start;
222b8e80941Smrg	__u16 vsync_end;
223b8e80941Smrg	__u16 vtotal;
224b8e80941Smrg	__u16 vscan;
225b8e80941Smrg
226b8e80941Smrg	__u32 vrefresh;
227b8e80941Smrg
228b8e80941Smrg	__u32 flags;
229b8e80941Smrg	__u32 type;
230b8e80941Smrg	char name[DRM_DISPLAY_MODE_LEN];
231b8e80941Smrg};
232b8e80941Smrg
233b8e80941Smrgstruct drm_mode_card_res {
234b8e80941Smrg	__u64 fb_id_ptr;
235b8e80941Smrg	__u64 crtc_id_ptr;
236b8e80941Smrg	__u64 connector_id_ptr;
237b8e80941Smrg	__u64 encoder_id_ptr;
238b8e80941Smrg	__u32 count_fbs;
239b8e80941Smrg	__u32 count_crtcs;
240b8e80941Smrg	__u32 count_connectors;
241b8e80941Smrg	__u32 count_encoders;
242b8e80941Smrg	__u32 min_width;
243b8e80941Smrg	__u32 max_width;
244b8e80941Smrg	__u32 min_height;
245b8e80941Smrg	__u32 max_height;
246b8e80941Smrg};
247b8e80941Smrg
248b8e80941Smrgstruct drm_mode_crtc {
249b8e80941Smrg	__u64 set_connectors_ptr;
250b8e80941Smrg	__u32 count_connectors;
251b8e80941Smrg
252b8e80941Smrg	__u32 crtc_id; /**< Id */
253b8e80941Smrg	__u32 fb_id; /**< Id of framebuffer */
254b8e80941Smrg
255b8e80941Smrg	__u32 x; /**< x Position on the framebuffer */
256b8e80941Smrg	__u32 y; /**< y Position on the framebuffer */
257b8e80941Smrg
258b8e80941Smrg	__u32 gamma_size;
259b8e80941Smrg	__u32 mode_valid;
260b8e80941Smrg	struct drm_mode_modeinfo mode;
261b8e80941Smrg};
262b8e80941Smrg
263b8e80941Smrg#define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
264b8e80941Smrg#define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
265b8e80941Smrg
266b8e80941Smrg/* Planes blend with or override other bits on the CRTC */
267b8e80941Smrgstruct drm_mode_set_plane {
268b8e80941Smrg	__u32 plane_id;
269b8e80941Smrg	__u32 crtc_id;
270b8e80941Smrg	__u32 fb_id; /* fb object contains surface format type */
271b8e80941Smrg	__u32 flags; /* see above flags */
272b8e80941Smrg
273b8e80941Smrg	/* Signed dest location allows it to be partially off screen */
274b8e80941Smrg	__s32 crtc_x;
275b8e80941Smrg	__s32 crtc_y;
276b8e80941Smrg	__u32 crtc_w;
277b8e80941Smrg	__u32 crtc_h;
278b8e80941Smrg
279b8e80941Smrg	/* Source values are 16.16 fixed point */
280b8e80941Smrg	__u32 src_x;
281b8e80941Smrg	__u32 src_y;
282b8e80941Smrg	__u32 src_h;
283b8e80941Smrg	__u32 src_w;
284b8e80941Smrg};
285b8e80941Smrg
286b8e80941Smrgstruct drm_mode_get_plane {
287b8e80941Smrg	__u32 plane_id;
288b8e80941Smrg
289b8e80941Smrg	__u32 crtc_id;
290b8e80941Smrg	__u32 fb_id;
291b8e80941Smrg
292b8e80941Smrg	__u32 possible_crtcs;
293b8e80941Smrg	__u32 gamma_size;
294b8e80941Smrg
295b8e80941Smrg	__u32 count_format_types;
296b8e80941Smrg	__u64 format_type_ptr;
297b8e80941Smrg};
298b8e80941Smrg
299b8e80941Smrgstruct drm_mode_get_plane_res {
300b8e80941Smrg	__u64 plane_id_ptr;
301b8e80941Smrg	__u32 count_planes;
302b8e80941Smrg};
303b8e80941Smrg
304b8e80941Smrg#define DRM_MODE_ENCODER_NONE	0
305b8e80941Smrg#define DRM_MODE_ENCODER_DAC	1
306b8e80941Smrg#define DRM_MODE_ENCODER_TMDS	2
307b8e80941Smrg#define DRM_MODE_ENCODER_LVDS	3
308b8e80941Smrg#define DRM_MODE_ENCODER_TVDAC	4
309b8e80941Smrg#define DRM_MODE_ENCODER_VIRTUAL 5
310b8e80941Smrg#define DRM_MODE_ENCODER_DSI	6
311b8e80941Smrg#define DRM_MODE_ENCODER_DPMST	7
312b8e80941Smrg#define DRM_MODE_ENCODER_DPI	8
313b8e80941Smrg
314b8e80941Smrgstruct drm_mode_get_encoder {
315b8e80941Smrg	__u32 encoder_id;
316b8e80941Smrg	__u32 encoder_type;
317b8e80941Smrg
318b8e80941Smrg	__u32 crtc_id; /**< Id of crtc */
319b8e80941Smrg
320b8e80941Smrg	__u32 possible_crtcs;
321b8e80941Smrg	__u32 possible_clones;
322b8e80941Smrg};
323b8e80941Smrg
324b8e80941Smrg/* This is for connectors with multiple signal types. */
325b8e80941Smrg/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
326b8e80941Smrgenum drm_mode_subconnector {
327b8e80941Smrg	DRM_MODE_SUBCONNECTOR_Automatic = 0,
328b8e80941Smrg	DRM_MODE_SUBCONNECTOR_Unknown = 0,
329b8e80941Smrg	DRM_MODE_SUBCONNECTOR_DVID = 3,
330b8e80941Smrg	DRM_MODE_SUBCONNECTOR_DVIA = 4,
331b8e80941Smrg	DRM_MODE_SUBCONNECTOR_Composite = 5,
332b8e80941Smrg	DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
333b8e80941Smrg	DRM_MODE_SUBCONNECTOR_Component = 8,
334b8e80941Smrg	DRM_MODE_SUBCONNECTOR_SCART = 9,
335b8e80941Smrg};
336b8e80941Smrg
337b8e80941Smrg#define DRM_MODE_CONNECTOR_Unknown	0
338b8e80941Smrg#define DRM_MODE_CONNECTOR_VGA		1
339b8e80941Smrg#define DRM_MODE_CONNECTOR_DVII		2
340b8e80941Smrg#define DRM_MODE_CONNECTOR_DVID		3
341b8e80941Smrg#define DRM_MODE_CONNECTOR_DVIA		4
342b8e80941Smrg#define DRM_MODE_CONNECTOR_Composite	5
343b8e80941Smrg#define DRM_MODE_CONNECTOR_SVIDEO	6
344b8e80941Smrg#define DRM_MODE_CONNECTOR_LVDS		7
345b8e80941Smrg#define DRM_MODE_CONNECTOR_Component	8
346b8e80941Smrg#define DRM_MODE_CONNECTOR_9PinDIN	9
347b8e80941Smrg#define DRM_MODE_CONNECTOR_DisplayPort	10
348b8e80941Smrg#define DRM_MODE_CONNECTOR_HDMIA	11
349b8e80941Smrg#define DRM_MODE_CONNECTOR_HDMIB	12
350b8e80941Smrg#define DRM_MODE_CONNECTOR_TV		13
351b8e80941Smrg#define DRM_MODE_CONNECTOR_eDP		14
352b8e80941Smrg#define DRM_MODE_CONNECTOR_VIRTUAL      15
353b8e80941Smrg#define DRM_MODE_CONNECTOR_DSI		16
354b8e80941Smrg#define DRM_MODE_CONNECTOR_DPI		17
355b8e80941Smrg#define DRM_MODE_CONNECTOR_WRITEBACK	18
356b8e80941Smrg
357b8e80941Smrgstruct drm_mode_get_connector {
358b8e80941Smrg
359b8e80941Smrg	__u64 encoders_ptr;
360b8e80941Smrg	__u64 modes_ptr;
361b8e80941Smrg	__u64 props_ptr;
362b8e80941Smrg	__u64 prop_values_ptr;
363b8e80941Smrg
364b8e80941Smrg	__u32 count_modes;
365b8e80941Smrg	__u32 count_props;
366b8e80941Smrg	__u32 count_encoders;
367b8e80941Smrg
368b8e80941Smrg	__u32 encoder_id; /**< Current Encoder */
369b8e80941Smrg	__u32 connector_id; /**< Id */
370b8e80941Smrg	__u32 connector_type;
371b8e80941Smrg	__u32 connector_type_id;
372b8e80941Smrg
373b8e80941Smrg	__u32 connection;
374b8e80941Smrg	__u32 mm_width;  /**< width in millimeters */
375b8e80941Smrg	__u32 mm_height; /**< height in millimeters */
376b8e80941Smrg	__u32 subpixel;
377b8e80941Smrg
378b8e80941Smrg	__u32 pad;
379b8e80941Smrg};
380b8e80941Smrg
381b8e80941Smrg#define DRM_MODE_PROP_PENDING	(1<<0) /* deprecated, do not use */
382b8e80941Smrg#define DRM_MODE_PROP_RANGE	(1<<1)
383b8e80941Smrg#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
384b8e80941Smrg#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
385b8e80941Smrg#define DRM_MODE_PROP_BLOB	(1<<4)
386b8e80941Smrg#define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */
387b8e80941Smrg
388b8e80941Smrg/* non-extended types: legacy bitmask, one bit per type: */
389b8e80941Smrg#define DRM_MODE_PROP_LEGACY_TYPE  ( \
390b8e80941Smrg		DRM_MODE_PROP_RANGE | \
391b8e80941Smrg		DRM_MODE_PROP_ENUM | \
392b8e80941Smrg		DRM_MODE_PROP_BLOB | \
393b8e80941Smrg		DRM_MODE_PROP_BITMASK)
394b8e80941Smrg
395b8e80941Smrg/* extended-types: rather than continue to consume a bit per type,
396b8e80941Smrg * grab a chunk of the bits to use as integer type id.
397b8e80941Smrg */
398b8e80941Smrg#define DRM_MODE_PROP_EXTENDED_TYPE	0x0000ffc0
399b8e80941Smrg#define DRM_MODE_PROP_TYPE(n)		((n) << 6)
400b8e80941Smrg#define DRM_MODE_PROP_OBJECT		DRM_MODE_PROP_TYPE(1)
401b8e80941Smrg#define DRM_MODE_PROP_SIGNED_RANGE	DRM_MODE_PROP_TYPE(2)
402b8e80941Smrg
403b8e80941Smrg/* the PROP_ATOMIC flag is used to hide properties from userspace that
404b8e80941Smrg * is not aware of atomic properties.  This is mostly to work around
405b8e80941Smrg * older userspace (DDX drivers) that read/write each prop they find,
406b8e80941Smrg * witout being aware that this could be triggering a lengthy modeset.
407b8e80941Smrg */
408b8e80941Smrg#define DRM_MODE_PROP_ATOMIC        0x80000000
409b8e80941Smrg
410b8e80941Smrgstruct drm_mode_property_enum {
411b8e80941Smrg	__u64 value;
412b8e80941Smrg	char name[DRM_PROP_NAME_LEN];
413b8e80941Smrg};
414b8e80941Smrg
415b8e80941Smrgstruct drm_mode_get_property {
416b8e80941Smrg	__u64 values_ptr; /* values and blob lengths */
417b8e80941Smrg	__u64 enum_blob_ptr; /* enum and blob id ptrs */
418b8e80941Smrg
419b8e80941Smrg	__u32 prop_id;
420b8e80941Smrg	__u32 flags;
421b8e80941Smrg	char name[DRM_PROP_NAME_LEN];
422b8e80941Smrg
423b8e80941Smrg	__u32 count_values;
424b8e80941Smrg	/* This is only used to count enum values, not blobs. The _blobs is
425b8e80941Smrg	 * simply because of a historical reason, i.e. backwards compat. */
426b8e80941Smrg	__u32 count_enum_blobs;
427b8e80941Smrg};
428b8e80941Smrg
429b8e80941Smrgstruct drm_mode_connector_set_property {
430b8e80941Smrg	__u64 value;
431b8e80941Smrg	__u32 prop_id;
432b8e80941Smrg	__u32 connector_id;
433b8e80941Smrg};
434b8e80941Smrg
435b8e80941Smrg#define DRM_MODE_OBJECT_CRTC 0xcccccccc
436b8e80941Smrg#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
437b8e80941Smrg#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
438b8e80941Smrg#define DRM_MODE_OBJECT_MODE 0xdededede
439b8e80941Smrg#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
440b8e80941Smrg#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
441b8e80941Smrg#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
442b8e80941Smrg#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
443b8e80941Smrg#define DRM_MODE_OBJECT_ANY 0
444b8e80941Smrg
445b8e80941Smrgstruct drm_mode_obj_get_properties {
446b8e80941Smrg	__u64 props_ptr;
447b8e80941Smrg	__u64 prop_values_ptr;
448b8e80941Smrg	__u32 count_props;
449b8e80941Smrg	__u32 obj_id;
450b8e80941Smrg	__u32 obj_type;
451b8e80941Smrg};
452b8e80941Smrg
453b8e80941Smrgstruct drm_mode_obj_set_property {
454b8e80941Smrg	__u64 value;
455b8e80941Smrg	__u32 prop_id;
456b8e80941Smrg	__u32 obj_id;
457b8e80941Smrg	__u32 obj_type;
458b8e80941Smrg};
459b8e80941Smrg
460b8e80941Smrgstruct drm_mode_get_blob {
461b8e80941Smrg	__u32 blob_id;
462b8e80941Smrg	__u32 length;
463b8e80941Smrg	__u64 data;
464b8e80941Smrg};
465b8e80941Smrg
466b8e80941Smrgstruct drm_mode_fb_cmd {
467b8e80941Smrg	__u32 fb_id;
468b8e80941Smrg	__u32 width;
469b8e80941Smrg	__u32 height;
470b8e80941Smrg	__u32 pitch;
471b8e80941Smrg	__u32 bpp;
472b8e80941Smrg	__u32 depth;
473b8e80941Smrg	/* driver specific handle */
474b8e80941Smrg	__u32 handle;
475b8e80941Smrg};
476b8e80941Smrg
477b8e80941Smrg#define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
478b8e80941Smrg#define DRM_MODE_FB_MODIFIERS	(1<<1) /* enables ->modifer[] */
479b8e80941Smrg
480b8e80941Smrgstruct drm_mode_fb_cmd2 {
481b8e80941Smrg	__u32 fb_id;
482b8e80941Smrg	__u32 width;
483b8e80941Smrg	__u32 height;
484b8e80941Smrg	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
485b8e80941Smrg	__u32 flags; /* see above flags */
486b8e80941Smrg
487b8e80941Smrg	/*
488b8e80941Smrg	 * In case of planar formats, this ioctl allows up to 4
489b8e80941Smrg	 * buffer objects with offsets and pitches per plane.
490b8e80941Smrg	 * The pitch and offset order is dictated by the fourcc,
491b8e80941Smrg	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
492b8e80941Smrg	 *
493b8e80941Smrg	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
494b8e80941Smrg	 *   followed by an interleaved U/V plane containing
495b8e80941Smrg	 *   8 bit 2x2 subsampled colour difference samples.
496b8e80941Smrg	 *
497b8e80941Smrg	 * So it would consist of Y as offsets[0] and UV as
498b8e80941Smrg	 * offsets[1].  Note that offsets[0] will generally
499b8e80941Smrg	 * be 0 (but this is not required).
500b8e80941Smrg	 *
501b8e80941Smrg	 * To accommodate tiled, compressed, etc formats, a
502b8e80941Smrg	 * modifier can be specified.  The default value of zero
503b8e80941Smrg	 * indicates "native" format as specified by the fourcc.
504b8e80941Smrg	 * Vendor specific modifier token.  Note that even though
505b8e80941Smrg	 * it looks like we have a modifier per-plane, we in fact
506b8e80941Smrg	 * do not. The modifier for each plane must be identical.
507b8e80941Smrg	 * Thus all combinations of different data layouts for
508b8e80941Smrg	 * multi plane formats must be enumerated as separate
509b8e80941Smrg	 * modifiers.
510b8e80941Smrg	 */
511b8e80941Smrg	__u32 handles[4];
512b8e80941Smrg	__u32 pitches[4]; /* pitch for each plane */
513b8e80941Smrg	__u32 offsets[4]; /* offset of each plane */
514b8e80941Smrg	__u64 modifier[4]; /* ie, tiling, compress */
515b8e80941Smrg};
516b8e80941Smrg
517b8e80941Smrg#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
518b8e80941Smrg#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
519b8e80941Smrg#define DRM_MODE_FB_DIRTY_FLAGS         0x03
520b8e80941Smrg
521b8e80941Smrg#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
522b8e80941Smrg
523b8e80941Smrg/*
524b8e80941Smrg * Mark a region of a framebuffer as dirty.
525b8e80941Smrg *
526b8e80941Smrg * Some hardware does not automatically update display contents
527b8e80941Smrg * as a hardware or software draw to a framebuffer. This ioctl
528b8e80941Smrg * allows userspace to tell the kernel and the hardware what
529b8e80941Smrg * regions of the framebuffer have changed.
530b8e80941Smrg *
531b8e80941Smrg * The kernel or hardware is free to update more then just the
532b8e80941Smrg * region specified by the clip rects. The kernel or hardware
533b8e80941Smrg * may also delay and/or coalesce several calls to dirty into a
534b8e80941Smrg * single update.
535b8e80941Smrg *
536b8e80941Smrg * Userspace may annotate the updates, the annotates are a
537b8e80941Smrg * promise made by the caller that the change is either a copy
538b8e80941Smrg * of pixels or a fill of a single color in the region specified.
539b8e80941Smrg *
540b8e80941Smrg * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
541b8e80941Smrg * the number of updated regions are half of num_clips given,
542b8e80941Smrg * where the clip rects are paired in src and dst. The width and
543b8e80941Smrg * height of each one of the pairs must match.
544b8e80941Smrg *
545b8e80941Smrg * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
546b8e80941Smrg * promises that the region specified of the clip rects is filled
547b8e80941Smrg * completely with a single color as given in the color argument.
548b8e80941Smrg */
549b8e80941Smrg
550b8e80941Smrgstruct drm_mode_fb_dirty_cmd {
551b8e80941Smrg	__u32 fb_id;
552b8e80941Smrg	__u32 flags;
553b8e80941Smrg	__u32 color;
554b8e80941Smrg	__u32 num_clips;
555b8e80941Smrg	__u64 clips_ptr;
556b8e80941Smrg};
557b8e80941Smrg
558b8e80941Smrgstruct drm_mode_mode_cmd {
559b8e80941Smrg	__u32 connector_id;
560b8e80941Smrg	struct drm_mode_modeinfo mode;
561b8e80941Smrg};
562b8e80941Smrg
563b8e80941Smrg#define DRM_MODE_CURSOR_BO	0x01
564b8e80941Smrg#define DRM_MODE_CURSOR_MOVE	0x02
565b8e80941Smrg#define DRM_MODE_CURSOR_FLAGS	0x03
566b8e80941Smrg
567b8e80941Smrg/*
568b8e80941Smrg * depending on the value in flags different members are used.
569b8e80941Smrg *
570b8e80941Smrg * CURSOR_BO uses
571b8e80941Smrg *    crtc_id
572b8e80941Smrg *    width
573b8e80941Smrg *    height
574b8e80941Smrg *    handle - if 0 turns the cursor off
575b8e80941Smrg *
576b8e80941Smrg * CURSOR_MOVE uses
577b8e80941Smrg *    crtc_id
578b8e80941Smrg *    x
579b8e80941Smrg *    y
580b8e80941Smrg */
581b8e80941Smrgstruct drm_mode_cursor {
582b8e80941Smrg	__u32 flags;
583b8e80941Smrg	__u32 crtc_id;
584b8e80941Smrg	__s32 x;
585b8e80941Smrg	__s32 y;
586b8e80941Smrg	__u32 width;
587b8e80941Smrg	__u32 height;
588b8e80941Smrg	/* driver specific handle */
589b8e80941Smrg	__u32 handle;
590b8e80941Smrg};
591b8e80941Smrg
592b8e80941Smrgstruct drm_mode_cursor2 {
593b8e80941Smrg	__u32 flags;
594b8e80941Smrg	__u32 crtc_id;
595b8e80941Smrg	__s32 x;
596b8e80941Smrg	__s32 y;
597b8e80941Smrg	__u32 width;
598b8e80941Smrg	__u32 height;
599b8e80941Smrg	/* driver specific handle */
600b8e80941Smrg	__u32 handle;
601b8e80941Smrg	__s32 hot_x;
602b8e80941Smrg	__s32 hot_y;
603b8e80941Smrg};
604b8e80941Smrg
605b8e80941Smrgstruct drm_mode_crtc_lut {
606b8e80941Smrg	__u32 crtc_id;
607b8e80941Smrg	__u32 gamma_size;
608b8e80941Smrg
609b8e80941Smrg	/* pointers to arrays */
610b8e80941Smrg	__u64 red;
611b8e80941Smrg	__u64 green;
612b8e80941Smrg	__u64 blue;
613b8e80941Smrg};
614b8e80941Smrg
615b8e80941Smrgstruct drm_color_ctm {
616b8e80941Smrg	/*
617b8e80941Smrg	 * Conversion matrix in S31.32 sign-magnitude
618b8e80941Smrg	 * (not two's complement!) format.
619b8e80941Smrg	 */
620b8e80941Smrg	__u64 matrix[9];
621b8e80941Smrg};
622b8e80941Smrg
623b8e80941Smrgstruct drm_color_lut {
624b8e80941Smrg	/*
625b8e80941Smrg	 * Data is U0.16 fixed point format.
626b8e80941Smrg	 */
627b8e80941Smrg	__u16 red;
628b8e80941Smrg	__u16 green;
629b8e80941Smrg	__u16 blue;
630b8e80941Smrg	__u16 reserved;
631b8e80941Smrg};
632b8e80941Smrg
633b8e80941Smrg#define DRM_MODE_PAGE_FLIP_EVENT 0x01
634b8e80941Smrg#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
635b8e80941Smrg#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
636b8e80941Smrg#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
637b8e80941Smrg#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
638b8e80941Smrg				   DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
639b8e80941Smrg#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
640b8e80941Smrg				  DRM_MODE_PAGE_FLIP_ASYNC | \
641b8e80941Smrg				  DRM_MODE_PAGE_FLIP_TARGET)
642b8e80941Smrg
643b8e80941Smrg/*
644b8e80941Smrg * Request a page flip on the specified crtc.
645b8e80941Smrg *
646b8e80941Smrg * This ioctl will ask KMS to schedule a page flip for the specified
647b8e80941Smrg * crtc.  Once any pending rendering targeting the specified fb (as of
648b8e80941Smrg * ioctl time) has completed, the crtc will be reprogrammed to display
649b8e80941Smrg * that fb after the next vertical refresh.  The ioctl returns
650b8e80941Smrg * immediately, but subsequent rendering to the current fb will block
651b8e80941Smrg * in the execbuffer ioctl until the page flip happens.  If a page
652b8e80941Smrg * flip is already pending as the ioctl is called, EBUSY will be
653b8e80941Smrg * returned.
654b8e80941Smrg *
655b8e80941Smrg * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
656b8e80941Smrg * event (see drm.h: struct drm_event_vblank) when the page flip is
657b8e80941Smrg * done.  The user_data field passed in with this ioctl will be
658b8e80941Smrg * returned as the user_data field in the vblank event struct.
659b8e80941Smrg *
660b8e80941Smrg * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
661b8e80941Smrg * 'as soon as possible', meaning that it not delay waiting for vblank.
662b8e80941Smrg * This may cause tearing on the screen.
663b8e80941Smrg *
664b8e80941Smrg * The reserved field must be zero.
665b8e80941Smrg */
666b8e80941Smrg
667b8e80941Smrgstruct drm_mode_crtc_page_flip {
668b8e80941Smrg	__u32 crtc_id;
669b8e80941Smrg	__u32 fb_id;
670b8e80941Smrg	__u32 flags;
671b8e80941Smrg	__u32 reserved;
672b8e80941Smrg	__u64 user_data;
673b8e80941Smrg};
674b8e80941Smrg
675b8e80941Smrg/*
676b8e80941Smrg * Request a page flip on the specified crtc.
677b8e80941Smrg *
678b8e80941Smrg * Same as struct drm_mode_crtc_page_flip, but supports new flags and
679b8e80941Smrg * re-purposes the reserved field:
680b8e80941Smrg *
681b8e80941Smrg * The sequence field must be zero unless either of the
682b8e80941Smrg * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When
683b8e80941Smrg * the ABSOLUTE flag is specified, the sequence field denotes the absolute
684b8e80941Smrg * vblank sequence when the flip should take effect. When the RELATIVE
685b8e80941Smrg * flag is specified, the sequence field denotes the relative (to the
686b8e80941Smrg * current one when the ioctl is called) vblank sequence when the flip
687b8e80941Smrg * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to
688b8e80941Smrg * make sure the vblank sequence before the target one has passed before
689b8e80941Smrg * calling this ioctl. The purpose of the
690b8e80941Smrg * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify
691b8e80941Smrg * the target for when code dealing with a page flip runs during a
692b8e80941Smrg * vertical blank period.
693b8e80941Smrg */
694b8e80941Smrg
695b8e80941Smrgstruct drm_mode_crtc_page_flip_target {
696b8e80941Smrg	__u32 crtc_id;
697b8e80941Smrg	__u32 fb_id;
698b8e80941Smrg	__u32 flags;
699b8e80941Smrg	__u32 sequence;
700b8e80941Smrg	__u64 user_data;
701b8e80941Smrg};
702b8e80941Smrg
703b8e80941Smrg/* create a dumb scanout buffer */
704b8e80941Smrgstruct drm_mode_create_dumb {
705b8e80941Smrg	__u32 height;
706b8e80941Smrg	__u32 width;
707b8e80941Smrg	__u32 bpp;
708b8e80941Smrg	__u32 flags;
709b8e80941Smrg	/* handle, pitch, size will be returned */
710b8e80941Smrg	__u32 handle;
711b8e80941Smrg	__u32 pitch;
712b8e80941Smrg	__u64 size;
713b8e80941Smrg};
714b8e80941Smrg
715b8e80941Smrg/* set up for mmap of a dumb scanout buffer */
716b8e80941Smrgstruct drm_mode_map_dumb {
717b8e80941Smrg	/** Handle for the object being mapped. */
718b8e80941Smrg	__u32 handle;
719b8e80941Smrg	__u32 pad;
720b8e80941Smrg	/**
721b8e80941Smrg	 * Fake offset to use for subsequent mmap call
722b8e80941Smrg	 *
723b8e80941Smrg	 * This is a fixed-size type for 32/64 compatibility.
724b8e80941Smrg	 */
725b8e80941Smrg	__u64 offset;
726b8e80941Smrg};
727b8e80941Smrg
728b8e80941Smrgstruct drm_mode_destroy_dumb {
729b8e80941Smrg	__u32 handle;
730b8e80941Smrg};
731b8e80941Smrg
732b8e80941Smrg/* page-flip flags are valid, plus: */
733b8e80941Smrg#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
734b8e80941Smrg#define DRM_MODE_ATOMIC_NONBLOCK  0x0200
735b8e80941Smrg#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
736b8e80941Smrg
737b8e80941Smrg#define DRM_MODE_ATOMIC_FLAGS (\
738b8e80941Smrg		DRM_MODE_PAGE_FLIP_EVENT |\
739b8e80941Smrg		DRM_MODE_PAGE_FLIP_ASYNC |\
740b8e80941Smrg		DRM_MODE_ATOMIC_TEST_ONLY |\
741b8e80941Smrg		DRM_MODE_ATOMIC_NONBLOCK |\
742b8e80941Smrg		DRM_MODE_ATOMIC_ALLOW_MODESET)
743b8e80941Smrg
744b8e80941Smrgstruct drm_mode_atomic {
745b8e80941Smrg	__u32 flags;
746b8e80941Smrg	__u32 count_objs;
747b8e80941Smrg	__u64 objs_ptr;
748b8e80941Smrg	__u64 count_props_ptr;
749b8e80941Smrg	__u64 props_ptr;
750b8e80941Smrg	__u64 prop_values_ptr;
751b8e80941Smrg	__u64 reserved;
752b8e80941Smrg	__u64 user_data;
753b8e80941Smrg};
754b8e80941Smrg
755b8e80941Smrgstruct drm_format_modifier_blob {
756b8e80941Smrg#define FORMAT_BLOB_CURRENT 1
757b8e80941Smrg	/* Version of this blob format */
758b8e80941Smrg	__u32 version;
759b8e80941Smrg
760b8e80941Smrg	/* Flags */
761b8e80941Smrg	__u32 flags;
762b8e80941Smrg
763b8e80941Smrg	/* Number of fourcc formats supported */
764b8e80941Smrg	__u32 count_formats;
765b8e80941Smrg
766b8e80941Smrg	/* Where in this blob the formats exist (in bytes) */
767b8e80941Smrg	__u32 formats_offset;
768b8e80941Smrg
769b8e80941Smrg	/* Number of drm_format_modifiers */
770b8e80941Smrg	__u32 count_modifiers;
771b8e80941Smrg
772b8e80941Smrg	/* Where in this blob the modifiers exist (in bytes) */
773b8e80941Smrg	__u32 modifiers_offset;
774b8e80941Smrg
775b8e80941Smrg	/* __u32 formats[] */
776b8e80941Smrg	/* struct drm_format_modifier modifiers[] */
777b8e80941Smrg};
778b8e80941Smrg
779b8e80941Smrgstruct drm_format_modifier {
780b8e80941Smrg	/* Bitmask of formats in get_plane format list this info applies to. The
781b8e80941Smrg	 * offset allows a sliding window of which 64 formats (bits).
782b8e80941Smrg	 *
783b8e80941Smrg	 * Some examples:
784b8e80941Smrg	 * In today's world with < 65 formats, and formats 0, and 2 are
785b8e80941Smrg	 * supported
786b8e80941Smrg	 * 0x0000000000000005
787b8e80941Smrg	 *		  ^-offset = 0, formats = 5
788b8e80941Smrg	 *
789b8e80941Smrg	 * If the number formats grew to 128, and formats 98-102 are
790b8e80941Smrg	 * supported with the modifier:
791b8e80941Smrg	 *
792b8e80941Smrg	 * 0x0000007c00000000 0000000000000000
793b8e80941Smrg	 *		  ^
794b8e80941Smrg	 *		  |__offset = 64, formats = 0x7c00000000
795b8e80941Smrg	 *
796b8e80941Smrg	 */
797b8e80941Smrg	__u64 formats;
798b8e80941Smrg	__u32 offset;
799b8e80941Smrg	__u32 pad;
800b8e80941Smrg
801b8e80941Smrg	/* The modifier that applies to the >get_plane format list bitmask. */
802b8e80941Smrg	__u64 modifier;
803b8e80941Smrg};
804b8e80941Smrg
805b8e80941Smrg/**
806b8e80941Smrg * Create a new 'blob' data property, copying length bytes from data pointer,
807b8e80941Smrg * and returning new blob ID.
808b8e80941Smrg */
809b8e80941Smrgstruct drm_mode_create_blob {
810b8e80941Smrg	/** Pointer to data to copy. */
811b8e80941Smrg	__u64 data;
812b8e80941Smrg	/** Length of data to copy. */
813b8e80941Smrg	__u32 length;
814b8e80941Smrg	/** Return: new property ID. */
815b8e80941Smrg	__u32 blob_id;
816b8e80941Smrg};
817b8e80941Smrg
818b8e80941Smrg/**
819b8e80941Smrg * Destroy a user-created blob property.
820b8e80941Smrg */
821b8e80941Smrgstruct drm_mode_destroy_blob {
822b8e80941Smrg	__u32 blob_id;
823b8e80941Smrg};
824b8e80941Smrg
825b8e80941Smrg/**
826b8e80941Smrg * Lease mode resources, creating another drm_master.
827b8e80941Smrg */
828b8e80941Smrgstruct drm_mode_create_lease {
829b8e80941Smrg	/** Pointer to array of object ids (__u32) */
830b8e80941Smrg	__u64 object_ids;
831b8e80941Smrg	/** Number of object ids */
832b8e80941Smrg	__u32 object_count;
833b8e80941Smrg	/** flags for new FD (O_CLOEXEC, etc) */
834b8e80941Smrg	__u32 flags;
835b8e80941Smrg
836b8e80941Smrg	/** Return: unique identifier for lessee. */
837b8e80941Smrg	__u32 lessee_id;
838b8e80941Smrg	/** Return: file descriptor to new drm_master file */
839b8e80941Smrg	__u32 fd;
840b8e80941Smrg};
841b8e80941Smrg
842b8e80941Smrg/**
843b8e80941Smrg * List lesses from a drm_master
844b8e80941Smrg */
845b8e80941Smrgstruct drm_mode_list_lessees {
846b8e80941Smrg	/** Number of lessees.
847b8e80941Smrg	 * On input, provides length of the array.
848b8e80941Smrg	 * On output, provides total number. No
849b8e80941Smrg	 * more than the input number will be written
850b8e80941Smrg	 * back, so two calls can be used to get
851b8e80941Smrg	 * the size and then the data.
852b8e80941Smrg	 */
853b8e80941Smrg	__u32 count_lessees;
854b8e80941Smrg	__u32 pad;
855b8e80941Smrg
856b8e80941Smrg	/** Pointer to lessees.
857b8e80941Smrg	 * pointer to __u64 array of lessee ids
858b8e80941Smrg	 */
859b8e80941Smrg	__u64 lessees_ptr;
860b8e80941Smrg};
861b8e80941Smrg
862b8e80941Smrg/**
863b8e80941Smrg * Get leased objects
864b8e80941Smrg */
865b8e80941Smrgstruct drm_mode_get_lease {
866b8e80941Smrg	/** Number of leased objects.
867b8e80941Smrg	 * On input, provides length of the array.
868b8e80941Smrg	 * On output, provides total number. No
869b8e80941Smrg	 * more than the input number will be written
870b8e80941Smrg	 * back, so two calls can be used to get
871b8e80941Smrg	 * the size and then the data.
872b8e80941Smrg	 */
873b8e80941Smrg	__u32 count_objects;
874b8e80941Smrg	__u32 pad;
875b8e80941Smrg
876b8e80941Smrg	/** Pointer to objects.
877b8e80941Smrg	 * pointer to __u32 array of object ids
878b8e80941Smrg	 */
879b8e80941Smrg	__u64 objects_ptr;
880b8e80941Smrg};
881b8e80941Smrg
882b8e80941Smrg/**
883b8e80941Smrg * Revoke lease
884b8e80941Smrg */
885b8e80941Smrgstruct drm_mode_revoke_lease {
886b8e80941Smrg	/** Unique ID of lessee
887b8e80941Smrg	 */
888b8e80941Smrg	__u32 lessee_id;
889b8e80941Smrg};
890b8e80941Smrg
891b8e80941Smrg/**
892b8e80941Smrg * struct drm_mode_rect - Two dimensional rectangle.
893b8e80941Smrg * @x1: Horizontal starting coordinate (inclusive).
894b8e80941Smrg * @y1: Vertical starting coordinate (inclusive).
895b8e80941Smrg * @x2: Horizontal ending coordinate (exclusive).
896b8e80941Smrg * @y2: Vertical ending coordinate (exclusive).
897b8e80941Smrg *
898b8e80941Smrg * With drm subsystem using struct drm_rect to manage rectangular area this
899b8e80941Smrg * export it to user-space.
900b8e80941Smrg *
901b8e80941Smrg * Currently used by drm_mode_atomic blob property FB_DAMAGE_CLIPS.
902b8e80941Smrg */
903b8e80941Smrgstruct drm_mode_rect {
904b8e80941Smrg	__s32 x1;
905b8e80941Smrg	__s32 y1;
906b8e80941Smrg	__s32 x2;
907b8e80941Smrg	__s32 y2;
908b8e80941Smrg};
909b8e80941Smrg
910b8e80941Smrg#if defined(__cplusplus)
911b8e80941Smrg}
912b8e80941Smrg#endif
913b8e80941Smrg
914b8e80941Smrg#endif
915