addrinterface.h revision d4248a18
11.1037Sxtraeme/*
21.657Slukem * Copyright © 2007-2018 Advanced Micro Devices, Inc.
31.653Slukem * All Rights Reserved.
41.653Slukem *
51.653Slukem * Permission is hereby granted, free of charge, to any person obtaining
61.653Slukem * a copy of this software and associated documentation files (the
71.653Slukem * "Software"), to deal in the Software without restriction, including
81.653Slukem * without limitation the rights to use, copy, modify, merge, publish,
91.891Sriz * distribute, sub license, and/or sell copies of the Software, and to
101.653Slukem * permit persons to whom the Software is furnished to do so, subject to
111.653Slukem * the following conditions:
121.653Slukem *
131.653Slukem * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
141.653Slukem * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
151.650Slukem * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
161.985Swiz * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
171.909Slukem * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
181.891Sriz * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
191.665Sscw * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
201.665Sscw * USE OR OTHER DEALINGS IN THE SOFTWARE.
211.653Slukem *
221.653Slukem * The above copyright notice and this permission notice (including the
231.701Sitojun * next paragraph) shall be included in all copies or substantial portions
241.985Swiz * of the Software.
251.852Swiz */
261.852Swiz
271.670Smrg/**
281.653Slukem****************************************************************************************************
291.653Slukem* @file  addrinterface.h
301.653Slukem* @brief Contains the addrlib interfaces declaration and parameter defines
311.650Slukem****************************************************************************************************
321.867Schristos*/
331.653Slukem#ifndef __ADDR_INTERFACE_H__
341.653Slukem#define __ADDR_INTERFACE_H__
351.665Sscw
361.650Slukem#include "addrtypes.h"
371.653Slukem
381.950Schristos#if defined(__cplusplus)
391.651Slukemextern "C"
401.651Slukem{
411.651Slukem#endif
421.651Slukem
431.650Slukem#define ADDRLIB_VERSION_MAJOR 6
441.651Slukem#define ADDRLIB_VERSION_MINOR 2
451.651Slukem#define ADDRLIB_VERSION ((ADDRLIB_VERSION_MAJOR << 16) | ADDRLIB_VERSION_MINOR)
461.651Slukem
471.651Slukem/// Virtually all interface functions need ADDR_HANDLE as first parameter
481.651Slukem#ifndef ADDR_HANDLE_TYPEDEF
491.1035Sjmmv#define ADDR_HANDLE_TYPEDEF
501.1035Sjmmvtypedef VOID*   ADDR_HANDLE;
511.1035Sjmmv#endif
521.1035Sjmmv
531.1035Sjmmv/// Client handle used in callbacks
541.1035Sjmmvtypedef VOID*   ADDR_CLIENT_HANDLE;
551.1036Sjmmv
561.1035Sjmmv/**
571.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
581.651Slukem* //                                  Callback functions
591.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
601.651Slukem*    typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
611.651Slukem*         const ADDR_ALLOCSYSMEM_INPUT* pInput);
621.1014Sadrianp*    typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
631.651Slukem*         VOID* pVirtAddr);
641.651Slukem*    typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
651.651Slukem*         const ADDR_DEBUGPRINT_INPUT* pInput);
661.651Slukem*
671.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
681.651Slukem* //                               Create/Destroy/Config functions
691.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
701.651Slukem*     AddrCreate()
711.651Slukem*     AddrDestroy()
721.898Sgdamore*
731.1033Splunky* /////////////////////////////////////////////////////////////////////////////////////////////////
741.898Sgdamore* //                                  Surface functions
751.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
761.651Slukem*     AddrComputeSurfaceInfo()
771.651Slukem*     AddrComputeSurfaceAddrFromCoord()
781.651Slukem*     AddrComputeSurfaceCoordFromAddr()
791.651Slukem*
801.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
811.651Slukem* //                                   HTile functions
821.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
831.651Slukem*     AddrComputeHtileInfo()
841.651Slukem*     AddrComputeHtileAddrFromCoord()
851.651Slukem*     AddrComputeHtileCoordFromAddr()
861.651Slukem*
871.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
881.651Slukem* //                                   C-mask functions
891.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
901.651Slukem*     AddrComputeCmaskInfo()
911.651Slukem*     AddrComputeCmaskAddrFromCoord()
921.651Slukem*     AddrComputeCmaskCoordFromAddr()
931.651Slukem*
941.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
951.651Slukem* //                                   F-mask functions
961.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
971.651Slukem*     AddrComputeFmaskInfo()
981.651Slukem*     AddrComputeFmaskAddrFromCoord()
991.651Slukem*     AddrComputeFmaskCoordFromAddr()
1001.651Slukem*
1011.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
1021.651Slukem* //                               Element/Utility functions
1031.651Slukem* /////////////////////////////////////////////////////////////////////////////////////////////////
1041.651Slukem*     ElemFlt32ToDepthPixel()
1051.651Slukem*     ElemFlt32ToColorPixel()
1061.891Sriz*     AddrExtractBankPipeSwizzle()
1071.651Slukem*     AddrCombineBankPipeSwizzle()
1081.651Slukem*     AddrComputeSliceSwizzle()
1091.933Schristos*     AddrConvertTileInfoToHW()
1101.651Slukem*     AddrConvertTileIndex()
1111.894Sdan*     AddrConvertTileIndex1()
1121.651Slukem*     AddrGetTileIndex()
1131.651Slukem*     AddrComputeBaseSwizzle()
1141.651Slukem*     AddrUseTileIndex()
1151.651Slukem*     AddrUseCombinedSwizzle()
1161.651Slukem*
1171.651Slukem**/
1181.799Sperry
1191.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
1201.651Slukem//                                      Callback functions
1211.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
1221.651Slukem
1231.651Slukem/**
1241.651Slukem****************************************************************************************************
1251.733Swiz* @brief channel setting structure
1261.733Swiz****************************************************************************************************
1271.651Slukem*/
1281.1014Sadrianptypedef union _ADDR_CHANNEL_SETTING
1291.651Slukem{
1301.651Slukem    struct
1311.651Slukem    {
1321.651Slukem        UINT_8 valid   : 1;    ///< Indicate whehter this channel setting is valid
1331.651Slukem        UINT_8 channel : 2;    ///< 0 for x channel, 1 for y channel, 2 for z channel
1341.651Slukem        UINT_8 index   : 5;    ///< Channel index
1351.651Slukem    };
1361.651Slukem    UINT_8 value;              ///< Value
1371.651Slukem} ADDR_CHANNEL_SETTING;
1381.651Slukem
1391.651Slukem/**
1401.651Slukem****************************************************************************************************
1411.651Slukem* @brief address equation key structure
1421.651Slukem****************************************************************************************************
1431.651Slukem*/
1441.651Slukemtypedef union _ADDR_EQUATION_KEY
1451.651Slukem{
1461.651Slukem    struct
1471.651Slukem    {
1481.651Slukem        UINT_32 log2ElementBytes : 3; ///< Log2 of Bytes per pixel
1491.651Slukem        UINT_32 tileMode         : 5; ///< Tile mode
1501.651Slukem        UINT_32 microTileType    : 3; ///< Micro tile type
1511.651Slukem        UINT_32 pipeConfig       : 5; ///< pipe config
1521.651Slukem        UINT_32 numBanksLog2     : 3; ///< Number of banks log2
1531.651Slukem        UINT_32 bankWidth        : 4; ///< Bank width
1541.650Slukem        UINT_32 bankHeight       : 4; ///< Bank height
1551.891Sriz        UINT_32 macroAspectRatio : 3; ///< Macro tile aspect ratio
1561.651Slukem        UINT_32 prt              : 1; ///< SI only, indicate whether this equation is for prt
1571.651Slukem        UINT_32 reserved         : 1; ///< Reserved bit
1581.734Slukem    } fields;
1591.742Sthorpej    UINT_32 value;
1601.802Swiz} ADDR_EQUATION_KEY;
1611.786Schristos
1621.985Swiz/**
1631.651Slukem****************************************************************************************************
1641.817Srpaulo* @brief address equation structure
1651.651Slukem****************************************************************************************************
1661.651Slukem*/
1671.651Slukem#define ADDR_MAX_EQUATION_BIT 20u
1681.651Slukem
1691.651Slukem// Invalid equation index
1701.651Slukem#define ADDR_INVALID_EQUATION_INDEX 0xFFFFFFFF
1711.651Slukem
1721.651Slukemtypedef struct _ADDR_EQUATION
1731.651Slukem{
1741.651Slukem    ADDR_CHANNEL_SETTING addr[ADDR_MAX_EQUATION_BIT];  ///< addr setting
1751.651Slukem                                                       ///< each bit is result of addr ^ xor ^ xor2
1761.817Srpaulo    ADDR_CHANNEL_SETTING xor1[ADDR_MAX_EQUATION_BIT];  ///< xor setting
1771.650Slukem    ADDR_CHANNEL_SETTING xor2[ADDR_MAX_EQUATION_BIT];  ///< xor2 setting
1781.650Slukem    UINT_32              numBits;                      ///< The number of bits in equation
1791.650Slukem    BOOL_32              stackedDepthSlices;           ///< TRUE if depth slices are treated as being
1801.650Slukem                                                       ///< stacked vertically prior to swizzling
1811.650Slukem} ADDR_EQUATION;
1821.650Slukem
1831.650Slukem/**
1841.650Slukem****************************************************************************************************
1851.650Slukem* @brief Alloc system memory flags.
1861.650Slukem* @note These flags are reserved for future use and if flags are added will minimize the impact
1871.651Slukem*       of the client.
1881.651Slukem****************************************************************************************************
1891.651Slukem*/
1901.651Slukemtypedef union _ADDR_ALLOCSYSMEM_FLAGS
1911.651Slukem{
1921.713Swiz    struct
1931.651Slukem    {
1941.651Slukem        UINT_32 reserved    : 32;  ///< Reserved for future use.
1951.651Slukem    } fields;
1961.651Slukem    UINT_32 value;
1971.651Slukem
1981.651Slukem} ADDR_ALLOCSYSMEM_FLAGS;
1991.763Speter
2001.763Speter/**
2011.763Speter****************************************************************************************************
2021.763Speter* @brief Alloc system memory input structure
2031.651Slukem****************************************************************************************************
2041.651Slukem*/
2051.651Slukemtypedef struct _ADDR_ALLOCSYSMEM_INPUT
2061.651Slukem{
2071.651Slukem    UINT_32                 size;           ///< Size of this structure in bytes
2081.650Slukem
2091.705Sbsh    ADDR_ALLOCSYSMEM_FLAGS  flags;          ///< System memory flags.
2101.651Slukem    UINT_32                 sizeInBytes;    ///< System memory allocation size in bytes.
2111.651Slukem    ADDR_CLIENT_HANDLE      hClient;        ///< Client handle
2121.651Slukem} ADDR_ALLOCSYSMEM_INPUT;
2131.787Slukem
2141.651Slukem/**
2151.651Slukem****************************************************************************************************
2161.651Slukem* ADDR_ALLOCSYSMEM
2171.651Slukem*   @brief
2181.651Slukem*       Allocate system memory callback function. Returns valid pointer on success.
2191.651Slukem****************************************************************************************************
2201.651Slukem*/
2211.651Slukemtypedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
2221.651Slukem    const ADDR_ALLOCSYSMEM_INPUT* pInput);
2231.651Slukem
2241.651Slukem/**
2251.651Slukem****************************************************************************************************
2261.651Slukem* @brief Free system memory input structure
2271.651Slukem****************************************************************************************************
2281.651Slukem*/
2291.651Slukemtypedef struct _ADDR_FREESYSMEM_INPUT
2301.651Slukem{
2311.651Slukem    UINT_32                 size;           ///< Size of this structure in bytes
2321.651Slukem
2331.651Slukem    VOID*                   pVirtAddr;      ///< Virtual address
2341.651Slukem    ADDR_CLIENT_HANDLE      hClient;        ///< Client handle
2351.651Slukem} ADDR_FREESYSMEM_INPUT;
2361.651Slukem
2371.651Slukem/**
2381.651Slukem****************************************************************************************************
2391.651Slukem* ADDR_FREESYSMEM
2401.651Slukem*   @brief
2411.651Slukem*       Free system memory callback function.
2421.802Swiz*       Returns ADDR_OK on success.
2431.742Sthorpej****************************************************************************************************
2441.651Slukem*/
2451.651Slukemtypedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
2461.651Slukem    const ADDR_FREESYSMEM_INPUT* pInput);
2471.896Stron
2481.651Slukem/**
2491.651Slukem****************************************************************************************************
2501.651Slukem* @brief Print debug message input structure
2511.651Slukem****************************************************************************************************
2521.651Slukem*/
2531.651Slukemtypedef struct _ADDR_DEBUGPRINT_INPUT
2541.651Slukem{
2551.651Slukem    UINT_32             size;           ///< Size of this structure in bytes
2561.651Slukem
2571.651Slukem    CHAR*               pDebugString;   ///< Debug print string
2581.651Slukem    va_list             ap;             ///< Variable argument list
2591.651Slukem    ADDR_CLIENT_HANDLE  hClient;        ///< Client handle
2601.651Slukem} ADDR_DEBUGPRINT_INPUT;
2611.651Slukem
2621.763Speter/**
2631.651Slukem****************************************************************************************************
2641.651Slukem* ADDR_DEBUGPRINT
2651.650Slukem*   @brief
2661.651Slukem*       Print debug message callback function.
2671.651Slukem*       Returns ADDR_OK on success.
2681.651Slukem****************************************************************************************************
2691.651Slukem*/
2701.651Slukemtypedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
2711.651Slukem    const ADDR_DEBUGPRINT_INPUT* pInput);
2721.786Schristos
2731.786Schristos/**
2741.786Schristos****************************************************************************************************
2751.786Schristos* ADDR_CALLBACKS
2761.786Schristos*
2771.786Schristos*   @brief
2781.786Schristos*       Address Library needs client to provide system memory alloc/free routines.
2791.786Schristos****************************************************************************************************
2801.786Schristos*/
2811.786Schristostypedef struct _ADDR_CALLBACKS
2821.651Slukem{
2831.786Schristos    ADDR_ALLOCSYSMEM allocSysMem;   ///< Routine to allocate system memory
2841.786Schristos    ADDR_FREESYSMEM  freeSysMem;    ///< Routine to free system memory
2851.651Slukem    ADDR_DEBUGPRINT  debugPrint;    ///< Routine to print debug message
2861.651Slukem} ADDR_CALLBACKS;
2871.651Slukem
2881.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
2891.896Stron//                               Create/Destroy functions
2901.1009Sginsbach////////////////////////////////////////////////////////////////////////////////////////////////////
2911.651Slukem
2921.651Slukem/**
2931.651Slukem****************************************************************************************************
2941.651Slukem* ADDR_CREATE_FLAGS
2951.651Slukem*
2961.651Slukem*   @brief
2971.651Slukem*       This structure is used to pass some setup in creation of AddrLib
2981.651Slukem*   @note
2991.651Slukem****************************************************************************************************
3001.651Slukem*/
3011.651Slukemtypedef union _ADDR_CREATE_FLAGS
3021.651Slukem{
3031.651Slukem    struct
3041.651Slukem    {
3051.651Slukem        UINT_32 noCubeMipSlicesPad     : 1;    ///< Turn cubemap faces padding off
3061.651Slukem        UINT_32 fillSizeFields         : 1;    ///< If clients fill size fields in all input and
3071.651Slukem                                               ///  output structure
3081.839Schristos        UINT_32 useTileIndex           : 1;    ///< Make tileIndex field in input valid
3091.839Schristos        UINT_32 useCombinedSwizzle     : 1;    ///< Use combined tile swizzle
3101.651Slukem        UINT_32 checkLast2DLevel       : 1;    ///< Check the last 2D mip sub level
3111.782Swiz        UINT_32 useHtileSliceAlign     : 1;    ///< Do htile single slice alignment
3121.651Slukem        UINT_32 allowLargeThickTile    : 1;    ///< Allow 64*thickness*bytesPerPixel > rowSize
3131.651Slukem        UINT_32 reserved               : 25;   ///< Reserved bits for future use
3141.651Slukem    };
3151.651Slukem
3161.651Slukem    UINT_32 value;
3171.651Slukem} ADDR_CREATE_FLAGS;
3181.651Slukem
3191.651Slukem/**
3201.651Slukem****************************************************************************************************
3211.651Slukem*   ADDR_REGISTER_VALUE
3221.651Slukem*
3231.651Slukem*   @brief
3241.651Slukem*       Data from registers to setup AddrLib global data, used in AddrCreate
3251.668Sgroo****************************************************************************************************
3261.651Slukem*/
3271.651Slukemtypedef struct _ADDR_REGISTER_VALUE
3281.651Slukem{
3291.651Slukem    UINT_32  gbAddrConfig;       ///< For R8xx, use GB_ADDR_CONFIG register value.
3301.651Slukem                                 ///  For R6xx/R7xx, use GB_TILING_CONFIG.
3311.651Slukem                                 ///  But they can be treated as the same.
3321.651Slukem                                 ///  if this value is 0, use chip to set default value
3331.839Schristos    UINT_32  backendDisables;    ///< 1 bit per backend, starting with LSB. 1=disabled,0=enabled.
3341.651Slukem                                 ///  Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE
3351.651Slukem
3361.651Slukem                                 ///  R800 registers-----------------------------------------------
3371.651Slukem    UINT_32  noOfBanks;          ///< Number of h/w ram banks - For r800: MC_ARB_RAMCFG.NOOFBANK
3381.651Slukem                                 ///  No enums for this value in h/w header files
3391.651Slukem                                 ///  0: 4
3401.651Slukem                                 ///  1: 8
3411.651Slukem                                 ///  2: 16
3421.971Selad    UINT_32  noOfRanks;          ///  MC_ARB_RAMCFG.NOOFRANK
3431.651Slukem                                 ///  0: 1
3441.650Slukem                                 ///  1: 2
3451.651Slukem                                 ///  SI (R1000) registers-----------------------------------------
3461.651Slukem    const UINT_32* pTileConfig;  ///< Global tile setting tables
3471.651Slukem    UINT_32  noOfEntries;        ///< Number of entries in pTileConfig
3481.651Slukem
3491.651Slukem                                 ///< CI registers-------------------------------------------------
3501.651Slukem    const UINT_32* pMacroTileConfig;    ///< Global macro tile mode table
3511.651Slukem    UINT_32  noOfMacroEntries;   ///< Number of entries in pMacroTileConfig
3521.651Slukem
3531.651Slukem                                 ///< GFX9 HW parameters
3541.651Slukem    UINT_32  blockVarSizeLog2;   ///< SW_VAR_* block size
3551.651Slukem} ADDR_REGISTER_VALUE;
3561.651Slukem
3571.651Slukem/**
3581.651Slukem****************************************************************************************************
3591.651Slukem* ADDR_CREATE_INPUT
3601.651Slukem*
3611.651Slukem*   @brief
3621.651Slukem*       Parameters use to create an AddrLib Object. Caller must provide all fields.
3631.651Slukem*
3641.651Slukem****************************************************************************************************
3651.651Slukem*/
3661.651Slukemtypedef struct _ADDR_CREATE_INPUT
3671.651Slukem{
3681.651Slukem    UINT_32             size;                ///< Size of this structure in bytes
3691.651Slukem
3701.651Slukem    UINT_32             chipEngine;          ///< Chip Engine
3711.650Slukem    UINT_32             chipFamily;          ///< Chip Family
3721.651Slukem    UINT_32             chipRevision;        ///< Chip Revision
3731.651Slukem    ADDR_CALLBACKS      callbacks;           ///< Callbacks for sysmem alloc/free/print
3741.651Slukem    ADDR_CREATE_FLAGS   createFlags;         ///< Flags to setup AddrLib
3751.902Swiz    ADDR_REGISTER_VALUE regValue;            ///< Data from registers to setup AddrLib global data
3761.902Swiz    ADDR_CLIENT_HANDLE  hClient;             ///< Client handle
3771.651Slukem    UINT_32             minPitchAlignPixels; ///< Minimum pitch alignment in pixels
3781.651Slukem} ADDR_CREATE_INPUT;
3791.651Slukem
3801.651Slukem/**
3811.650Slukem****************************************************************************************************
3821.651Slukem* ADDR_CREATEINFO_OUTPUT
3831.651Slukem*
3841.651Slukem*   @brief
3851.651Slukem*       Return AddrLib handle to client driver
3861.651Slukem*
3871.651Slukem****************************************************************************************************
3881.651Slukem*/
3891.651Slukemtypedef struct _ADDR_CREATE_OUTPUT
3901.651Slukem{
3911.651Slukem    UINT_32              size;            ///< Size of this structure in bytes
3921.651Slukem
3931.651Slukem    ADDR_HANDLE          hLib;            ///< Address lib handle
3941.651Slukem
3951.651Slukem    UINT_32              numEquations;    ///< Number of equations in the table
3961.898Sgdamore    const ADDR_EQUATION* pEquationTable;  ///< Pointer to the equation table
3971.651Slukem} ADDR_CREATE_OUTPUT;
3981.651Slukem
3991.651Slukem/**
4001.651Slukem****************************************************************************************************
4011.651Slukem*   AddrCreate
4021.742Sthorpej*
4031.650Slukem*   @brief
4041.651Slukem*       Create AddrLib object, must be called before any interface calls
4051.651Slukem*
4061.651Slukem*   @return
4071.651Slukem*       ADDR_OK if successful
4081.651Slukem****************************************************************************************************
4091.651Slukem*/
4101.651SlukemADDR_E_RETURNCODE ADDR_API AddrCreate(
4111.651Slukem    const ADDR_CREATE_INPUT*    pAddrCreateIn,
4121.651Slukem    ADDR_CREATE_OUTPUT*         pAddrCreateOut);
4131.651Slukem
4141.651Slukem/**
4151.651Slukem****************************************************************************************************
4161.898Sgdamore*   AddrDestroy
4171.651Slukem*
4181.651Slukem*   @brief
4191.896Stron*       Destroy AddrLib object, must be called to free internally allocated resources.
4201.802Swiz*
4211.742Sthorpej*   @return
4221.651Slukem*      ADDR_OK if successful
4231.651Slukem****************************************************************************************************
4241.651Slukem*/
4251.651SlukemADDR_E_RETURNCODE ADDR_API AddrDestroy(
4261.651Slukem    ADDR_HANDLE hLib);
4271.651Slukem
4281.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
4291.651Slukem//                                    Surface functions
4301.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
4311.651Slukem
4321.651Slukem/**
4331.651Slukem****************************************************************************************************
4341.651Slukem* @brief
4351.767Satatat*       Bank/tiling parameters. On function input, these can be set as desired or
4361.651Slukem*       left 0 for AddrLib to calculate/default. On function output, these are the actual
4371.651Slukem*       parameters used.
4381.799Sperry* @note
4391.651Slukem*       Valid bankWidth/bankHeight value:
4401.970Ssborrill*       1,2,4,8. They are factors instead of pixels or bytes.
4411.651Slukem*
4421.651Slukem*       The bank number remains constant across each row of the
4431.651Slukem*       macro tile as each pipe is selected, so the number of
4441.651Slukem*       tiles in the x direction with the same bank number will
4451.651Slukem*       be bank_width * num_pipes.
4461.651Slukem****************************************************************************************************
4471.651Slukem*/
4481.651Slukemtypedef struct _ADDR_TILEINFO
4491.651Slukem{
4501.651Slukem    ///  Any of these parameters can be set to 0 to use the HW default.
4511.651Slukem    UINT_32     banks;              ///< Number of banks, numerical value
4521.651Slukem    UINT_32     bankWidth;          ///< Number of tiles in the X direction in the same bank
4531.651Slukem    UINT_32     bankHeight;         ///< Number of tiles in the Y direction in the same bank
4541.651Slukem    UINT_32     macroAspectRatio;   ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1
4551.651Slukem    UINT_32     tileSplitBytes;     ///< Tile split size, in bytes
4561.651Slukem    AddrPipeCfg pipeConfig;         ///< Pipe Config = HW enum + 1
4571.651Slukem} ADDR_TILEINFO;
4581.651Slukem
4591.651Slukem// Create a define to avoid client change. The removal of R800 is because we plan to implement SI
4601.651Slukem// within 800 HWL - An AddrPipeCfg is added in above data structure
4611.651Slukemtypedef ADDR_TILEINFO ADDR_R800_TILEINFO;
4621.651Slukem
4631.651Slukem/**
4641.651Slukem****************************************************************************************************
4651.651Slukem* @brief
4661.651Slukem*       Information needed by quad buffer stereo support
4671.654Slukem****************************************************************************************************
4681.651Slukem*/
4691.651Slukemtypedef struct _ADDR_QBSTEREOINFO
4701.651Slukem{
4711.651Slukem    UINT_32         eyeHeight;          ///< Height (in pixel rows) to right eye
4721.651Slukem    UINT_32         rightOffset;        ///< Offset (in bytes) to right eye
4731.651Slukem    UINT_32         rightSwizzle;       ///< TileSwizzle for right eyes
4741.651Slukem} ADDR_QBSTEREOINFO;
4751.651Slukem
4761.650Slukem/**
4771.651Slukem****************************************************************************************************
4781.651Slukem*   ADDR_SURFACE_FLAGS
4791.651Slukem*
4801.651Slukem*   @brief
4811.651Slukem*       Surface flags
4821.651Slukem****************************************************************************************************
4831.651Slukem*/
4841.651Slukemtypedef union _ADDR_SURFACE_FLAGS
4851.651Slukem{
4861.651Slukem    struct
4871.651Slukem    {
4881.873Sscw        UINT_32 color                : 1; ///< Flag indicates this is a color buffer
4891.950Schristos        UINT_32 depth                : 1; ///< Flag indicates this is a depth/stencil buffer
4901.950Schristos        UINT_32 stencil              : 1; ///< Flag indicates this is a stencil buffer
4911.950Schristos        UINT_32 texture              : 1; ///< Flag indicates this is a texture
4921.725Sthorpej        UINT_32 cube                 : 1; ///< Flag indicates this is a cubemap
4931.950Schristos        UINT_32 volume               : 1; ///< Flag indicates this is a volume texture
4941.950Schristos        UINT_32 fmask                : 1; ///< Flag indicates this is an fmask
4951.651Slukem        UINT_32 cubeAsArray          : 1; ///< Flag indicates if treat cubemap as arrays
4961.651Slukem        UINT_32 compressZ            : 1; ///< Flag indicates z buffer is compressed
4971.651Slukem        UINT_32 overlay              : 1; ///< Flag indicates this is an overlay surface
4981.651Slukem        UINT_32 noStencil            : 1; ///< Flag indicates this depth has no separate stencil
4991.651Slukem        UINT_32 display              : 1; ///< Flag indicates this should match display controller req.
5001.811Shubertf        UINT_32 opt4Space            : 1; ///< Flag indicates this surface should be optimized for space
5011.811Shubertf                                          ///  i.e. save some memory but may lose performance
5021.651Slukem        UINT_32 prt                  : 1; ///< Flag for partially resident texture
5031.651Slukem        UINT_32 qbStereo             : 1; ///< Quad buffer stereo surface
5041.651Slukem        UINT_32 pow2Pad              : 1; ///< SI: Pad to pow2, must set for mipmap (include level0)
5051.651Slukem        UINT_32 interleaved          : 1; ///< Special flag for interleaved YUV surface padding
5061.651Slukem        UINT_32 tcCompatible         : 1; ///< Flag indicates surface needs to be shader readable
5071.651Slukem        UINT_32 dispTileType         : 1; ///< NI: force display Tiling for 128 bit shared resoruce
5081.651Slukem        UINT_32 dccCompatible        : 1; ///< VI: whether to make MSAA surface support dcc fast clear
5091.677Schristos        UINT_32 dccPipeWorkaround    : 1; ///< VI: whether to workaround the HW limit that
5101.651Slukem                                          ///  dcc can't be enabled if pipe config of tile mode
5111.651Slukem                                          ///  is different from that of ASIC, this flag
5121.651Slukem                                          ///  is address lib internal flag, client should ignore it
5131.651Slukem        UINT_32 czDispCompatible     : 1; ///< SI+: CZ family has a HW bug needs special alignment.
5141.651Slukem                                          ///  This flag indicates we need to follow the
5151.651Slukem                                          ///  alignment with CZ families or other ASICs under
5161.651Slukem                                          ///  PX configuration + CZ.
5171.651Slukem        UINT_32 nonSplit             : 1; ///< CI: depth texture should not be split
5181.651Slukem        UINT_32 disableLinearOpt     : 1; ///< Disable tile mode optimization to linear
5191.651Slukem        UINT_32 needEquation         : 1; ///< Make the surface tile setting equation compatible.
5201.651Slukem                                          ///  This flag indicates we need to override tile
5211.651Slukem                                          ///  mode to PRT_* tile mode to disable slice rotation,
5221.786Schristos                                          ///  which is needed by swizzle pattern equation.
5231.651Slukem        UINT_32 skipIndicesOutput    : 1; ///< Skipping indices in output.
5241.651Slukem        UINT_32 rotateDisplay        : 1; ///< Rotate micro tile type
5251.651Slukem        UINT_32 minimizeAlignment    : 1; ///< Minimize alignment
5261.787Slukem        UINT_32 preferEquation       : 1; ///< Return equation index without adjusting tile mode
5271.651Slukem        UINT_32 matchStencilTileCfg  : 1; ///< Select tile index of stencil as well as depth surface
5281.651Slukem                                          ///  to make sure they share same tile config parameters
5291.651Slukem        UINT_32 disallowLargeThickDegrade   : 1;    ///< Disallow large thick tile degrade
5301.651Slukem        UINT_32 reserved             : 1; ///< Reserved bits
5311.651Slukem    };
5321.651Slukem
5331.651Slukem    UINT_32 value;
5341.651Slukem} ADDR_SURFACE_FLAGS;
5351.651Slukem
5361.651Slukem/**
5371.650Slukem****************************************************************************************************
5381.650Slukem*   ADDR_COMPUTE_SURFACE_INFO_INPUT
5391.650Slukem*
5401.650Slukem*   @brief
5411.650Slukem*       Input structure for AddrComputeSurfaceInfo
5421.650Slukem****************************************************************************************************
5431.650Slukem*/
5441.651Slukemtypedef struct _ADDR_COMPUTE_SURFACE_INFO_INPUT
5451.796Swiz{
5461.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
5471.651Slukem
5481.651Slukem    AddrTileMode        tileMode;           ///< Tile mode
5491.651Slukem    AddrFormat          format;             ///< If format is set to valid one, bpp/width/height
5501.651Slukem                                            ///  might be overwritten
5511.651Slukem    UINT_32             bpp;                ///< Bits per pixel
5521.651Slukem    UINT_32             numSamples;         ///< Number of samples
5531.651Slukem    UINT_32             width;              ///< Width, in pixels
5541.945Sbjh21    UINT_32             height;             ///< Height, in pixels
5551.992Splunky    UINT_32             numSlices;          ///< Number of surface slices or depth
5561.946Sbjh21    UINT_32             slice;              ///< Slice index
5571.651Slukem    UINT_32             mipLevel;           ///< Current mipmap level
5581.651Slukem    UINT_32             numMipLevels;       ///< Number of mips in mip chain
5591.651Slukem    ADDR_SURFACE_FLAGS  flags;              ///< Surface type flags
5601.656Sbjh21    UINT_32             numFrags;           ///< Number of fragments, leave it zero or the same as
5611.664Sbjh21                                            ///  number of samples for normal AA; Set it to the
5621.651Slukem                                            ///  number of fragments for EQAA
5631.651Slukem    /// r800 and later HWL parameters
5641.651Slukem    // Needed by 2D tiling, for linear and 1D tiling, just keep them 0's
5651.651Slukem    ADDR_TILEINFO*      pTileInfo;          ///< 2D tile parameters. Set to 0 to default/calculate
5661.667Sbjh21    AddrTileType        tileType;           ///< Micro tiling type, not needed when tileIndex != -1
5671.921Sbjh21    INT_32              tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
5681.651Slukem                                            ///  while the global useTileIndex is set to 1
5691.651Slukem    UINT_32             basePitch;          ///< Base level pitch in pixels, 0 means ignored, is a
5701.651Slukem                                            ///  must for mip levels from SI+.
5711.651Slukem                                            ///  Don't use pitch in blocks for compressed formats!
5721.664Sbjh21    UINT_32             maxBaseAlign;       ///< Max base alignment request from client
5731.946Sbjh21    UINT_32             pitchAlign;         ///< Pitch alignment request from client
5741.651Slukem    UINT_32             heightAlign;        ///< Height alignment request from client
5751.651Slukem} ADDR_COMPUTE_SURFACE_INFO_INPUT;
5761.921Sbjh21
5771.651Slukem/**
5781.923Sbjh21****************************************************************************************************
5791.664Sbjh21*   ADDR_COMPUTE_SURFACE_INFO_OUTPUT
5801.651Slukem*
5811.651Slukem*   @brief
5821.651Slukem*       Output structure for AddrComputeSurfInfo
5831.651Slukem*   @note
5841.651Slukem        Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch
5851.651Slukem        Pixel: Original pixel
5861.651Slukem****************************************************************************************************
5871.651Slukem*/
5881.651Slukemtypedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT
5891.1000Smacallan{
5901.1000Smacallan    UINT_32         size;           ///< Size of this structure in bytes
5911.1000Smacallan
5921.651Slukem    UINT_32         pitch;          ///< Pitch in elements (in blocks for compressed formats)
5931.826Smacallan    UINT_32         height;         ///< Height in elements (in blocks for compressed formats)
5941.651Slukem    UINT_32         depth;          ///< Number of slice/depth
5951.651Slukem    UINT_64         surfSize;       ///< Surface size in bytes
5961.651Slukem    AddrTileMode    tileMode;       ///< Actual tile mode. May differ from that in input
5971.769Syamt    UINT_32         baseAlign;      ///< Base address alignment
5981.651Slukem    UINT_32         pitchAlign;     ///< Pitch alignment, in elements
5991.651Slukem    UINT_32         heightAlign;    ///< Height alignment, in elements
6001.651Slukem    UINT_32         depthAlign;     ///< Depth alignment, aligned to thickness, for 3d texture
6011.955Sbouyer    UINT_32         bpp;            ///< Bits per elements (e.g. blocks for BCn, 1/3 for 96bit)
6021.739Shannken    UINT_32         pixelPitch;     ///< Pitch in original pixels
6031.651Slukem    UINT_32         pixelHeight;    ///< Height in original pixels
6041.984Sxtraeme    UINT_32         pixelBits;      ///< Original bits per pixel, passed from input
6051.651Slukem    UINT_64         sliceSize;      ///< Size of slice specified by input's slice
6061.651Slukem                                    ///  The result is controlled by surface flags & createFlags
6071.651Slukem                                    ///  By default this value equals to surfSize for volume
6081.651Slukem    UINT_32         pitchTileMax;   ///< PITCH_TILE_MAX value for h/w register
6091.651Slukem    UINT_32         heightTileMax;  ///< HEIGHT_TILE_MAX value for h/w register
6101.651Slukem    UINT_32         sliceTileMax;   ///< SLICE_TILE_MAX value for h/w register
6111.651Slukem
6121.651Slukem    UINT_32         numSamples;     ///< Pass the effective numSamples processed in this call
6131.651Slukem
6141.651Slukem    /// r800 and later HWL parameters
6151.651Slukem    ADDR_TILEINFO*  pTileInfo;      ///< Tile parameters used. Filled in if 0 on input
6161.651Slukem    AddrTileType    tileType;       ///< Micro tiling type, only valid when tileIndex != -1
6171.651Slukem    INT_32          tileIndex;      ///< Tile index, MAY be "downgraded"
6181.651Slukem
6191.651Slukem    INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
6201.651Slukem    /// Output flags
6211.651Slukem    struct
6221.651Slukem    {
6231.651Slukem        /// Special information to work around SI mipmap swizzle bug UBTS #317508
6241.651Slukem        UINT_32     last2DLevel  : 1;  ///< TRUE if this is the last 2D(3D) tiled
6251.651Slukem                                       ///< Only meaningful when create flag checkLast2DLevel is set
6261.651Slukem        UINT_32     tcCompatible : 1;  ///< If the surface can be shader compatible
6271.651Slukem        UINT_32     dccUnsupport : 1;  ///< If the surface can support DCC compressed rendering
6281.651Slukem        UINT_32     prtTileIndex : 1;  ///< SI only, indicate the returned tile index is for PRT
6291.651Slukem                                       ///< If address lib return true for mip 0, client should set prt flag
6301.651Slukem                                       ///< for child mips in subsequent compute surface info calls
6311.651Slukem        UINT_32     reserved     :28;  ///< Reserved bits
6321.651Slukem    };
6331.651Slukem
6341.651Slukem    UINT_32         equationIndex;     ///< Equation index in the equation table;
6351.651Slukem
6361.651Slukem    UINT_32         blockWidth;        ///< Width in element inside one block(1D->Micro, 2D->Macro)
6371.651Slukem    UINT_32         blockHeight;       ///< Height in element inside one block(1D->Micro, 2D->Macro)
6381.651Slukem    UINT_32         blockSlices;       ///< Slice number inside one block(1D->Micro, 2D->Macro)
6391.651Slukem
6401.651Slukem    /// Stereo info
6411.651Slukem    ADDR_QBSTEREOINFO*  pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE
6421.651Slukem
6431.651Slukem    INT_32          stencilTileIdx; ///< stencil tile index output when matchStencilTileCfg was set
6441.651Slukem} ADDR_COMPUTE_SURFACE_INFO_OUTPUT;
6451.651Slukem
6461.651Slukem/**
6471.651Slukem****************************************************************************************************
6481.651Slukem*   AddrComputeSurfaceInfo
6491.651Slukem*
6501.651Slukem*   @brief
6511.651Slukem*       Compute surface width/height/depth/alignments and suitable tiling mode
6521.651Slukem****************************************************************************************************
6531.650Slukem*/
6541.651SlukemADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
6551.651Slukem    ADDR_HANDLE                             hLib,
6561.651Slukem    const ADDR_COMPUTE_SURFACE_INFO_INPUT*  pIn,
6571.651Slukem    ADDR_COMPUTE_SURFACE_INFO_OUTPUT*       pOut);
6581.651Slukem
6591.651Slukem/**
6601.651Slukem****************************************************************************************************
6611.651Slukem*   ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
6621.651Slukem*
6631.651Slukem*   @brief
6641.651Slukem*       Input structure for AddrComputeSurfaceAddrFromCoord
6651.651Slukem****************************************************************************************************
6661.650Slukem*/
6671.650Slukemtypedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
6681.650Slukem{
6691.650Slukem    UINT_32         size;               ///< Size of this structure in bytes
6701.650Slukem
6711.650Slukem    UINT_32         x;                  ///< X coordinate
6721.650Slukem    UINT_32         y;                  ///< Y coordinate
6731.650Slukem    UINT_32         slice;              ///< Slice index
6741.650Slukem    UINT_32         sample;             ///< Sample index, use fragment index for EQAA
6751.650Slukem
6761.650Slukem    UINT_32         bpp;                ///< Bits per pixel
6771.650Slukem    UINT_32         pitch;              ///< Surface pitch, in pixels
6781.650Slukem    UINT_32         height;             ///< Surface height, in pixels
6791.650Slukem    UINT_32         numSlices;          ///< Surface depth
6801.650Slukem    UINT_32         numSamples;         ///< Number of samples
6811.650Slukem
6821.650Slukem    AddrTileMode    tileMode;           ///< Tile mode
6831.650Slukem    BOOL_32         isDepth;            ///< TRUE if the surface uses depth sample ordering within
6841.650Slukem                                        ///  micro tile. Textures can also choose depth sample order
6851.650Slukem    UINT_32         tileBase;           ///< Base offset (in bits) inside micro tile which handles
6861.650Slukem                                        ///  the case that components are stored separately
6871.650Slukem    UINT_32         compBits;           ///< The component bits actually needed(for planar surface)
6881.650Slukem
6891.650Slukem    UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
6901.650Slukem                                        ///  number of samples for normal AA; Set it to the
6911.650Slukem                                        ///  number of fragments for EQAA
6921.650Slukem    /// r800 and later HWL parameters
6931.650Slukem    // Used for 1D tiling above
6941.650Slukem    AddrTileType    tileType;           ///< See defintion of AddrTileType
6951.650Slukem    struct
6961.650Slukem    {
6971.650Slukem        UINT_32     ignoreSE : 1;       ///< TRUE if shader engines are ignored. This is texture
6981.650Slukem                                        ///  only flag. Only non-RT texture can set this to TRUE
6991.650Slukem        UINT_32     reserved :31;       ///< Reserved for future use.
7001.1024Sxtraeme    };
7011.651Slukem    // 2D tiling needs following structure
7021.651Slukem    ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Client must provide all data
7031.651Slukem    INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
7041.651Slukem                                        ///  while the global useTileIndex is set to 1
7051.651Slukem    union
7061.651Slukem    {
7071.651Slukem        struct
7081.651Slukem        {
7091.794Sbriggs            UINT_32  bankSwizzle;       ///< Bank swizzle
7101.650Slukem            UINT_32  pipeSwizzle;       ///< Pipe swizzle
7111.651Slukem        };
7121.651Slukem        UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
7131.651Slukem    };
7141.651Slukem} ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT;
7151.651Slukem
7161.651Slukem/**
7171.1036Sjmmv****************************************************************************************************
7181.663Sperry*   ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
7191.692Sdyoung*
7201.770Scube*   @brief
7211.757Sjoff*       Output structure for AddrComputeSurfaceAddrFromCoord
7221.651Slukem****************************************************************************************************
7231.728Saugustss*/
7241.651Slukemtypedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
7251.651Slukem{
7261.651Slukem    UINT_32 size;           ///< Size of this structure in bytes
7271.651Slukem
7281.754Sreinoud    UINT_64 addr;           ///< Byte address
7291.651Slukem    UINT_32 bitPosition;    ///< Bit position within surfaceAddr, 0-7.
7301.651Slukem                            ///  For surface bpp < 8, e.g. FMT_1.
7311.651Slukem    UINT_32 prtBlockIndex;  ///< Index of a PRT tile (64K block)
7321.730Saugustss} ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT;
7331.651Slukem
7341.795Skent/**
7351.651Slukem****************************************************************************************************
7361.651Slukem*   AddrComputeSurfaceAddrFromCoord
7371.1026Skiyohara*
7381.675Smrg*   @brief
7391.651Slukem*       Compute surface address from a given coordinate.
7401.651Slukem****************************************************************************************************
7411.651Slukem*/
7421.997SbouyerADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord(
7431.651Slukem    ADDR_HANDLE                                     hLib,
7441.898Sgdamore    const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
7451.651Slukem    ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut);
7461.959Sbouyer
7471.651Slukem/**
7481.651Slukem****************************************************************************************************
7491.651Slukem*   ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
7501.651Slukem*
7511.651Slukem*   @brief
7521.898Sgdamore*       Input structure for AddrComputeSurfaceCoordFromAddr
7531.1021Skiyohara****************************************************************************************************
7541.930Splunky*/
7551.898Sgdamoretypedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
7561.985Swiz{
7571.930Splunky    UINT_32         size;               ///< Size of this structure in bytes
7581.898Sgdamore
7591.898Sgdamore    UINT_64         addr;               ///< Address in bytes
7601.913Stron    UINT_32         bitPosition;        ///< Bit position in addr. 0-7. for surface bpp < 8,
7611.976Sbriggs                                        ///  e.g. FMT_1;
7621.650Slukem    UINT_32         bpp;                ///< Bits per pixel
7631.651Slukem    UINT_32         pitch;              ///< Pitch, in pixels
7641.651Slukem    UINT_32         height;             ///< Height in pixels
7651.651Slukem    UINT_32         numSlices;          ///< Surface depth
7661.892Sliamjfoy    UINT_32         numSamples;         ///< Number of samples
7671.651Slukem
7681.651Slukem    AddrTileMode    tileMode;           ///< Tile mode
7691.651Slukem    BOOL_32         isDepth;            ///< Surface uses depth sample ordering within micro tile.
7701.802Swiz                                        ///  Note: Textures can choose depth sample order as well.
7711.651Slukem    UINT_32         tileBase;           ///< Base offset (in bits) inside micro tile which handles
7721.651Slukem                                        ///  the case that components are stored separately
7731.651Slukem    UINT_32         compBits;           ///< The component bits actually needed(for planar surface)
7741.651Slukem
7751.989Smacallan    UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
7761.802Swiz                                        ///  number of samples for normal AA; Set it to the
7771.985Swiz                                        ///  number of fragments for EQAA
7781.870Sxtraeme    /// r800 and later HWL parameters
7791.651Slukem    // Used for 1D tiling above
7801.651Slukem    AddrTileType    tileType;           ///< See defintion of AddrTileType
7811.651Slukem    struct
7821.651Slukem    {
7831.651Slukem        UINT_32     ignoreSE : 1;       ///< TRUE if shader engines are ignored. This is texture
7841.651Slukem                                        ///  only flag. Only non-RT texture can set this to TRUE
7851.651Slukem        UINT_32     reserved :31;       ///< Reserved for future use.
7861.651Slukem    };
7871.651Slukem    // 2D tiling needs following structure
7881.651Slukem    ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Client must provide all data
7891.651Slukem    INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
7901.651Slukem                                        ///  while the global useTileIndex is set to 1
7911.1032Sxtraeme    union
7921.687Swiz    {
7931.651Slukem        struct
7941.651Slukem        {
7951.1000Smacallan            UINT_32  bankSwizzle;       ///< Bank swizzle
7961.651Slukem            UINT_32  pipeSwizzle;       ///< Pipe swizzle
7971.651Slukem        };
7981.651Slukem        UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
7991.651Slukem    };
8001.651Slukem} ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT;
8011.651Slukem
8021.884Sgdamore/**
8031.651Slukem****************************************************************************************************
8041.651Slukem*   ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
8051.666Sragge*
8061.920Swiz*   @brief
8071.651Slukem*       Output structure for AddrComputeSurfaceCoordFromAddr
8081.651Slukem****************************************************************************************************
8091.651Slukem*/
8101.651Slukemtypedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
8111.651Slukem{
8121.651Slukem    UINT_32 size;   ///< Size of this structure in bytes
8131.651Slukem
8141.651Slukem    UINT_32 x;      ///< X coordinate
8151.651Slukem    UINT_32 y;      ///< Y coordinate
8161.651Slukem    UINT_32 slice;  ///< Index of slices
8171.651Slukem    UINT_32 sample; ///< Index of samples, means fragment index for EQAA
8181.651Slukem} ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT;
8191.651Slukem
8201.651Slukem/**
8211.651Slukem****************************************************************************************************
8221.986Sagc*   AddrComputeSurfaceCoordFromAddr
8231.651Slukem*
8241.651Slukem*   @brief
8251.651Slukem*       Compute coordinate from a given surface address
8261.651Slukem****************************************************************************************************
8271.651Slukem*/
8281.651SlukemADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr(
8291.651Slukem    ADDR_HANDLE                                     hLib,
8301.651Slukem    const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
8311.651Slukem    ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*      pOut);
8321.651Slukem
8331.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
8341.651Slukem//                                   HTile functions
8351.945Sbjh21////////////////////////////////////////////////////////////////////////////////////////////////////
8361.651Slukem
8371.651Slukem/**
8381.651Slukem****************************************************************************************************
8391.651Slukem*   ADDR_HTILE_FLAGS
8401.651Slukem*
8411.651Slukem*   @brief
8421.651Slukem*       HTILE flags
8431.651Slukem****************************************************************************************************
8441.651Slukem*/
8451.651Slukemtypedef union _ADDR_HTILE_FLAGS
8461.651Slukem{
8471.651Slukem    struct
8481.651Slukem    {
8491.651Slukem        UINT_32 tcCompatible          : 1;  ///< Flag indicates surface needs to be shader readable
8501.651Slukem        UINT_32 skipTcCompatSizeAlign : 1;  ///< Flag indicates that addrLib will not align htile
8511.651Slukem                                            ///  size to 256xBankxPipe when computing tc-compatible
8521.651Slukem                                            ///  htile info.
8531.953Srpaulo        UINT_32 reserved              : 30; ///< Reserved bits
8541.655Srearnsha    };
8551.651Slukem
8561.651Slukem    UINT_32 value;
8571.855Sgdamore} ADDR_HTILE_FLAGS;
8581.855Sgdamore
8591.1030Sgarbled/**
8601.1030Sgarbled****************************************************************************************************
8611.1030Sgarbled*   ADDR_COMPUTE_HTILE_INFO_INPUT
8621.1030Sgarbled*
8631.651Slukem*   @brief
8641.651Slukem*       Input structure of AddrComputeHtileInfo
8651.651Slukem****************************************************************************************************
8661.683Sjonathan*/
8671.651Slukemtypedef struct _ADDR_COMPUTE_HTILE_INFO_INPUT
8681.651Slukem{
8691.651Slukem    UINT_32            size;            ///< Size of this structure in bytes
8701.651Slukem
8711.651Slukem    ADDR_HTILE_FLAGS   flags;           ///< HTILE flags
8721.651Slukem    UINT_32            pitch;           ///< Surface pitch, in pixels
8731.652Shannken    UINT_32            height;          ///< Surface height, in pixels
8741.651Slukem    UINT_32            numSlices;       ///< Number of slices
8751.802Swiz    BOOL_32            isLinear;        ///< Linear or tiled HTILE layout
8761.801Skiyohara    AddrHtileBlockSize blockWidth;      ///< 4 or 8. EG above only support 8
8771.801Skiyohara    AddrHtileBlockSize blockHeight;     ///< 4 or 8. EG above only support 8
8781.651Slukem    ADDR_TILEINFO*     pTileInfo;       ///< Tile info
8791.651Slukem
8801.989Smacallan    INT_32             tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
8811.651Slukem                                        ///  while the global useTileIndex is set to 1
8821.802Swiz    INT_32             macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
8831.651Slukem                                        ///< README: When tileIndex is not -1, this must be valid
8841.651Slukem} ADDR_COMPUTE_HTILE_INFO_INPUT;
8851.651Slukem
8861.651Slukem/**
8871.830Sjmcneill****************************************************************************************************
8881.874Sriz*   ADDR_COMPUTE_HTILE_INFO_OUTPUT
8891.651Slukem*
8901.651Slukem*   @brief
8911.651Slukem*       Output structure of AddrComputeHtileInfo
8921.651Slukem****************************************************************************************************
8931.701Sitojun*/
8941.688Sjonathantypedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT
8951.651Slukem{
8961.650Slukem    UINT_32 size;               ///< Size of this structure in bytes
8971.651Slukem
8981.651Slukem    UINT_32 pitch;              ///< Pitch in pixels of depth buffer represented in this
8991.651Slukem                                ///  HTile buffer. This might be larger than original depth
9001.650Slukem                                ///  buffer pitch when called with an unaligned pitch.
9011.650Slukem    UINT_32 height;             ///< Height in pixels, as above
9021.651Slukem    UINT_64 htileBytes;         ///< Size of HTILE buffer, in bytes
9031.651Slukem    UINT_32 baseAlign;          ///< Base alignment
9041.651Slukem    UINT_32 bpp;                ///< Bits per pixel for HTILE is how many bits for an 8x8 block!
9051.650Slukem    UINT_32 macroWidth;         ///< Macro width in pixels, actually squared cache shape
9061.651Slukem    UINT_32 macroHeight;        ///< Macro height in pixels
9071.651Slukem    UINT_64 sliceSize;          ///< Slice size, in bytes.
9081.651Slukem    BOOL_32 sliceInterleaved;   ///< Flag to indicate if different slice's htile is interleaved
9091.650Slukem                                ///  Compute engine clear can't be used if htile is interleaved
9101.651Slukem    BOOL_32 nextMipLevelCompressible;   ///< Flag to indicate whether HTILE can be enabled in
9111.651Slukem                                        ///  next mip level, it also indicates if memory set based
9121.651Slukem                                        ///  fast clear can be used for current mip level.
9131.651Slukem} ADDR_COMPUTE_HTILE_INFO_OUTPUT;
9141.651Slukem
9151.651Slukem/**
9161.651Slukem****************************************************************************************************
9171.651Slukem*   AddrComputeHtileInfo
9181.651Slukem*
9191.651Slukem*   @brief
9201.650Slukem*       Compute Htile pitch, height, base alignment and size in bytes
9211.651Slukem****************************************************************************************************
9221.651Slukem*/
9231.650SlukemADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo(
9241.651Slukem    ADDR_HANDLE                             hLib,
9251.650Slukem    const ADDR_COMPUTE_HTILE_INFO_INPUT*    pIn,
9261.651Slukem    ADDR_COMPUTE_HTILE_INFO_OUTPUT*         pOut);
9271.651Slukem
9281.651Slukem/**
9291.651Slukem****************************************************************************************************
9301.650Slukem*   ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
9311.651Slukem*
9321.727Swiz*   @brief
9331.726Swiz*       Input structure for AddrComputeHtileAddrFromCoord
9341.726Swiz****************************************************************************************************
9351.726Swiz*/
9361.726Swiztypedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
9371.726Swiz{
9381.726Swiz    UINT_32            size;            ///< Size of this structure in bytes
9391.726Swiz
9401.726Swiz    UINT_32            pitch;           ///< Pitch, in pixels
9411.726Swiz    UINT_32            height;          ///< Height in pixels
9421.726Swiz    UINT_32            x;               ///< X coordinate
9431.726Swiz    UINT_32            y;               ///< Y coordinate
9441.726Swiz    UINT_32            slice;           ///< Index of slice
9451.905Speter    UINT_32            numSlices;       ///< Number of slices
9461.938Speter    BOOL_32            isLinear;        ///< Linear or tiled HTILE layout
9471.938Speter    ADDR_HTILE_FLAGS   flags;           ///< htile flags
9481.938Speter    AddrHtileBlockSize blockWidth;      ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
9491.812Snakayama    AddrHtileBlockSize blockHeight;     ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
9501.682Suwe    ADDR_TILEINFO*     pTileInfo;       ///< Tile info
9511.682Suwe
9521.651Slukem    INT_32             tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
9531.820Skiyohara                                        ///  while the global useTileIndex is set to 1
9541.790Sagc    INT_32             macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
9551.651Slukem                                        ///< README: When tileIndex is not -1, this must be valid
9561.651Slukem    UINT_32            bpp;             ///< depth/stencil buffer bit per pixel size
9571.651Slukem    UINT_32            zStencilAddr;    ///< tcCompatible Z/Stencil surface address
9581.651Slukem} ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT;
9591.650Slukem
9601.972Sdyoung/**
9611.650Slukem****************************************************************************************************
9621.651Slukem*   ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
9631.651Slukem*
9641.651Slukem*   @brief
9651.651Slukem*       Output structure for AddrComputeHtileAddrFromCoord
9661.651Slukem****************************************************************************************************
9671.1011Sxtraeme*/
9681.985Swiztypedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
9691.829Sdyoung{
9701.1007Sjmcneill    UINT_32 size;           ///< Size of this structure in bytes
9711.832Sjmcneill
9721.650Slukem    UINT_64 addr;           ///< Address in bytes
9731.651Slukem    UINT_32 bitPosition;    ///< Bit position, 0 or 4. CMASK and HTILE shares some lib method.
9741.651Slukem                            ///  So we keep bitPosition for HTILE as well
9751.650Slukem} ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT;
9761.651Slukem
9771.650Slukem/**
9781.651Slukem****************************************************************************************************
9791.651Slukem*   AddrComputeHtileAddrFromCoord
9801.651Slukem*
9811.651Slukem*   @brief
9821.880Srittera*       Compute Htile address according to coordinates (of depth buffer)
9831.651Slukem****************************************************************************************************
9841.650Slukem*/
9851.650SlukemADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord(
9861.650Slukem    ADDR_HANDLE                                     hLib,
9871.651Slukem    const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT*   pIn,
9881.650Slukem    ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*        pOut);
9891.650Slukem
9901.651Slukem/**
9911.859Sdyoung****************************************************************************************************
9921.650Slukem*   ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
9931.689Skochi*
9941.691Skanaoka*   @brief
9951.882Sjmcneill*       Input structure for AddrComputeHtileCoordFromAddr
9961.650Slukem****************************************************************************************************
9971.650Slukem*/
9981.650Slukemtypedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
9991.650Slukem{
10001.650Slukem    UINT_32            size;            ///< Size of this structure in bytes
10011.650Slukem
10021.650Slukem    UINT_64            addr;            ///< Address
10031.650Slukem    UINT_32            bitPosition;     ///< Bit position 0 or 4. CMASK and HTILE share some methods
10041.985Swiz                                        ///  so we keep bitPosition for HTILE as well
10051.651Slukem    UINT_32            pitch;           ///< Pitch, in pixels
10061.1022Sxtraeme    UINT_32            height;          ///< Height, in pixels
10071.1017Skiyohara    UINT_32            numSlices;       ///< Number of slices
10081.651Slukem    BOOL_32            isLinear;        ///< Linear or tiled HTILE layout
10091.651Slukem    AddrHtileBlockSize blockWidth;      ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
10101.651Slukem    AddrHtileBlockSize blockHeight;     ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
10111.651Slukem    ADDR_TILEINFO*     pTileInfo;       ///< Tile info
10121.651Slukem
10131.926Swiz    INT_32             tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
10141.992Splunky                                        ///  while the global useTileIndex is set to 1
10151.800Skiyohara    INT_32             macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
10161.783Sdyoung                                        ///< README: When tileIndex is not -1, this must be valid
10171.651Slukem} ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT;
10181.651Slukem
10191.651Slukem/**
10201.651Slukem****************************************************************************************************
10211.943Sbouyer*   ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
10221.650Slukem*
10231.651Slukem*   @brief
10241.651Slukem*       Output structure for AddrComputeHtileCoordFromAddr
10251.651Slukem****************************************************************************************************
10261.651Slukem*/
10271.651Slukemtypedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
10281.651Slukem{
10291.651Slukem    UINT_32 size;   ///< Size of this structure in bytes
10301.651Slukem
10311.651Slukem    UINT_32 x;      ///< X coordinate
10321.651Slukem    UINT_32 y;      ///< Y coordinate
10331.651Slukem    UINT_32 slice;  ///< Slice index
10341.864Sjwise} ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT;
10351.864Sjwise
10361.650Slukem/**
10371.651Slukem****************************************************************************************************
10381.864Sjwise*   AddrComputeHtileCoordFromAddr
10391.936Sbouyer*
10401.864Sjwise*   @brief
10411.651Slukem*       Compute coordinates within depth buffer (1st pixel of a micro tile) according to
10421.651Slukem*       Htile address
10431.721Slukem****************************************************************************************************
10441.651Slukem*/
10451.651SlukemADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
10461.651Slukem    ADDR_HANDLE                                     hLib,
10471.651Slukem    const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT*   pIn,
10481.651Slukem    ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*        pOut);
10491.651Slukem
10501.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
10511.651Slukem//                                     C-mask functions
10521.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
10531.651Slukem
10541.651Slukem/**
10551.651Slukem****************************************************************************************************
10561.651Slukem*   ADDR_CMASK_FLAGS
10571.651Slukem*
10581.651Slukem*   @brief
10591.651Slukem*       CMASK flags
10601.1037Sxtraeme****************************************************************************************************
10611.1037Sxtraeme*/
10621.736Sgranttypedef union _ADDR_CMASK_FLAGS
10631.1001Sbouyer{
10641.752Sskrll    struct
10651.651Slukem    {
10661.651Slukem        UINT_32 tcCompatible  : 1; ///< Flag indicates surface needs to be shader readable
10671.737Scube        UINT_32 reserved      :31; ///< Reserved bits
10681.651Slukem    };
10691.651Slukem
10701.678Suwe    UINT_32 value;
10711.906Sxtraeme} ADDR_CMASK_FLAGS;
10721.651Slukem
10731.651Slukem/**
10741.651Slukem****************************************************************************************************
10751.651Slukem*   ADDR_COMPUTE_CMASK_INFO_INPUT
10761.651Slukem*
10771.651Slukem*   @brief
10781.651Slukem*       Input structure of AddrComputeCmaskInfo
10791.651Slukem****************************************************************************************************
10801.651Slukem*/
10811.890Strontypedef struct _ADDR_COMPUTE_CMASKINFO_INPUT
10821.651Slukem{
10831.650Slukem    UINT_32             size;            ///< Size of this structure in bytes
10841.651Slukem
10851.941Sgdamore    ADDR_CMASK_FLAGS    flags;           ///< CMASK flags
10861.650Slukem    UINT_32             pitch;           ///< Pitch, in pixels, of color buffer
10871.651Slukem    UINT_32             height;          ///< Height, in pixels, of color buffer
10881.651Slukem    UINT_32             numSlices;       ///< Number of slices, of color buffer
10891.651Slukem    BOOL_32             isLinear;        ///< Linear or tiled layout, Only SI can be linear
10901.651Slukem    ADDR_TILEINFO*      pTileInfo;       ///< Tile info
10911.651Slukem
10921.651Slukem    INT_32              tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
10931.650Slukem                                         ///  while the global useTileIndex is set to 1
10941.651Slukem    INT_32              macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
10951.651Slukem                                         ///< README: When tileIndex is not -1, this must be valid
10961.651Slukem} ADDR_COMPUTE_CMASK_INFO_INPUT;
10971.1008Stsutsui
10981.992Splunky/**
10991.985Swiz****************************************************************************************************
11001.651Slukem*   ADDR_COMPUTE_CMASK_INFO_OUTPUT
11011.651Slukem*
11021.651Slukem*   @brief
11031.651Slukem*       Output structure of AddrComputeCmaskInfo
11041.651Slukem****************************************************************************************************
11051.650Slukem*/
11061.651Slukemtypedef struct _ADDR_COMPUTE_CMASK_INFO_OUTPUT
11071.651Slukem{
11081.851Sxtraeme    UINT_32 size;           ///< Size of this structure in bytes
11091.957Swiz
11101.651Slukem    UINT_32 pitch;          ///< Pitch in pixels of color buffer which
11111.651Slukem                            ///  this Cmask matches. The size might be larger than
11121.651Slukem                            ///  original color buffer pitch when called with
11131.651Slukem                            ///  an unaligned pitch.
11141.651Slukem    UINT_32 height;         ///< Height in pixels, as above
11151.651Slukem    UINT_64 cmaskBytes;     ///< Size in bytes of CMask buffer
11161.651Slukem    UINT_32 baseAlign;      ///< Base alignment
11171.651Slukem    UINT_32 blockMax;       ///< Cmask block size. Need this to set CB_COLORn_MASK register
11181.651Slukem    UINT_32 macroWidth;     ///< Macro width in pixels, actually squared cache shape
11191.958Sbouyer    UINT_32 macroHeight;    ///< Macro height in pixels
11201.985Swiz    UINT_64 sliceSize;      ///< Slice size, in bytes.
11211.651Slukem} ADDR_COMPUTE_CMASK_INFO_OUTPUT;
11221.651Slukem
11231.651Slukem/**
11241.651Slukem****************************************************************************************************
11251.651Slukem*   AddrComputeCmaskInfo
11261.651Slukem*
11271.651Slukem*   @brief
11281.651Slukem*       Compute Cmask pitch, height, base alignment and size in bytes from color buffer
11291.651Slukem*       info
11301.651Slukem****************************************************************************************************
11311.929Sriz*/
11321.929SrizADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo(
11331.651Slukem    ADDR_HANDLE                             hLib,
11341.651Slukem    const ADDR_COMPUTE_CMASK_INFO_INPUT*    pIn,
11351.724Smanu    ADDR_COMPUTE_CMASK_INFO_OUTPUT*         pOut);
11361.651Slukem
11371.651Slukem/**
11381.651Slukem****************************************************************************************************
11391.651Slukem*   ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
11401.651Slukem*
11411.651Slukem*   @brief
11421.651Slukem*       Input structure for AddrComputeCmaskAddrFromCoord
11431.650Slukem*
11441.651Slukem****************************************************************************************************
11451.651Slukem*/
11461.651Slukemtypedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
11471.651Slukem{
11481.651Slukem    UINT_32          size;           ///< Size of this structure in bytes
11491.651Slukem    UINT_32          x;              ///< X coordinate
11501.651Slukem    UINT_32          y;              ///< Y coordinate
11511.651Slukem    UINT_64          fmaskAddr;      ///< Fmask addr for tc compatible Cmask
11521.651Slukem    UINT_32          slice;          ///< Slice index
11531.1000Smacallan    UINT_32          pitch;          ///< Pitch in pixels, of color buffer
11541.651Slukem    UINT_32          height;         ///< Height in pixels, of color buffer
11551.650Slukem    UINT_32          numSlices;      ///< Number of slices
11561.651Slukem    UINT_32          bpp;
11571.651Slukem    BOOL_32          isLinear;       ///< Linear or tiled layout, Only SI can be linear
11581.651Slukem    ADDR_CMASK_FLAGS flags;          ///< CMASK flags
11591.651Slukem    ADDR_TILEINFO*   pTileInfo;      ///< Tile info
11601.651Slukem
11611.651Slukem    INT_32           tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
11621.985Swiz                                     ///< while the global useTileIndex is set to 1
11631.1013Skiyohara    INT_32           macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
11641.1013Skiyohara                                     ///< README: When tileIndex is not -1, this must be valid
11651.928Sitohy} ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT;
11661.722Sitohy
11671.924Smatt/**
11681.651Slukem****************************************************************************************************
11691.926Swiz*   ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
11701.651Slukem*
11711.651Slukem*   @brief
11721.651Slukem*       Output structure for AddrComputeCmaskAddrFromCoord
11731.651Slukem****************************************************************************************************
11741.651Slukem*/
11751.651Slukemtypedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
11761.651Slukem{
11771.651Slukem    UINT_32 size;           ///< Size of this structure in bytes
11781.651Slukem
11791.651Slukem    UINT_64 addr;           ///< CMASK address in bytes
11801.874Sriz    UINT_32 bitPosition;    ///< Bit position within addr, 0-7. CMASK is 4 bpp,
11811.651Slukem                            ///  so the address may be located in bit 0 (0) or 4 (4)
11821.651Slukem} ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT;
11831.650Slukem
11841.651Slukem/**
11851.651Slukem****************************************************************************************************
11861.651Slukem*   AddrComputeCmaskAddrFromCoord
11871.874Sriz*
11881.1034Sjmcneill*   @brief
11891.651Slukem*       Compute Cmask address according to coordinates (of MSAA color buffer)
11901.992Splunky****************************************************************************************************
11911.651Slukem*/
11921.651SlukemADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord(
11931.651Slukem    ADDR_HANDLE                                     hLib,
11941.651Slukem    const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT*   pIn,
11951.651Slukem    ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*        pOut);
11961.651Slukem
11971.651Slukem/**
11981.651Slukem****************************************************************************************************
11991.651Slukem*   ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
12001.651Slukem*
12011.651Slukem*   @brief
12021.651Slukem*       Input structure for AddrComputeCmaskCoordFromAddr
12031.651Slukem****************************************************************************************************
12041.651Slukem*/
12051.651Slukemtypedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
12061.651Slukem{
12071.651Slukem    UINT_32        size;            ///< Size of this structure in bytes
12081.651Slukem
12091.802Swiz    UINT_64        addr;            ///< CMASK address in bytes
12101.735Sbouyer    UINT_32        bitPosition;     ///< Bit position within addr, 0-7. CMASK is 4 bpp,
12111.864Sjwise                                    ///  so the address may be located in bit 0 (0) or 4 (4)
12121.864Sjwise    UINT_32        pitch;           ///< Pitch, in pixels
12131.651Slukem    UINT_32        height;          ///< Height in pixels
12141.651Slukem    UINT_32        numSlices;       ///< Number of slices
12151.1025Swiz    BOOL_32        isLinear;        ///< Linear or tiled layout, Only SI can be linear
12161.883Sjmcneill    ADDR_TILEINFO* pTileInfo;       ///< Tile info
12171.724Smanu
12181.692Sdyoung    INT_32         tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
12191.651Slukem                                    ///  while the global useTileIndex is set to 1
12201.651Slukem    INT_32         macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
12211.917Sad                                    ///< README: When tileIndex is not -1, this must be valid
12221.917Sad} ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT;
12231.917Sad
12241.651Slukem/**
12251.651Slukem****************************************************************************************************
12261.650Slukem*   ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
12271.650Slukem*
12281.917Sad*   @brief
12291.651Slukem*       Output structure for AddrComputeCmaskCoordFromAddr
12301.650Slukem****************************************************************************************************
12311.650Slukem*/
12321.651Slukemtypedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
12331.650Slukem{
12341.651Slukem    UINT_32 size;   ///< Size of this structure in bytes
12351.1030Sgarbled
12361.1030Sgarbled    UINT_32 x;      ///< X coordinate
12371.1030Sgarbled    UINT_32 y;      ///< Y coordinate
12381.1030Sgarbled    UINT_32 slice;  ///< Slice index
12391.651Slukem} ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT;
12401.651Slukem
12411.1000Smacallan/**
12421.651Slukem****************************************************************************************************
12431.946Sbjh21*   AddrComputeCmaskCoordFromAddr
12441.651Slukem*
12451.692Sdyoung*   @brief
12461.733Swiz*       Compute coordinates within color buffer (1st pixel of a micro tile) according to
12471.651Slukem*       Cmask address
12481.651Slukem****************************************************************************************************
12491.980Sriz*/
12501.980SrizADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
12511.798Skent    ADDR_HANDLE                                     hLib,
12521.715Swiz    const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT*   pIn,
12531.651Slukem    ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT*        pOut);
12541.651Slukem
12551.949Spooka////////////////////////////////////////////////////////////////////////////////////////////////////
12561.651Slukem//                                     F-mask functions
12571.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
12581.675Smrg
12591.675Smrg/**
12601.651Slukem****************************************************************************************************
12611.985Swiz*   ADDR_COMPUTE_FMASK_INFO_INPUT
12621.985Swiz*
12631.651Slukem*   @brief
12641.651Slukem*       Input structure for AddrComputeFmaskInfo
12651.803Sdrochner****************************************************************************************************
12661.651Slukem*/
12671.651Slukemtypedef struct _ADDR_COMPUTE_FMASK_INFO_INPUT
12681.651Slukem{
12691.699Stoshii    UINT_32         size;               ///< Size of this structure in bytes
12701.871Sxtraeme
12711.650Slukem    AddrTileMode    tileMode;           ///< Tile mode
12721.845Sxtraeme    UINT_32         pitch;              ///< Surface pitch, in pixels
12731.651Slukem    UINT_32         height;             ///< Surface height, in pixels
12741.651Slukem    UINT_32         numSlices;          ///< Number of slice/depth
12751.651Slukem    UINT_32         numSamples;         ///< Number of samples
12761.827Snonaka    UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
12771.651Slukem                                        ///  number of samples for normal AA; Set it to the
12781.651Slukem                                        ///  number of fragments for EQAA
12791.651Slukem    /// r800 and later HWL parameters
12801.651Slukem    struct
12811.859Sdyoung    {
12821.806Srpaulo        UINT_32 resolved:   1;          ///< TRUE if the surface is for resolved fmask, only used
12831.947Sjoerg                                        ///  by H/W clients. S/W should always set it to FALSE.
12841.651Slukem        UINT_32 reserved:  31;          ///< Reserved for future use.
12851.985Swiz    };
12861.651Slukem    ADDR_TILEINFO*  pTileInfo;          ///< 2D tiling parameters. Clients must give valid data
12871.800Skiyohara    INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
12881.651Slukem                                        ///  while the global useTileIndex is set to 1
12891.651Slukem} ADDR_COMPUTE_FMASK_INFO_INPUT;
12901.651Slukem
12911.651Slukem/**
12921.651Slukem****************************************************************************************************
12931.651Slukem*   ADDR_COMPUTE_FMASK_INFO_OUTPUT
12941.651Slukem*
12951.651Slukem*   @brief
12961.935Sbjh21*       Output structure for AddrComputeFmaskInfo
12971.1031Schristos****************************************************************************************************
12981.756Sbriggs*/
12991.651Slukemtypedef struct _ADDR_COMPUTE_FMASK_INFO_OUTPUT
13001.651Slukem{
13011.651Slukem    UINT_32         size;           ///< Size of this structure in bytes
13021.651Slukem
13031.651Slukem    UINT_32         pitch;          ///< Pitch of fmask in pixels
13041.651Slukem    UINT_32         height;         ///< Height of fmask in pixels
13051.660Ssekiya    UINT_32         numSlices;      ///< Slices of fmask
13061.660Ssekiya    UINT_64         fmaskBytes;     ///< Size of fmask in bytes
13071.651Slukem    UINT_32         baseAlign;      ///< Base address alignment
13081.961Srumble    UINT_32         pitchAlign;     ///< Pitch alignment
13091.861Srumble    UINT_32         heightAlign;    ///< Height alignment
13101.651Slukem    UINT_32         bpp;            ///< Bits per pixel of FMASK is: number of bit planes
13111.651Slukem    UINT_32         numSamples;     ///< Number of samples, used for dump, export this since input
13121.651Slukem                                    ///  may be changed in 9xx and above
13131.651Slukem    /// r800 and later HWL parameters
13141.962Srumble    ADDR_TILEINFO*  pTileInfo;      ///< Tile parameters used. Fmask can have different
13151.651Slukem                                    ///  bank_height from color buffer
13161.990Sjmcneill    INT_32          tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
13171.740Stsutsui                                    ///  while the global useTileIndex is set to 1
13181.651Slukem    INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
13191.660Ssekiya    UINT_64         sliceSize;      ///< Size of slice in bytes
13201.719Srumble} ADDR_COMPUTE_FMASK_INFO_OUTPUT;
13211.660Ssekiya
13221.1000Smacallan/**
13231.671Suwe****************************************************************************************************
13241.827Snonaka*   AddrComputeFmaskInfo
13251.651Slukem*
13261.651Slukem*   @brief
13271.651Slukem*       Compute Fmask pitch/height/depth/alignments and size in bytes
13281.985Swiz****************************************************************************************************
13291.651Slukem*/
13301.651SlukemADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo(
13311.651Slukem    ADDR_HANDLE                             hLib,
13321.651Slukem    const ADDR_COMPUTE_FMASK_INFO_INPUT*    pIn,
13331.651Slukem    ADDR_COMPUTE_FMASK_INFO_OUTPUT*         pOut);
13341.651Slukem
13351.985Swiz/**
13361.651Slukem****************************************************************************************************
13371.1005Sblymn*   ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
13381.1008Stsutsui*
13391.651Slukem*   @brief
13401.798Skent*       Input structure for AddrComputeFmaskAddrFromCoord
13411.651Slukem****************************************************************************************************
13421.992Splunky*/
13431.858Schristostypedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
13441.651Slukem{
13451.651Slukem    UINT_32         size;               ///< Size of this structure in bytes
13461.651Slukem
13471.651Slukem    UINT_32         x;                  ///< X coordinate
13481.651Slukem    UINT_32         y;                  ///< Y coordinate
13491.651Slukem    UINT_32         slice;              ///< Slice index
13501.651Slukem    UINT_32         plane;              ///< Plane number
13511.651Slukem    UINT_32         sample;             ///< Sample index (fragment index for EQAA)
13521.858Schristos
13531.805Smacallan    UINT_32         pitch;              ///< Surface pitch, in pixels
13541.651Slukem    UINT_32         height;             ///< Surface height, in pixels
13551.651Slukem    UINT_32         numSamples;         ///< Number of samples
13561.675Smrg    UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
13571.651Slukem                                        ///  number of samples for normal AA; Set it to the
13581.651Slukem                                        ///  number of fragments for EQAA
13591.651Slukem
13601.650Slukem    AddrTileMode    tileMode;           ///< Tile mode
13611.651Slukem    union
13621.651Slukem    {
13631.651Slukem        struct
13641.651Slukem        {
13651.651Slukem            UINT_32  bankSwizzle;       ///< Bank swizzle
13661.675Smrg            UINT_32  pipeSwizzle;       ///< Pipe swizzle
13671.675Smrg        };
13681.651Slukem        UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
13691.858Schristos    };
13701.805Smacallan
13711.675Smrg    /// r800 and later HWL parameters
13721.675Smrg    struct
13731.651Slukem    {
13741.991Stnn        UINT_32 resolved:   1;          ///< TRUE if this is a resolved fmask, used by H/W clients
13751.998Sjnemeth        UINT_32 ignoreSE:   1;          ///< TRUE if shader engines are ignored.
13761.674Smrg        UINT_32 reserved:  30;          ///< Reserved for future use.
13771.651Slukem    };
13781.651Slukem    ADDR_TILEINFO*  pTileInfo;          ///< 2D tiling parameters. Client must provide all data
13791.651Slukem
13801.1020Stnn} ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT;
13811.651Slukem
13821.941Sgdamore/**
13831.690Skochi****************************************************************************************************
13841.717Smrg*   ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
13851.651Slukem*
13861.926Swiz*   @brief
13871.651Slukem*       Output structure for AddrComputeFmaskAddrFromCoord
13881.651Slukem****************************************************************************************************
13891.651Slukem*/
13901.651Slukemtypedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
13911.651Slukem{
13921.651Slukem    UINT_32 size;           ///< Size of this structure in bytes
13931.651Slukem
13941.651Slukem    UINT_64 addr;           ///< Fmask address
13951.651Slukem    UINT_32 bitPosition;    ///< Bit position within fmaskAddr, 0-7.
13961.726Swiz} ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT;
13971.651Slukem
13981.651Slukem/**
13991.651Slukem****************************************************************************************************
14001.651Slukem*   AddrComputeFmaskAddrFromCoord
14011.651Slukem*
14021.651Slukem*   @brief
14031.651Slukem*       Compute Fmask address according to coordinates (x,y,slice,sample,plane)
14041.651Slukem****************************************************************************************************
14051.651Slukem*/
14061.651SlukemADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord(
14071.651Slukem    ADDR_HANDLE                                     hLib,
14081.651Slukem    const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT*   pIn,
14091.992Splunky    ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT*        pOut);
14101.651Slukem
14111.651Slukem/**
14121.651Slukem****************************************************************************************************
14131.651Slukem*   ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
14141.651Slukem*
14151.651Slukem*   @brief
14161.651Slukem*       Input structure for AddrComputeFmaskCoordFromAddr
14171.651Slukem****************************************************************************************************
14181.650Slukem*/
14191.651Slukemtypedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
14201.651Slukem{
14211.651Slukem    UINT_32         size;               ///< Size of this structure in bytes
14221.651Slukem
14231.862Sagc    UINT_64         addr;               ///< Address
14241.651Slukem    UINT_32         bitPosition;        ///< Bit position within addr, 0-7.
14251.872Sriz
14261.749Ssmb    UINT_32         pitch;              ///< Pitch, in pixels
14271.651Slukem    UINT_32         height;             ///< Height in pixels
14281.651Slukem    UINT_32         numSamples;         ///< Number of samples
14291.746Scube    UINT_32         numFrags;           ///< Number of fragments
14301.847Sjmmv    AddrTileMode    tileMode;           ///< Tile mode
14311.651Slukem    union
14321.651Slukem    {
14331.651Slukem        struct
14341.651Slukem        {
14351.651Slukem            UINT_32  bankSwizzle;       ///< Bank swizzle
14361.985Swiz            UINT_32  pipeSwizzle;       ///< Pipe swizzle
14371.651Slukem        };
14381.651Slukem        UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
14391.651Slukem    };
14401.651Slukem
14411.651Slukem    /// r800 and later HWL parameters
14421.651Slukem    struct
14431.941Sgdamore    {
14441.651Slukem        UINT_32 resolved:   1;          ///< TRUE if this is a resolved fmask, used by HW components
14451.651Slukem        UINT_32 ignoreSE:   1;          ///< TRUE if shader engines are ignored.
14461.651Slukem        UINT_32 reserved:  30;          ///< Reserved for future use.
14471.772Sjdolecek    };
14481.651Slukem    ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Client must provide all data
14491.651Slukem
14501.651Slukem} ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT;
14511.916Swiz
14521.651Slukem/**
14531.651Slukem****************************************************************************************************
14541.651Slukem*   ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
14551.731Sdan*
14561.651Slukem*   @brief
14571.688Sjonathan*       Output structure for AddrComputeFmaskCoordFromAddr
14581.898Sgdamore****************************************************************************************************
14591.922Splunky*/
14601.1023Stshiozaktypedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
14611.651Slukem{
14621.813Sskrll    UINT_32 size;       ///< Size of this structure in bytes
14631.651Slukem
14641.651Slukem    UINT_32 x;          ///< X coordinate
14651.651Slukem    UINT_32 y;          ///< Y coordinate
14661.697Stsarna    UINT_32 slice;      ///< Slice index
14671.651Slukem    UINT_32 plane;      ///< Plane number
14681.965Sxtraeme    UINT_32 sample;     ///< Sample index (fragment index for EQAA)
14691.651Slukem} ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT;
14701.907Smartin
14711.651Slukem/**
14721.651Slukem****************************************************************************************************
14731.651Slukem*   AddrComputeFmaskCoordFromAddr
14741.651Slukem*
14751.651Slukem*   @brief
14761.808Saugustss*       Compute FMASK coordinate from an given address
14771.651Slukem****************************************************************************************************
14781.651Slukem*/
14791.651SlukemADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
14801.651Slukem    ADDR_HANDLE                                     hLib,
14811.779Sitohy    const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT*   pIn,
14821.651Slukem    ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT*        pOut);
14831.651Slukem
14841.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
14851.651Slukem//                          Element/utility functions
14861.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
14871.651Slukem
14881.651Slukem/**
14891.651Slukem****************************************************************************************************
14901.651Slukem*   AddrGetVersion
14911.651Slukem*
14921.651Slukem*   @brief
14931.651Slukem*       Get AddrLib version number
14941.651Slukem****************************************************************************************************
14951.651Slukem*/
14961.651SlukemUINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib);
14971.651Slukem
14981.1002Sdogcow/**
14991.651Slukem****************************************************************************************************
15001.651Slukem*   AddrUseTileIndex
15011.873Sscw*
15021.651Slukem*   @brief
15031.651Slukem*       Return TRUE if tileIndex is enabled in this address library
15041.651Slukem****************************************************************************************************
15051.651Slukem*/
15061.651SlukemBOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib);
15071.651Slukem
15081.651Slukem/**
15091.651Slukem****************************************************************************************************
15101.651Slukem*   AddrUseCombinedSwizzle
15111.651Slukem*
15121.651Slukem*   @brief
15131.651Slukem*       Return TRUE if combined swizzle is enabled in this address library
15141.651Slukem****************************************************************************************************
15151.651Slukem*/
15161.651SlukemBOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib);
15171.651Slukem
15181.651Slukem/**
15191.651Slukem****************************************************************************************************
15201.651Slukem*   ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
15211.651Slukem*
15221.651Slukem*   @brief
15231.651Slukem*       Input structure of AddrExtractBankPipeSwizzle
15241.651Slukem****************************************************************************************************
15251.651Slukem*/
15261.651Slukemtypedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
15271.651Slukem{
15281.651Slukem    UINT_32         size;           ///< Size of this structure in bytes
15291.651Slukem
15301.651Slukem    UINT_32         base256b;       ///< Base256b value
15311.651Slukem
15321.651Slukem    /// r800 and later HWL parameters
15331.651Slukem    ADDR_TILEINFO*  pTileInfo;      ///< 2D tile parameters. Client must provide all data
15341.651Slukem
15351.651Slukem    INT_32          tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
15361.651Slukem                                    ///  while the global useTileIndex is set to 1
15371.651Slukem    INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
15381.651Slukem                                    ///< README: When tileIndex is not -1, this must be valid
15391.651Slukem} ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT;
15401.651Slukem
15411.992Splunky/**
15421.651Slukem****************************************************************************************************
15431.651Slukem*   ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
15441.651Slukem*
15451.651Slukem*   @brief
15461.651Slukem*       Output structure of AddrExtractBankPipeSwizzle
15471.651Slukem****************************************************************************************************
15481.992Splunky*/
15491.650Slukemtypedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
15501.651Slukem{
15511.651Slukem    UINT_32 size;           ///< Size of this structure in bytes
15521.651Slukem
15531.651Slukem    UINT_32 bankSwizzle;    ///< Bank swizzle
15541.651Slukem    UINT_32 pipeSwizzle;    ///< Pipe swizzle
15551.651Slukem} ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT;
15561.651Slukem
15571.651Slukem/**
15581.651Slukem****************************************************************************************************
15591.651Slukem*   AddrExtractBankPipeSwizzle
15601.780Sblymn*
15611.785Swiz*   @brief
15621.651Slukem*       Extract Bank and Pipe swizzle from base256b
15631.762Sjdolecek*   @return
15641.985Swiz*       ADDR_OK if no error
15651.651Slukem****************************************************************************************************
15661.651Slukem*/
15671.969SxtraemeADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle(
15681.856Schristos    ADDR_HANDLE                                 hLib,
15691.857Schristos    const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT*  pIn,
15701.651Slukem    ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT*       pOut);
15711.651Slukem
15721.651Slukem/**
15731.651Slukem****************************************************************************************************
15741.651Slukem*   ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
15751.651Slukem*
15761.651Slukem*   @brief
15771.651Slukem*       Input structure of AddrCombineBankPipeSwizzle
15781.651Slukem****************************************************************************************************
15791.651Slukem*/
15801.918Ssimonbtypedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
15811.651Slukem{
15821.651Slukem    UINT_32         size;           ///< Size of this structure in bytes
15831.651Slukem
15841.651Slukem    UINT_32         bankSwizzle;    ///< Bank swizzle
15851.651Slukem    UINT_32         pipeSwizzle;    ///< Pipe swizzle
15861.651Slukem    UINT_64         baseAddr;       ///< Base address (leave it zero for driver clients)
15871.651Slukem
15881.651Slukem    /// r800 and later HWL parameters
15891.651Slukem    ADDR_TILEINFO*  pTileInfo;      ///< 2D tile parameters. Client must provide all data
15901.651Slukem
15911.651Slukem    INT_32          tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
15921.651Slukem                                    ///  while the global useTileIndex is set to 1
15931.651Slukem    INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
15941.651Slukem                                    ///< README: When tileIndex is not -1, this must be valid
15951.651Slukem} ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT;
15961.675Smrg
15971.859Sdyoung/**
15981.651Slukem****************************************************************************************************
15991.1004Sjnemeth*   ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
16001.651Slukem*
16011.651Slukem*   @brief
16021.651Slukem*       Output structure of AddrCombineBankPipeSwizzle
16031.651Slukem****************************************************************************************************
16041.651Slukem*/
16051.651Slukemtypedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
16061.1006Skiyohara{
16071.651Slukem    UINT_32 size;           ///< Size of this structure in bytes
16081.651Slukem
16091.651Slukem    UINT_32 tileSwizzle;    ///< Combined swizzle
16101.932Swiz} ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT;
16111.651Slukem
16121.651Slukem/**
16131.651Slukem****************************************************************************************************
16141.1036Sjmmv*   AddrCombineBankPipeSwizzle
16151.1014Sadrianp*
16161.914Stron*   @brief
16171.684Sheas*       Combine Bank and Pipe swizzle
16181.651Slukem*   @return
16191.651Slukem*       ADDR_OK if no error
16201.985Swiz*   @note
16211.651Slukem*       baseAddr here is full MCAddress instead of base256b
16221.651Slukem****************************************************************************************************
16231.684Sheas*/
16241.651SlukemADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle(
16251.651Slukem    ADDR_HANDLE                                 hLib,
16261.651Slukem    const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT*  pIn,
16271.651Slukem    ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT*       pOut);
16281.651Slukem
16291.651Slukem/**
16301.651Slukem****************************************************************************************************
16311.651Slukem*   ADDR_COMPUTE_SLICESWIZZLE_INPUT
16321.651Slukem*
16331.651Slukem*   @brief
16341.651Slukem*       Input structure of AddrComputeSliceSwizzle
16351.651Slukem****************************************************************************************************
16361.651Slukem*/
16371.651Slukemtypedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT
16381.651Slukem{
16391.1028Sxtraeme    UINT_32         size;               ///< Size of this structure in bytes
16401.651Slukem
16411.651Slukem    AddrTileMode    tileMode;           ///< Tile Mode
16421.804Srtr    UINT_32         baseSwizzle;        ///< Base tile swizzle
16431.651Slukem    UINT_32         slice;              ///< Slice index
16441.651Slukem    UINT_64         baseAddr;           ///< Base address, driver should leave it 0 in most cases
16451.651Slukem
16461.651Slukem    /// r800 and later HWL parameters
16471.651Slukem    ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Actually banks needed here!
16481.651Slukem
16491.816Srpaulo    INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
16501.651Slukem                                        ///  while the global useTileIndex is set to 1
16511.651Slukem    INT_32          macroModeIndex;     ///< Index in macro tile mode table if there is one (CI)
16521.684Sheas                                        ///< README: When tileIndex is not -1, this must be valid
16531.651Slukem} ADDR_COMPUTE_SLICESWIZZLE_INPUT;
16541.985Swiz
16551.651Slukem/**
16561.651Slukem****************************************************************************************************
16571.651Slukem*   ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
16581.651Slukem*
16591.651Slukem*   @brief
16601.651Slukem*       Output structure of AddrComputeSliceSwizzle
16611.650Slukem****************************************************************************************************
16621.650Slukem*/
16631.651Slukemtypedef struct _ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
16641.651Slukem{
16651.650Slukem    UINT_32  size;           ///< Size of this structure in bytes
16661.651Slukem
16671.651Slukem    UINT_32  tileSwizzle;    ///< Recalculated tileSwizzle value
16681.651Slukem} ADDR_COMPUTE_SLICESWIZZLE_OUTPUT;
16691.651Slukem
16701.763Speter/**
16711.763Speter****************************************************************************************************
16721.763Speter*   AddrComputeSliceSwizzle
16731.802Swiz*
16741.763Speter*   @brief
16751.763Speter*       Extract Bank and Pipe swizzle from base256b
16761.763Speter*   @return
16771.651Slukem*       ADDR_OK if no error
16781.763Speter****************************************************************************************************
16791.651Slukem*/
16801.651SlukemADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle(
16811.651Slukem    ADDR_HANDLE                             hLib,
16821.867Schristos    const ADDR_COMPUTE_SLICESWIZZLE_INPUT*  pIn,
16831.867Schristos    ADDR_COMPUTE_SLICESWIZZLE_OUTPUT*       pOut);
16841.867Schristos
16851.867Schristos/**
16861.651Slukem****************************************************************************************************
16871.651Slukem*   AddrSwizzleGenOption
16881.651Slukem*
16891.651Slukem*   @brief
16901.651Slukem*       Which swizzle generating options: legacy or linear
16911.651Slukem****************************************************************************************************
16921.716Stshiozak*/
16931.659Sitohytypedef enum _AddrSwizzleGenOption
16941.753Stron{
16951.651Slukem    ADDR_SWIZZLE_GEN_DEFAULT    = 0,    ///< As is in client driver implemention for swizzle
16961.651Slukem    ADDR_SWIZZLE_GEN_LINEAR     = 1,    ///< Using a linear increment of swizzle
16971.651Slukem} AddrSwizzleGenOption;
16981.651Slukem
16991.651Slukem/**
17001.816Srpaulo****************************************************************************************************
17011.651Slukem*   AddrSwizzleOption
17021.651Slukem*
17031.651Slukem*   @brief
17041.651Slukem*       Controls how swizzle is generated
17051.651Slukem****************************************************************************************************
17061.651Slukem*/
17071.651Slukemtypedef union _ADDR_SWIZZLE_OPTION
17081.651Slukem{
17091.651Slukem    struct
17101.651Slukem    {
17111.651Slukem        UINT_32 genOption       : 1;    ///< The way swizzle is generated, see AddrSwizzleGenOption
17121.816Srpaulo        UINT_32 reduceBankBit   : 1;    ///< TRUE if we need reduce swizzle bits
17131.841Swiz        UINT_32 reserved        :30;    ///< Reserved bits
17141.651Slukem    };
17151.651Slukem
17161.766Sthorpej    UINT_32 value;
17171.651Slukem
17181.651Slukem} ADDR_SWIZZLE_OPTION;
17191.650Slukem
17201.651Slukem/**
17211.864Sjwise****************************************************************************************************
17221.864Sjwise*   ADDR_COMPUTE_BASE_SWIZZLE_INPUT
17231.864Sjwise*
17241.802Swiz*   @brief
17251.952Schristos*       Input structure of AddrComputeBaseSwizzle
17261.650Slukem****************************************************************************************************
17271.650Slukem*/
17281.881Sdillotypedef struct _ADDR_COMPUTE_BASE_SWIZZLE_INPUT
17291.723Slukem{
17301.650Slukem    UINT_32             size;           ///< Size of this structure in bytes
17311.651Slukem
17321.651Slukem    ADDR_SWIZZLE_OPTION option;         ///< Swizzle option
17331.651Slukem    UINT_32             surfIndex;      ///< Index of this surface type
17341.759Schristos    AddrTileMode        tileMode;       ///< Tile Mode
17351.651Slukem
17361.651Slukem    /// r800 and later HWL parameters
17371.651Slukem    ADDR_TILEINFO*      pTileInfo;      ///< 2D tile parameters. Actually banks needed here!
17381.651Slukem
17391.950Schristos    INT_32              tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
17401.651Slukem                                        ///  while the global useTileIndex is set to 1
17411.651Slukem    INT_32              macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
17421.695Schristos                                        ///< README: When tileIndex is not -1, this must be valid
17431.708Swiz} ADDR_COMPUTE_BASE_SWIZZLE_INPUT;
17441.651Slukem
17451.787Slukem/**
17461.650Slukem****************************************************************************************************
17471.651Slukem*   ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
17481.651Slukem*
17491.651Slukem*   @brief
17501.650Slukem*       Output structure of AddrComputeBaseSwizzle
17511.777Sjwise****************************************************************************************************
17521.651Slukem*/
17531.651Slukemtypedef struct _ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
17541.651Slukem{
17551.1027Sreed    UINT_32 size;           ///< Size of this structure in bytes
17561.651Slukem
17571.899Smrg    UINT_32 tileSwizzle;    ///< Combined swizzle
17581.651Slukem} ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT;
17591.651Slukem
17601.651Slukem/**
17611.651Slukem****************************************************************************************************
17621.651Slukem*   AddrComputeBaseSwizzle
17631.651Slukem*
17641.651Slukem*   @brief
17651.650Slukem*       Return a Combined Bank and Pipe swizzle base on surface based on surface type/index
17661.651Slukem*   @return
17671.651Slukem*       ADDR_OK if no error
17681.651Slukem****************************************************************************************************
17691.651Slukem*/
17701.650SlukemADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle(
17711.651Slukem    ADDR_HANDLE                             hLib,
17721.651Slukem    const ADDR_COMPUTE_BASE_SWIZZLE_INPUT*  pIn,
17731.651Slukem    ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT*       pOut);
17741.833Sscw
17751.651Slukem/**
17761.651Slukem****************************************************************************************************
17771.651Slukem*   ELEM_GETEXPORTNORM_INPUT
17781.651Slukem*
17791.650Slukem*   @brief
17801.651Slukem*       Input structure for ElemGetExportNorm
17811.1036Sjmmv*
17821.651Slukem****************************************************************************************************
17831.651Slukem*/
17841.651Slukemtypedef struct _ELEM_GETEXPORTNORM_INPUT
17851.651Slukem{
17861.651Slukem    UINT_32             size;       ///< Size of this structure in bytes
17871.651Slukem
17881.651Slukem    AddrColorFormat     format;     ///< Color buffer format; Client should use ColorFormat
17891.650Slukem    AddrSurfaceNumber   num;        ///< Surface number type; Client should use NumberType
17901.651Slukem    AddrSurfaceSwap     swap;       ///< Surface swap byte swap; Client should use SurfaceSwap
17911.650Slukem    UINT_32             numSamples; ///< Number of samples
17921.650Slukem} ELEM_GETEXPORTNORM_INPUT;
17931.651Slukem
17941.981Swiz/**
17951.939Selad****************************************************************************************************
17961.651Slukem*  ElemGetExportNorm
17971.651Slukem*
17981.789Sperry*   @brief
17991.651Slukem*       Helper function to check one format can be EXPORT_NUM, which is a register
18001.651Slukem*       CB_COLOR_INFO.SURFACE_FORMAT. FP16 can be reported as EXPORT_NORM for rv770 in r600
18011.658Schristos*       family
18021.651Slukem*   @note
18031.956Spavel*       The implementation is only for r600.
18041.651Slukem*       00 - EXPORT_FULL: PS exports are 4 pixels with 4 components with 32-bits-per-component. (two
18051.977Sapb*       clocks per export)
18061.651Slukem*       01 - EXPORT_NORM: PS exports are 4 pixels with 4 components with 16-bits-per-component. (one
18071.651Slukem*       clock per export)
18081.650Slukem*
18091.651Slukem****************************************************************************************************
18101.651Slukem*/
18111.650SlukemBOOL_32 ADDR_API ElemGetExportNorm(
18121.650Slukem    ADDR_HANDLE                     hLib,
18131.662Sperry    const ELEM_GETEXPORTNORM_INPUT* pIn);
18141.662Sperry
18151.650Slukem/**
18161.967Schristos****************************************************************************************************
18171.651Slukem*   ELEM_FLT32TODEPTHPIXEL_INPUT
18181.651Slukem*
18191.650Slukem*   @brief
18201.650Slukem*       Input structure for addrFlt32ToDepthPixel
18211.650Slukem*
18221.651Slukem****************************************************************************************************
18231.650Slukem*/
18241.650Slukemtypedef struct _ELEM_FLT32TODEPTHPIXEL_INPUT
18251.650Slukem{
18261.651Slukem    UINT_32         size;           ///< Size of this structure in bytes
18271.651Slukem
18281.651Slukem    AddrDepthFormat format;         ///< Depth buffer format
18291.651Slukem    ADDR_FLT_32     comps[2];       ///< Component values (Z/stencil)
18301.650Slukem} ELEM_FLT32TODEPTHPIXEL_INPUT;
18311.650Slukem
18321.650Slukem/**
18331.651Slukem****************************************************************************************************
18341.651Slukem*   ELEM_FLT32TODEPTHPIXEL_INPUT
18351.651Slukem*
18361.651Slukem*   @brief
18371.650Slukem*       Output structure for ElemFlt32ToDepthPixel
18381.968Stron*
18391.651Slukem****************************************************************************************************
18401.911Sbouyer*/
18411.815Srpaulotypedef struct _ELEM_FLT32TODEPTHPIXEL_OUTPUT
18421.651Slukem{
18431.651Slukem    UINT_32 size;           ///< Size of this structure in bytes
18441.982Sdillo
18451.650Slukem    UINT_8* pPixel;         ///< Real depth value. Same data type as depth buffer.
18461.650Slukem                            ///  Client must provide enough storage for this type.
18471.650Slukem    UINT_32 depthBase;      ///< Tile base in bits for depth bits
18481.650Slukem    UINT_32 stencilBase;    ///< Tile base in bits for stencil bits
18491.650Slukem    UINT_32 depthBits;      ///< Bits for depth
18501.650Slukem    UINT_32 stencilBits;    ///< Bits for stencil
18511.650Slukem} ELEM_FLT32TODEPTHPIXEL_OUTPUT;
18521.650Slukem
18531.650Slukem/**
18541.650Slukem****************************************************************************************************
18551.651Slukem*   ElemFlt32ToDepthPixel
18561.651Slukem*
18571.650Slukem*   @brief
18581.651Slukem*       Convert a FLT_32 value to a depth/stencil pixel value
18591.651Slukem*
18601.651Slukem*   @return
18611.651Slukem*       Return code
18621.651Slukem*
18631.650Slukem****************************************************************************************************
18641.651Slukem*/
18651.865SjwiseADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel(
18661.651Slukem    ADDR_HANDLE                         hLib,
18671.651Slukem    const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
18681.650Slukem    ELEM_FLT32TODEPTHPIXEL_OUTPUT*      pOut);
18691.650Slukem
18701.997Sbouyer/**
18711.954Selad****************************************************************************************************
18721.651Slukem*   ELEM_FLT32TOCOLORPIXEL_INPUT
18731.651Slukem*
18741.651Slukem*   @brief
18751.651Slukem*       Input structure for addrFlt32ToColorPixel
18761.651Slukem*
18771.650Slukem****************************************************************************************************
18781.651Slukem*/
18791.651Slukemtypedef struct _ELEM_FLT32TOCOLORPIXEL_INPUT
18801.898Sgdamore{
18811.919Splunky    UINT_32            size;           ///< Size of this structure in bytes
18821.919Splunky
18831.898Sgdamore    AddrColorFormat    format;         ///< Color buffer format
18841.975Skiyohara    AddrSurfaceNumber  surfNum;        ///< Surface number
18851.651Slukem    AddrSurfaceSwap    surfSwap;       ///< Surface swap
18861.650Slukem    ADDR_FLT_32        comps[4];       ///< Component values (r/g/b/a)
18871.650Slukem} ELEM_FLT32TOCOLORPIXEL_INPUT;
18881.651Slukem
18891.650Slukem/**
18901.650Slukem****************************************************************************************************
18911.651Slukem*   ELEM_FLT32TOCOLORPIXEL_INPUT
18921.651Slukem*
18931.651Slukem*   @brief
18941.651Slukem*       Output structure for ElemFlt32ToColorPixel
18951.651Slukem*
18961.651Slukem****************************************************************************************************
18971.651Slukem*/
18981.651Slukemtypedef struct _ELEM_FLT32TOCOLORPIXEL_OUTPUT
18991.669Sfair{
19001.651Slukem    UINT_32 size;       ///< Size of this structure in bytes
19011.650Slukem
19021.893Schap    UINT_8* pPixel;     ///< Real color value. Same data type as color buffer.
19031.994Splunky                        ///  Client must provide enough storage for this type.
19041.651Slukem} ELEM_FLT32TOCOLORPIXEL_OUTPUT;
19051.651Slukem
19061.651Slukem/**
19071.651Slukem****************************************************************************************************
19081.651Slukem*   ElemFlt32ToColorPixel
19091.651Slukem*
19101.651Slukem*   @brief
19111.651Slukem*       Convert a FLT_32 value to a red/green/blue/alpha pixel value
19121.651Slukem*
19131.651Slukem*   @return
19141.651Slukem*       Return code
19151.651Slukem*
19161.651Slukem****************************************************************************************************
19171.651Slukem*/
19181.651SlukemADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel(
19191.651Slukem    ADDR_HANDLE                         hLib,
19201.1018Sad    const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn,
19211.651Slukem    ELEM_FLT32TOCOLORPIXEL_OUTPUT*      pOut);
19221.909Slukem
19231.651Slukem/**
19241.651Slukem****************************************************************************************************
19251.651Slukem*   ElemSize
19261.651Slukem*
19271.651Slukem*   @brief
19281.651Slukem*       Get bits-per-element for specified format
19291.815Srpaulo*
19301.651Slukem*   @return
19311.651Slukem*       Bits-per-element of specified format
19321.651Slukem*
19331.651Slukem****************************************************************************************************
19341.979Smartin*/
19351.651SlukemUINT_32 ADDR_API ElemSize(
19361.838Schristos    ADDR_HANDLE hLib,
19371.843Schristos    AddrFormat  format);
19381.843Schristos
19391.838Schristos/**
19401.650Slukem****************************************************************************************************
19411.651Slukem*   ADDR_CONVERT_TILEINFOTOHW_INPUT
19421.650Slukem*
19431.720Sdrochner*   @brief
19441.651Slukem*       Input structure for AddrConvertTileInfoToHW
19451.651Slukem*   @note
19461.651Slukem*       When reverse is TRUE, indices are igonred
19471.651Slukem****************************************************************************************************
19481.895Schristos*/
19491.651Slukemtypedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT
19501.651Slukem{
19511.651Slukem    UINT_32         size;               ///< Size of this structure in bytes
19521.651Slukem    BOOL_32         reverse;            ///< Convert control flag.
19531.651Slukem                                        ///  FALSE: convert from real value to HW value;
19541.651Slukem                                        ///  TRUE: convert from HW value to real value.
19551.650Slukem
19561.650Slukem    /// r800 and later HWL parameters
19571.650Slukem    ADDR_TILEINFO*  pTileInfo;          ///< Tile parameters with real value
19581.650Slukem
19591.650Slukem    INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
19601.650Slukem                                        ///  while the global useTileIndex is set to 1
19611.650Slukem    INT_32          macroModeIndex;     ///< Index in macro tile mode table if there is one (CI)
19621.650Slukem                                        ///< README: When tileIndex is not -1, this must be valid
19631.995Sdyoung    UINT_32         bpp;                ///< Bits per pixel
19641.995Sdyoung} ADDR_CONVERT_TILEINFOTOHW_INPUT;
19651.819Sthorpej
19661.751Slukem/**
19671.651Slukem****************************************************************************************************
19681.651Slukem*   ADDR_CONVERT_TILEINFOTOHW_OUTPUT
19691.651Slukem*
19701.651Slukem*   @brief
19711.651Slukem*       Output structure for AddrConvertTileInfoToHW
19721.651Slukem****************************************************************************************************
19731.651Slukem*/
19741.651Slukemtypedef struct _ADDR_CONVERT_TILEINFOTOHW_OUTPUT
19751.651Slukem{
19761.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
19771.651Slukem
19781.651Slukem    /// r800 and later HWL parameters
19791.651Slukem    ADDR_TILEINFO*      pTileInfo;          ///< Tile parameters with hardware register value
19801.651Slukem
19811.651Slukem} ADDR_CONVERT_TILEINFOTOHW_OUTPUT;
19821.864Sjwise
19831.651Slukem/**
19841.996Sagc****************************************************************************************************
19851.802Swiz*   AddrConvertTileInfoToHW
19861.809Swiz*
19871.651Slukem*   @brief
19881.651Slukem*       Convert tile info from real value to hardware register value
19891.650Slukem****************************************************************************************************
19901.651Slukem*/
19911.831SjmcneillADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW(
19921.942Schristos    ADDR_HANDLE                             hLib,
19931.650Slukem    const ADDR_CONVERT_TILEINFOTOHW_INPUT*  pIn,
19941.650Slukem    ADDR_CONVERT_TILEINFOTOHW_OUTPUT*       pOut);
19951.651Slukem
19961.651Slukem/**
19971.651Slukem****************************************************************************************************
19981.651Slukem*   ADDR_CONVERT_TILEINDEX_INPUT
19991.651Slukem*
20001.651Slukem*   @brief
20011.651Slukem*       Input structure for AddrConvertTileIndex
20021.651Slukem****************************************************************************************************
20031.875Srpaulo*/
20041.875Srpaulotypedef struct _ADDR_CONVERT_TILEINDEX_INPUT
20051.650Slukem{
20061.651Slukem    UINT_32         size;               ///< Size of this structure in bytes
20071.651Slukem
20081.651Slukem    INT_32          tileIndex;          ///< Tile index
20091.650Slukem    INT_32          macroModeIndex;     ///< Index in macro tile mode table if there is one (CI)
20101.650Slukem    UINT_32         bpp;                ///< Bits per pixel
20111.718Swiz    BOOL_32         tileInfoHw;         ///< Set to TRUE if client wants HW enum, otherwise actual
20121.650Slukem} ADDR_CONVERT_TILEINDEX_INPUT;
20131.650Slukem
20141.859Sdyoung/**
20151.650Slukem****************************************************************************************************
20161.679Suwe*   ADDR_CONVERT_TILEINDEX_OUTPUT
20171.650Slukem*
20181.651Slukem*   @brief
20191.650Slukem*       Output structure for AddrConvertTileIndex
20201.651Slukem****************************************************************************************************
20211.650Slukem*/
20221.680Suwetypedef struct _ADDR_CONVERT_TILEINDEX_OUTPUT
20231.650Slukem{
20241.651Slukem    UINT_32             size;           ///< Size of this structure in bytes
20251.651Slukem
20261.650Slukem    AddrTileMode        tileMode;       ///< Tile mode
20271.1029Stls    AddrTileType        tileType;       ///< Tile type
20281.650Slukem    ADDR_TILEINFO*      pTileInfo;      ///< Tile info
20291.650Slukem
20301.650Slukem} ADDR_CONVERT_TILEINDEX_OUTPUT;
20311.650Slukem
20321.651Slukem/**
20331.651Slukem****************************************************************************************************
20341.651Slukem*   AddrConvertTileIndex
20351.651Slukem*
20361.650Slukem*   @brief
20371.650Slukem*       Convert tile index to tile mode/type/info
20381.650Slukem****************************************************************************************************
20391.650Slukem*/
20401.859SdyoungADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex(
20411.850Sjmmv    ADDR_HANDLE                         hLib,
20421.651Slukem    const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
20431.650Slukem    ADDR_CONVERT_TILEINDEX_OUTPUT*      pOut);
20441.650Slukem
20451.650Slukem/**
20461.651Slukem****************************************************************************************************
20471.650Slukem*   ADDR_GET_MACROMODEINDEX_INPUT
20481.650Slukem*
20491.651Slukem*   @brief
20501.651Slukem*       Input structure for AddrGetMacroModeIndex
20511.751Slukem****************************************************************************************************
20521.651Slukem*/
20531.651Slukemtypedef struct _ADDR_GET_MACROMODEINDEX_INPUT
20541.651Slukem{
20551.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
20561.651Slukem    ADDR_SURFACE_FLAGS  flags;              ///< Surface flag
20571.651Slukem    INT_32              tileIndex;          ///< Tile index
20581.651Slukem    UINT_32             bpp;                ///< Bits per pixel
20591.763Speter    UINT_32             numFrags;           ///< Number of color fragments
20601.763Speter} ADDR_GET_MACROMODEINDEX_INPUT;
20611.763Speter
20621.763Speter/**
20631.763Speter****************************************************************************************************
20641.763Speter*   ADDR_GET_MACROMODEINDEX_OUTPUT
20651.651Slukem*
20661.721Slukem*   @brief
20671.651Slukem*       Output structure for AddrGetMacroModeIndex
20681.651Slukem****************************************************************************************************
20691.899Smrg*/
20701.651Slukemtypedef struct _ADDR_GET_MACROMODEINDEX_OUTPUT
20711.651Slukem{
20721.651Slukem    UINT_32             size;            ///< Size of this structure in bytes
20731.651Slukem    INT_32              macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
20741.651Slukem} ADDR_GET_MACROMODEINDEX_OUTPUT;
20751.650Slukem
20761.651Slukem/**
20771.752Sskrll****************************************************************************************************
20781.651Slukem*   AddrGetMacroModeIndex
20791.651Slukem*
20801.651Slukem*   @brief
20811.651Slukem*       Get macro mode index based on input parameters
20821.650Slukem****************************************************************************************************
20831.651Slukem*/
20841.651SlukemADDR_E_RETURNCODE ADDR_API AddrGetMacroModeIndex(
20851.651Slukem    ADDR_HANDLE                          hLib,
20861.650Slukem    const ADDR_GET_MACROMODEINDEX_INPUT* pIn,
20871.651Slukem    ADDR_GET_MACROMODEINDEX_OUTPUT*      pOut);
20881.651Slukem
20891.651Slukem/**
20901.651Slukem****************************************************************************************************
20911.840Schristos*   ADDR_CONVERT_TILEINDEX1_INPUT
20921.840Schristos*
20931.651Slukem*   @brief
20941.651Slukem*       Input structure for AddrConvertTileIndex1 (without macro mode index)
20951.834Shubertf****************************************************************************************************
20961.651Slukem*/
20971.927Sadtypedef struct _ADDR_CONVERT_TILEINDEX1_INPUT
20981.651Slukem{
20991.651Slukem    UINT_32         size;               ///< Size of this structure in bytes
21001.650Slukem
21011.650Slukem    INT_32          tileIndex;          ///< Tile index
21021.694Schristos    UINT_32         bpp;                ///< Bits per pixel
21031.650Slukem    UINT_32         numSamples;         ///< Number of samples
21041.651Slukem    BOOL_32         tileInfoHw;         ///< Set to TRUE if client wants HW enum, otherwise actual
21051.650Slukem} ADDR_CONVERT_TILEINDEX1_INPUT;
21061.650Slukem
21071.651Slukem/**
21081.650Slukem****************************************************************************************************
21091.651Slukem*   AddrConvertTileIndex1
21101.651Slukem*
21111.651Slukem*   @brief
21121.897Stron*       Convert tile index to tile mode/type/info
21131.895Schristos****************************************************************************************************
21141.651Slukem*/
21151.651SlukemADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1(
21161.651Slukem    ADDR_HANDLE                             hLib,
21171.977Sapb    const ADDR_CONVERT_TILEINDEX1_INPUT*    pIn,
21181.651Slukem    ADDR_CONVERT_TILEINDEX_OUTPUT*          pOut);
21191.651Slukem
21201.895Schristos/**
21211.651Slukem****************************************************************************************************
21221.651Slukem*   ADDR_GET_TILEINDEX_INPUT
21231.651Slukem*
21241.650Slukem*   @brief
21251.651Slukem*       Input structure for AddrGetTileIndex
21261.651Slukem****************************************************************************************************
21271.651Slukem*/
21281.651Slukemtypedef struct _ADDR_GET_TILEINDEX_INPUT
21291.650Slukem{
21301.650Slukem    UINT_32         size;           ///< Size of this structure in bytes
21311.651Slukem
21321.651Slukem    AddrTileMode    tileMode;       ///< Tile mode
21331.651Slukem    AddrTileType    tileType;       ///< Tile-type: disp/non-disp/...
21341.651Slukem    ADDR_TILEINFO*  pTileInfo;      ///< Pointer to tile-info structure, can be NULL for linear/1D
21351.787Slukem} ADDR_GET_TILEINDEX_INPUT;
21361.651Slukem
21371.650Slukem/**
21381.650Slukem****************************************************************************************************
21391.651Slukem*   ADDR_GET_TILEINDEX_OUTPUT
21401.651Slukem*
21411.651Slukem*   @brief
21421.651Slukem*       Output structure for AddrGetTileIndex
21431.651Slukem****************************************************************************************************
21441.993Spooka*/
21451.651Slukemtypedef struct _ADDR_GET_TILEINDEX_OUTPUT
21461.651Slukem{
21471.1012Srumble    UINT_32         size;           ///< Size of this structure in bytes
21481.651Slukem
21491.651Slukem    INT_32          index;          ///< index in table
21501.651Slukem} ADDR_GET_TILEINDEX_OUTPUT;
21511.651Slukem
21521.983Sdillo/**
21531.983Sdillo****************************************************************************************************
21541.651Slukem*   AddrGetTileIndex
21551.651Slukem*
21561.651Slukem*   @brief
21571.651Slukem*       Get the tiling mode index in table
21581.651Slukem****************************************************************************************************
21591.651Slukem*/
21601.651SlukemADDR_E_RETURNCODE ADDR_API AddrGetTileIndex(
21611.651Slukem    ADDR_HANDLE                     hLib,
21621.651Slukem    const ADDR_GET_TILEINDEX_INPUT* pIn,
21631.651Slukem    ADDR_GET_TILEINDEX_OUTPUT*      pOut);
21641.966Spooka
21651.732Schristos/**
21661.651Slukem****************************************************************************************************
21671.1019Spooka*   ADDR_PRT_INFO_INPUT
21681.844Stsutsui*
21691.822Sjmmv*   @brief
21701.849Sreinoud*       Input structure for AddrComputePrtInfo
21711.651Slukem****************************************************************************************************
21721.651Slukem*/
21731.651Slukemtypedef struct _ADDR_PRT_INFO_INPUT
21741.651Slukem{
21751.651Slukem    AddrFormat          format;        ///< Surface format
21761.651Slukem    UINT_32             baseMipWidth;  ///< Base mipmap width
21771.651Slukem    UINT_32             baseMipHeight; ///< Base mipmap height
21781.651Slukem    UINT_32             baseMipDepth;  ///< Base mipmap depth
21791.651Slukem    UINT_32             numFrags;      ///< Number of fragments,
21801.650Slukem} ADDR_PRT_INFO_INPUT;
21811.651Slukem
21821.650Slukem/**
21831.651Slukem****************************************************************************************************
21841.651Slukem*   ADDR_PRT_INFO_OUTPUT
21851.650Slukem*
21861.650Slukem*   @brief
21871.650Slukem*       Input structure for AddrComputePrtInfo
21881.733Swiz****************************************************************************************************
21891.838Schristos*/
21901.838Schristostypedef struct _ADDR_PRT_INFO_OUTPUT
21911.733Swiz{
21921.651Slukem    UINT_32             prtTileWidth;
21931.733Swiz    UINT_32             prtTileHeight;
21941.733Swiz} ADDR_PRT_INFO_OUTPUT;
21951.835Sjmc
21961.651Slukem/**
21971.733Swiz****************************************************************************************************
21981.879Stron*   AddrComputePrtInfo
21991.751Slukem*
22001.651Slukem*   @brief
22011.651Slukem*       Compute prt surface related information
22021.650Slukem****************************************************************************************************
22031.650Slukem*/
22041.651SlukemADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
22051.651Slukem    ADDR_HANDLE                 hLib,
22061.651Slukem    const ADDR_PRT_INFO_INPUT*  pIn,
22071.651Slukem    ADDR_PRT_INFO_OUTPUT*       pOut);
22081.844Stsutsui
22091.650Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
22101.650Slukem//                                     DCC key functions
22111.650Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
22121.650Slukem
22131.650Slukem/**
22141.651Slukem****************************************************************************************************
22151.650Slukem*   _ADDR_COMPUTE_DCCINFO_INPUT
22161.651Slukem*
22171.650Slukem*   @brief
22181.651Slukem*       Input structure of AddrComputeDccInfo
22191.650Slukem****************************************************************************************************
22201.651Slukem*/
22211.651Slukemtypedef struct _ADDR_COMPUTE_DCCINFO_INPUT
22221.733Swiz{
22231.651Slukem    UINT_32             size;            ///< Size of this structure in bytes
22241.651Slukem    UINT_32             bpp;             ///< BitPP of color surface
22251.669Sfair    UINT_32             numSamples;      ///< Sample number of color surface
22261.985Swiz    UINT_64             colorSurfSize;   ///< Size of color surface to which dcc key is bound
22271.651Slukem    AddrTileMode        tileMode;        ///< Tile mode of color surface
22281.651Slukem    ADDR_TILEINFO       tileInfo;        ///< Tile info of color surface
22291.651Slukem    UINT_32             tileSwizzle;     ///< Tile swizzle
22301.651Slukem    INT_32              tileIndex;       ///< Tile index of color surface,
22311.651Slukem                                         ///< MUST be -1 if you don't want to use it
22321.651Slukem                                         ///< while the global useTileIndex is set to 1
22331.934Smacallan    INT_32              macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
22341.650Slukem                                         ///< README: When tileIndex is not -1, this must be valid
22351.650Slukem} ADDR_COMPUTE_DCCINFO_INPUT;
22361.684Sheas
22371.651Slukem/**
22381.765Sthorpej****************************************************************************************************
22391.828Stsarna*   ADDR_COMPUTE_DCCINFO_OUTPUT
22401.753Stron*
22411.753Stron*   @brief
22421.753Stron*       Output structure of AddrComputeDccInfo
22431.753Stron****************************************************************************************************
22441.753Stron*/
22451.753Strontypedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT
22461.753Stron{
22471.753Stron    UINT_32 size;                 ///< Size of this structure in bytes
22481.753Stron    UINT_32 dccRamBaseAlign;      ///< Base alignment of dcc key
22491.753Stron    UINT_64 dccRamSize;           ///< Size of dcc key
22501.753Stron    UINT_64 dccFastClearSize;     ///< Size of dcc key portion that can be fast cleared
22511.753Stron    BOOL_32 subLvlCompressible;   ///< Whether sub resource is compressiable
22521.753Stron    BOOL_32 dccRamSizeAligned;    ///< Whether the dcc key size is aligned
22531.760Schristos} ADDR_COMPUTE_DCCINFO_OUTPUT;
22541.753Stron
22551.753Stron/**
22561.753Stron****************************************************************************************************
22571.753Stron*   AddrComputeDccInfo
22581.774Snakayama*
22591.768Schristos*   @brief
22601.753Stron*       Compute DCC key size, base alignment
22611.971Selad*       info
22621.650Slukem****************************************************************************************************
22631.651Slukem*/
22641.650SlukemADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
22651.651Slukem    ADDR_HANDLE                             hLib,
22661.651Slukem    const ADDR_COMPUTE_DCCINFO_INPUT*       pIn,
22671.651Slukem    ADDR_COMPUTE_DCCINFO_OUTPUT*            pOut);
22681.651Slukem
22691.864Sjwise/**
22701.864Sjwise****************************************************************************************************
22711.802Swiz*   ADDR_GET_MAX_ALINGMENTS_OUTPUT
22721.802Swiz*
22731.802Swiz*   @brief
22741.802Swiz*       Output structure of AddrGetMaxAlignments
22751.651Slukem****************************************************************************************************
22761.650Slukem*/
22771.650Slukemtypedef struct _ADDR_GET_MAX_ALINGMENTS_OUTPUT
22781.651Slukem{
22791.787Slukem    UINT_32 size;                   ///< Size of this structure in bytes
22801.651Slukem    UINT_32 baseAlign;              ///< Maximum base alignment in bytes
22811.650Slukem} ADDR_GET_MAX_ALINGMENTS_OUTPUT;
22821.650Slukem
22831.650Slukem/**
22841.651Slukem****************************************************************************************************
22851.650Slukem*   AddrGetMaxAlignments
22861.650Slukem*
22871.650Slukem*   @brief
22881.1030Sgarbled*       Gets maximnum alignments
22891.650Slukem****************************************************************************************************
22901.650Slukem*/
22911.771SwizADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
22921.651Slukem    ADDR_HANDLE                     hLib,
22931.651Slukem    ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut);
22941.651Slukem
22951.650Slukem/**
22961.651Slukem****************************************************************************************************
22971.651Slukem*   AddrGetMaxMetaAlignments
22981.651Slukem*
22991.896Stron*   @brief
23001.650Slukem*       Gets maximnum alignments for metadata
23011.985Swiz****************************************************************************************************
23021.650Slukem*/
23031.869SgarbledADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments(
23041.651Slukem    ADDR_HANDLE                     hLib,
23051.651Slukem    ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut);
23061.651Slukem
23071.651Slukem/**
23081.651Slukem****************************************************************************************************
23091.651Slukem*                                Address library interface version 2
23101.877Schristos*                                    available from Gfx9 hardware
23111.651Slukem****************************************************************************************************
23121.651Slukem*     Addr2ComputeSurfaceInfo()
23131.651Slukem*     Addr2ComputeSurfaceAddrFromCoord()
23141.651Slukem*     Addr2ComputeSurfaceCoordFromAddr()
23151.651Slukem
23161.758Sthorpej*     Addr2ComputeHtileInfo()
23171.651Slukem*     Addr2ComputeHtileAddrFromCoord()
23181.651Slukem*     Addr2ComputeHtileCoordFromAddr()
23191.651Slukem*
23201.651Slukem*     Addr2ComputeCmaskInfo()
23211.651Slukem*     Addr2ComputeCmaskAddrFromCoord()
23221.651Slukem*     Addr2ComputeCmaskCoordFromAddr()
23231.651Slukem*
23241.651Slukem*     Addr2ComputeFmaskInfo()
23251.651Slukem*     Addr2ComputeFmaskAddrFromCoord()
23261.650Slukem*     Addr2ComputeFmaskCoordFromAddr()
23271.651Slukem*
23281.651Slukem*     Addr2ComputeDccInfo()
23291.651Slukem*
23301.651Slukem**/
23311.651Slukem
23321.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
23331.781Sperseant//                                    Surface functions for Gfx9
23341.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
23351.651Slukem
23361.985Swiz/**
23371.651Slukem****************************************************************************************************
23381.751Slukem*   ADDR2_SURFACE_FLAGS
23391.651Slukem*
23401.950Schristos*   @brief
23411.651Slukem*       Surface flags
23421.701Sitojun****************************************************************************************************
23431.694Schristos*/
23441.651Slukemtypedef union _ADDR2_SURFACE_FLAGS
23451.651Slukem{
23461.787Slukem    struct
23471.651Slukem    {
23481.651Slukem        UINT_32 color             :  1; ///< This resource is a color buffer, can be used with RTV
23491.651Slukem        UINT_32 depth             :  1; ///< Thie resource is a depth buffer, can be used with DSV
23501.651Slukem        UINT_32 stencil           :  1; ///< Thie resource is a stencil buffer, can be used with DSV
23511.651Slukem        UINT_32 fmask             :  1; ///< This is an fmask surface
23521.651Slukem        UINT_32 overlay           :  1; ///< This is an overlay surface
23531.651Slukem        UINT_32 display           :  1; ///< This resource is displable, can be used with DRV
23541.651Slukem        UINT_32 prt               :  1; ///< This is a partially resident texture
23551.651Slukem        UINT_32 qbStereo          :  1; ///< This is a quad buffer stereo surface
23561.651Slukem        UINT_32 interleaved       :  1; ///< Special flag for interleaved YUV surface padding
23571.651Slukem        UINT_32 texture           :  1; ///< This resource can be used with SRV
23581.651Slukem        UINT_32 unordered         :  1; ///< This resource can be used with UAV
23591.651Slukem        UINT_32 rotated           :  1; ///< This resource is rotated and displable
23601.651Slukem        UINT_32 needEquation      :  1; ///< This resource needs equation to be generated if possible
23611.651Slukem        UINT_32 opt4space         :  1; ///< This resource should be optimized for space
23621.651Slukem        UINT_32 minimizeAlign     :  1; ///< This resource should use minimum alignment
23631.651Slukem        UINT_32 noMetadata        :  1; ///< This resource has no metadata
23641.787Slukem        UINT_32 metaRbUnaligned   :  1; ///< This resource has rb unaligned metadata
23651.651Slukem        UINT_32 metaPipeUnaligned :  1; ///< This resource has pipe unaligned metadata
23661.751Slukem        UINT_32 view3dAs2dArray   :  1; ///< This resource is a 3D resource viewed as 2D array
23671.751Slukem        UINT_32 reserved          : 13; ///< Reserved bits
23681.651Slukem    };
23691.651Slukem
23701.651Slukem    UINT_32 value;
23711.651Slukem} ADDR2_SURFACE_FLAGS;
23721.650Slukem
23731.650Slukem/**
23741.651Slukem****************************************************************************************************
23751.650Slukem*   ADDR2_COMPUTE_SURFACE_INFO_INPUT
23761.650Slukem*
23771.815Srpaulo*   @brief
23781.792Sxtraeme*       Input structure for Addr2ComputeSurfaceInfo
23791.825Sxtraeme****************************************************************************************************
23801.651Slukem*/
23811.898Sgdamoretypedef struct _ADDR2_COMPUTE_SURFACE_INFO_INPUT
23821.944Selad{
23831.895Schristos    UINT_32               size;              ///< Size of this structure in bytes
23841.915Schristos
23851.651Slukem    ADDR2_SURFACE_FLAGS   flags;             ///< Surface flags
23861.651Slukem    AddrSwizzleMode       swizzleMode;       ///< Swizzle Mode for Gfx9
23871.651Slukem    AddrResourceType      resourceType;      ///< Surface type
23881.651Slukem    AddrFormat            format;            ///< Surface format
23891.651Slukem    UINT_32               bpp;               ///< bits per pixel
23901.985Swiz    UINT_32               width;             ///< Width (of mip0), in pixels
23911.963Srumble    UINT_32               height;            ///< Height (of mip0), in pixels
23921.650Slukem    UINT_32               numSlices;         ///< Number surface slice/depth (of mip0),
23931.963Srumble    UINT_32               numMipLevels;      ///< Total mipmap levels.
23941.650Slukem    UINT_32               numSamples;        ///< Number of samples
23951.650Slukem    UINT_32               numFrags;          ///< Number of fragments, leave it zero or the same as
23961.651Slukem                                             ///  number of samples for normal AA; Set it to the
23971.651Slukem                                             ///  number of fragments for EQAA
23981.651Slukem    UINT_32               pitchInElement;    ///< Pitch in elements (blocks for compressed formats)
23991.651Slukem    UINT_32               sliceAlign;        ///< Required slice size in bytes
24001.908Stsutsui} ADDR2_COMPUTE_SURFACE_INFO_INPUT;
24011.651Slukem
24021.866Swiz/**
24031.895Schristos****************************************************************************************************
24041.651Slukem*   ADDR2_MIP_INFO
24051.651Slukem*
24061.776Sjwise*   @brief
24071.776Sjwise*       Structure that contains information for mip level
24081.776Sjwise*
24091.778Sjwise****************************************************************************************************
24101.650Slukem*/
24111.651Slukemtypedef struct _ADDR2_MIP_INFO
24121.651Slukem{
24131.650Slukem    UINT_32             pitch;              ///< Pitch in elements
24141.650Slukem    UINT_32             height;             ///< Padded height in elements
24151.651Slukem    UINT_32             depth;              ///< Padded depth
24161.650Slukem    UINT_32             pixelPitch;         ///< Pitch in pixels
24171.651Slukem    UINT_32             pixelHeight;        ///< Padded height in pixels
24181.650Slukem    UINT_32             equationIndex;      ///< Equation index in the equation table
24191.650Slukem    UINT_64             offset;             ///< Offset in bytes from mip base, should only be used
24201.651Slukem                                            ///< to setup vam surface descriptor, can't be used
24211.651Slukem                                            ///< to setup swizzle pattern
24221.651Slukem    UINT_64             macroBlockOffset;   ///< macro block offset in bytes from mip base
24231.651Slukem    UINT_32             mipTailOffset;      ///< mip tail offset in bytes
24241.651Slukem    UINT_32             mipTailCoordX;      ///< mip tail coord x
24251.651Slukem    UINT_32             mipTailCoordY;      ///< mip tail coord y
24261.651Slukem    UINT_32             mipTailCoordZ;      ///< mip tail coord z
24271.650Slukem} ADDR2_MIP_INFO;
24281.651Slukem
24291.651Slukem/**
24301.837Sriz****************************************************************************************************
24311.658Schristos*   ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
24321.651Slukem*
24331.650Slukem*   @brief
24341.651Slukem*       Output structure for Addr2ComputeSurfInfo
24351.650Slukem*   @note
24361.650Slukem        Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch
24371.651Slukem        Pixel: Original pixel
24381.650Slukem****************************************************************************************************
24391.650Slukem*/
24401.650Slukemtypedef struct _ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
24411.650Slukem{
24421.651Slukem    UINT_32             size;                 ///< Size of this structure in bytes
24431.651Slukem
24441.651Slukem    UINT_32             pitch;                ///< Pitch in elements (blocks for compressed formats)
24451.651Slukem    UINT_32             height;               ///< Padded height (of mip0) in elements
24461.853Schristos    UINT_32             numSlices;            ///< Padded depth for 3d resource
24471.1012Srumble                                              ///< or padded number of slices for 2d array resource
24481.651Slukem    UINT_32             mipChainPitch;        ///< Pitch (of total mip chain) in elements
24491.651Slukem    UINT_32             mipChainHeight;       ///< Padded height (of total mip chain) in elements
24501.651Slukem    UINT_32             mipChainSlice;        ///< Padded depth (of total mip chain)
24511.650Slukem    UINT_64             sliceSize;            ///< Slice (total mip chain) size in bytes
24521.651Slukem    UINT_64             surfSize;             ///< Surface (total mip chain) size in bytes
24531.987Sapb    UINT_32             baseAlign;            ///< Base address alignment
24541.651Slukem    UINT_32             bpp;                  ///< Bits per elements
24551.651Slukem                                              ///  (e.g. blocks for BCn, 1/3 for 96bit)
24561.651Slukem    UINT_32             pixelMipChainPitch;   ///< Mip chain pitch in original pixels
24571.651Slukem    UINT_32             pixelMipChainHeight;  ///< Mip chain height in original pixels
24581.651Slukem    UINT_32             pixelPitch;           ///< Pitch in original pixels
24591.1010Schristos    UINT_32             pixelHeight;          ///< Height in original pixels
24601.651Slukem    UINT_32             pixelBits;            ///< Original bits per pixel, passed from input
24611.651Slukem
24621.651Slukem    UINT_32             blockWidth;           ///< Width in element inside one block
24631.651Slukem    UINT_32             blockHeight;          ///< Height in element inside one block
24641.651Slukem    UINT_32             blockSlices;          ///< Slice number inside one block
24651.903Smrg                                              ///< Prt tile is one block, its width/height/slice
24661.651Slukem                                              ///< equals to blcok width/height/slice
24671.684Sheas
24681.651Slukem    BOOL_32             epitchIsHeight;       ///< Whether to use height to program epitch register
24691.788Slukem    /// Stereo info
24701.651Slukem    ADDR_QBSTEREOINFO*  pStereoInfo;          ///< Stereo info, needed if qbStereo flag is TRUE
24711.651Slukem    /// Mip info
24721.925Smatt    ADDR2_MIP_INFO*     pMipInfo;             ///< Pointer to mip information array
24731.651Slukem                                              ///  if it is not NULL, the array is assumed to
24741.651Slukem                                              ///  contain numMipLevels entries
24751.651Slukem
24761.651Slukem    UINT_32             equationIndex;        ///< Equation index in the equation table of mip0
24771.650Slukem    BOOL_32             mipChainInTail;       ///< If whole mipchain falls into mip tail block
24781.650Slukem    UINT_32             firstMipIdInTail;     ///< The id of first mip in tail, if there is no mip
24791.651Slukem                                              ///  in tail, it will be set to number of mip levels
24801.651Slukem} ADDR2_COMPUTE_SURFACE_INFO_OUTPUT;
24811.651Slukem
24821.651Slukem/**
24831.651Slukem****************************************************************************************************
24841.651Slukem*   Addr2ComputeSurfaceInfo
24851.651Slukem*
24861.950Schristos*   @brief
24871.950Schristos*       Compute surface width/height/slices/alignments and suitable tiling mode
24881.950Schristos****************************************************************************************************
24891.950Schristos*/
24901.650SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo(
24911.651Slukem    ADDR_HANDLE                                hLib,
24921.651Slukem    const ADDR2_COMPUTE_SURFACE_INFO_INPUT*    pIn,
24931.651Slukem    ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*         pOut);
24941.651Slukem
24951.650Slukem/**
24961.650Slukem****************************************************************************************************
24971.651Slukem*   ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
24981.985Swiz*
24991.650Slukem*   @brief
25001.686Slukem*       Input structure for Addr2ComputeSurfaceAddrFromCoord
25011.651Slukem****************************************************************************************************
25021.856Schristos*/
25031.651Slukemtypedef struct _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
25041.940Selad{
25051.651Slukem    UINT_32             size;            ///< Size of this structure in bytes
25061.650Slukem
25071.651Slukem    UINT_32             x;               ///< X coordinate
25081.650Slukem    UINT_32             y;               ///< Y coordinate
25091.650Slukem    UINT_32             slice;           ///< Slice index
25101.651Slukem    UINT_32             sample;          ///< Sample index, use fragment index for EQAA
25111.651Slukem    UINT_32             mipId;           ///< the mip ID in mip chain
25121.651Slukem
25131.651Slukem    AddrSwizzleMode     swizzleMode;     ///< Swizzle mode for Gfx9
25141.714Sdyoung    ADDR2_SURFACE_FLAGS flags;           ///< Surface flags
25151.833Sscw    AddrResourceType    resourceType;    ///< Surface type
25161.888Sdyoung    UINT_32             bpp;             ///< Bits per pixel
25171.833Sscw    UINT_32             unalignedWidth;  ///< Surface original width (of mip0)
25181.651Slukem    UINT_32             unalignedHeight; ///< Surface original height (of mip0)
25191.651Slukem    UINT_32             numSlices;       ///< Surface original slices (of mip0)
25201.651Slukem    UINT_32             numMipLevels;    ///< Total mipmap levels
25211.651Slukem    UINT_32             numSamples;      ///< Number of samples
25221.651Slukem    UINT_32             numFrags;        ///< Number of fragments, leave it zero or the same as
25231.650Slukem                                         ///  number of samples for normal AA; Set it to the
25241.651Slukem                                         ///  number of fragments for EQAA
25251.651Slukem
25261.651Slukem    UINT_32             pipeBankXor;     ///< Combined swizzle used to do bank/pipe rotation
25271.650Slukem    UINT_32             pitchInElement;  ///< Pitch in elements (blocks for compressed formats)
25281.651Slukem} ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT;
25291.651Slukem
25301.651Slukem/**
25311.651Slukem****************************************************************************************************
25321.650Slukem*   ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
25331.650Slukem*
25341.650Slukem*   @brief
25351.650Slukem*       Output structure for Addr2ComputeSurfaceAddrFromCoord
25361.651Slukem****************************************************************************************************
25371.651Slukem*/
25381.651Slukemtypedef struct _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
25391.651Slukem{
25401.651Slukem    UINT_32    size;             ///< Size of this structure in bytes
25411.651Slukem
25421.651Slukem    UINT_64    addr;             ///< Byte address
25431.651Slukem    UINT_32    bitPosition;      ///< Bit position within surfaceAddr, 0-7.
25441.651Slukem                                 ///  For surface bpp < 8, e.g. FMT_1.
25451.651Slukem    UINT_32    prtBlockIndex;    ///< Index of a PRT tile (64K block)
25461.651Slukem} ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT;
25471.651Slukem
25481.651Slukem/**
25491.650Slukem****************************************************************************************************
25501.651Slukem*   Addr2ComputeSurfaceAddrFromCoord
25511.651Slukem*
25521.651Slukem*   @brief
25531.651Slukem*       Compute surface address from a given coordinate.
25541.650Slukem****************************************************************************************************
25551.651Slukem*/
25561.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord(
25571.651Slukem    ADDR_HANDLE                                         hLib,
25581.651Slukem    const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT*    pIn,
25591.651Slukem    ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*         pOut);
25601.1035Sjmmv
25611.1035Sjmmv/**
25621.1035Sjmmv****************************************************************************************************
25631.1035Sjmmv*   ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
25641.1035Sjmmv*
25651.1035Sjmmv*   @brief
25661.1036Sjmmv*       Input structure for Addr2ComputeSurfaceCoordFromAddr
25671.1035Sjmmv****************************************************************************************************
25681.651Slukem*/
25691.651Slukemtypedef struct _ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
25701.651Slukem{
25711.651Slukem    UINT_32             size;            ///< Size of this structure in bytes
25721.651Slukem
25731.1014Sadrianp    UINT_64             addr;            ///< Address in bytes
25741.651Slukem    UINT_32             bitPosition;     ///< Bit position in addr. 0-7. for surface bpp < 8,
25751.651Slukem                                         ///  e.g. FMT_1;
25761.651Slukem
25771.651Slukem    AddrSwizzleMode     swizzleMode;     ///< Swizzle mode for Gfx9
25781.651Slukem    ADDR2_SURFACE_FLAGS flags;           ///< Surface flags
25791.651Slukem    AddrResourceType    resourceType;    ///< Surface type
25801.651Slukem    UINT_32             bpp;             ///< Bits per pixel
25811.651Slukem    UINT_32             unalignedWidth;  ///< Surface original width (of mip0)
25821.651Slukem    UINT_32             unalignedHeight; ///< Surface original height (of mip0)
25831.898Sgdamore    UINT_32             numSlices;       ///< Surface original slices (of mip0)
25841.1033Splunky    UINT_32             numMipLevels;    ///< Total mipmap levels.
25851.898Sgdamore    UINT_32             numSamples;      ///< Number of samples
25861.651Slukem    UINT_32             numFrags;        ///< Number of fragments, leave it zero or the same as
25871.651Slukem                                         ///  number of samples for normal AA; Set it to the
25881.651Slukem                                         ///  number of fragments for EQAA
25891.651Slukem
25901.651Slukem    UINT_32             pipeBankXor;     ///< Combined swizzle used to do bank/pipe rotation
25911.651Slukem    UINT_32             pitchInElement;  ///< Pitch in elements (blocks for compressed formats)
25921.651Slukem} ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT;
25931.651Slukem
25941.651Slukem/**
25951.651Slukem****************************************************************************************************
25961.651Slukem*   ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
25971.651Slukem*
25981.651Slukem*   @brief
25991.651Slukem*       Output structure for Addr2ComputeSurfaceCoordFromAddr
26001.651Slukem****************************************************************************************************
26011.651Slukem*/
26021.651Slukemtypedef struct _ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
26031.651Slukem{
26041.651Slukem    UINT_32    size;       ///< Size of this structure in bytes
26051.651Slukem
26061.651Slukem    UINT_32    x;          ///< X coordinate
26071.651Slukem    UINT_32    y;          ///< Y coordinate
26081.651Slukem    UINT_32    slice;      ///< Index of slices
26091.651Slukem    UINT_32    sample;     ///< Index of samples, means fragment index for EQAA
26101.651Slukem    UINT_32    mipId;      ///< mipmap level id
26111.651Slukem} ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT;
26121.651Slukem
26131.651Slukem/**
26141.651Slukem****************************************************************************************************
26151.651Slukem*   Addr2ComputeSurfaceCoordFromAddr
26161.651Slukem*
26171.891Sriz*   @brief
26181.651Slukem*       Compute coordinate from a given surface address
26191.651Slukem****************************************************************************************************
26201.933Schristos*/
26211.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr(
26221.894Sdan    ADDR_HANDLE                                         hLib,
26231.651Slukem    const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT*    pIn,
26241.651Slukem    ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*         pOut);
26251.651Slukem
26261.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
26271.651Slukem//                                   HTile functions for Gfx9
26281.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
26291.799Sperry
26301.651Slukem/**
26311.651Slukem****************************************************************************************************
26321.651Slukem*   ADDR2_META_FLAGS
26331.651Slukem*
26341.651Slukem*   @brief
26351.651Slukem*       Metadata flags
26361.733Swiz****************************************************************************************************
26371.733Swiz*/
26381.651Slukemtypedef union _ADDR2_META_FLAGS
26391.1014Sadrianp{
26401.651Slukem    struct
26411.651Slukem    {
26421.651Slukem        UINT_32 pipeAligned :  1;    ///< if Metadata being pipe aligned
26431.651Slukem        UINT_32 rbAligned   :  1;    ///< if Metadata being RB aligned
26441.651Slukem        UINT_32 linear      :  1;    ///< if Metadata linear, GFX9 does not suppord this!
26451.651Slukem        UINT_32 reserved    : 29;    ///< Reserved bits
26461.651Slukem    };
26471.651Slukem
26481.651Slukem    UINT_32 value;
26491.651Slukem} ADDR2_META_FLAGS;
26501.651Slukem
26511.651Slukem/**
26521.651Slukem****************************************************************************************************
26531.651Slukem*   ADDR2_META_MIP_INFO
26541.651Slukem*
26551.651Slukem*   @brief
26561.651Slukem*       Structure to store per mip metadata information
26571.651Slukem****************************************************************************************************
26581.651Slukem*/
26591.651Slukemtypedef struct _ADDR2_META_MIP_INFO
26601.651Slukem{
26611.651Slukem    BOOL_32    inMiptail;
26621.651Slukem    union
26631.651Slukem    {
26641.651Slukem        struct
26651.650Slukem        {
26661.891Sriz            UINT_32    startX;
26671.651Slukem            UINT_32    startY;
26681.651Slukem            UINT_32    startZ;
26691.734Slukem            UINT_32    width;
26701.742Sthorpej            UINT_32    height;
26711.651Slukem            UINT_32    depth;
26721.802Swiz        };
26731.985Swiz
26741.651Slukem        struct
26751.817Srpaulo        {
26761.651Slukem            UINT_32    offset;      ///< Metadata offset within one slice,
26771.651Slukem                                    ///  the thickness of a slice is meta block depth.
26781.651Slukem            UINT_32    sliceSize;   ///< Metadata size within one slice,
26791.651Slukem                                    ///  the thickness of a slice is meta block depth.
26801.651Slukem        };
26811.651Slukem    };
26821.651Slukem} ADDR2_META_MIP_INFO;
26831.651Slukem
26841.651Slukem/**
26851.651Slukem****************************************************************************************************
26861.651Slukem*   ADDR2_COMPUTE_HTILE_INFO_INPUT
26871.817Srpaulo*
26881.650Slukem*   @brief
26891.650Slukem*       Input structure of Addr2ComputeHtileInfo
26901.650Slukem****************************************************************************************************
26911.650Slukem*/
26921.650Slukemtypedef struct _ADDR2_COMPUTE_HTILE_INFO_INPUT
26931.650Slukem{
26941.650Slukem    UINT_32             size;               ///< Size of this structure in bytes
26951.650Slukem
26961.650Slukem    ADDR2_META_FLAGS    hTileFlags;         ///< HTILE flags
26971.650Slukem    ADDR2_SURFACE_FLAGS depthFlags;         ///< Depth surface flags
26981.651Slukem    AddrSwizzleMode     swizzleMode;        ///< Depth surface swizzle mode
26991.651Slukem    UINT_32             unalignedWidth;     ///< Depth surface original width (of mip0)
27001.651Slukem    UINT_32             unalignedHeight;    ///< Depth surface original height (of mip0)
27011.651Slukem    UINT_32             numSlices;          ///< Number of slices of depth surface (of mip0)
27021.651Slukem    UINT_32             numMipLevels;       ///< Total mipmap levels of color surface
27031.713Swiz    UINT_32             firstMipIdInTail;   ///  Id of the first mip in tail,
27041.651Slukem                                            ///  if no mip is in tail, it should be set to
27051.651Slukem                                            ///  number of mip levels
27061.651Slukem} ADDR2_COMPUTE_HTILE_INFO_INPUT;
27071.651Slukem
27081.651Slukem/**
27091.651Slukem****************************************************************************************************
27101.763Speter*   ADDR2_COMPUTE_HTILE_INFO_OUTPUT
27111.763Speter*
27121.763Speter*   @brief
27131.763Speter*       Output structure of Addr2ComputeHtileInfo
27141.651Slukem****************************************************************************************************
27151.651Slukem*/
27161.651Slukemtypedef struct _ADDR2_COMPUTE_HTILE_INFO_OUTPUT
27171.651Slukem{
27181.651Slukem    UINT_32    size;                ///< Size of this structure in bytes
27191.650Slukem
27201.710Sdan    UINT_32    pitch;               ///< Pitch in pixels of depth buffer represented in this
27211.651Slukem                                    ///  HTile buffer. This might be larger than original depth
27221.651Slukem                                    ///  buffer pitch when called with an unaligned pitch.
27231.651Slukem    UINT_32    height;              ///< Height in pixels, as above
27241.787Slukem    UINT_32    baseAlign;           ///< Base alignment
27251.651Slukem    UINT_32    sliceSize;           ///< Slice size, in bytes.
27261.651Slukem    UINT_32    htileBytes;          ///< Size of HTILE buffer, in bytes
27271.651Slukem    UINT_32    metaBlkWidth;        ///< Meta block width
27281.651Slukem    UINT_32    metaBlkHeight;       ///< Meta block height
27291.651Slukem    UINT_32    metaBlkNumPerSlice;  ///< Number of metablock within one slice
27301.651Slukem
27311.651Slukem    ADDR2_META_MIP_INFO* pMipInfo;  ///< HTILE mip information
27321.651Slukem} ADDR2_COMPUTE_HTILE_INFO_OUTPUT;
27331.651Slukem
27341.651Slukem/**
27351.651Slukem****************************************************************************************************
27361.651Slukem*   Addr2ComputeHtileInfo
27371.651Slukem*
27381.651Slukem*   @brief
27391.651Slukem*       Compute Htile pitch, height, base alignment and size in bytes
27401.651Slukem****************************************************************************************************
27411.651Slukem*/
27421.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo(
27431.651Slukem    ADDR_HANDLE                              hLib,
27441.651Slukem    const ADDR2_COMPUTE_HTILE_INFO_INPUT*    pIn,
27451.651Slukem    ADDR2_COMPUTE_HTILE_INFO_OUTPUT*         pOut);
27461.651Slukem
27471.651Slukem/**
27481.651Slukem****************************************************************************************************
27491.651Slukem*   ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
27501.651Slukem*
27511.651Slukem*   @brief
27521.651Slukem*       Input structure for Addr2ComputeHtileAddrFromCoord
27531.802Swiz****************************************************************************************************
27541.742Sthorpej*/
27551.651Slukemtypedef struct _ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
27561.651Slukem{
27571.651Slukem    UINT_32             size;                ///< Size of this structure in bytes
27581.896Stron
27591.651Slukem    UINT_32             x;                   ///< X coordinate
27601.651Slukem    UINT_32             y;                   ///< Y coordinate
27611.651Slukem    UINT_32             slice;               ///< Index of slices
27621.651Slukem    UINT_32             mipId;               ///< mipmap level id
27631.651Slukem
27641.651Slukem    ADDR2_META_FLAGS    hTileFlags;          ///< HTILE flags
27651.651Slukem    ADDR2_SURFACE_FLAGS depthflags;          ///< Depth surface flags
27661.651Slukem    AddrSwizzleMode     swizzleMode;         ///< Depth surface swizzle mode
27671.651Slukem    UINT_32             bpp;                 ///< Depth surface bits per pixel
27681.651Slukem    UINT_32             unalignedWidth;      ///< Depth surface original width (of mip0)
27691.651Slukem    UINT_32             unalignedHeight;     ///< Depth surface original height (of mip0)
27701.651Slukem    UINT_32             numSlices;           ///< Depth surface original depth (of mip0)
27711.651Slukem    UINT_32             numMipLevels;        ///< Depth surface total mipmap levels
27721.651Slukem    UINT_32             numSamples;          ///< Depth surface number of samples
27731.763Speter    UINT_32             pipeXor;             ///< Pipe xor setting
27741.651Slukem} ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT;
27751.651Slukem
27761.650Slukem/**
27771.651Slukem****************************************************************************************************
27781.651Slukem*   ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
27791.651Slukem*
27801.651Slukem*   @brief
27811.651Slukem*       Output structure for Addr2ComputeHtileAddrFromCoord
27821.651Slukem****************************************************************************************************
27831.786Schristos*/
27841.786Schristostypedef struct _ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
27851.786Schristos{
27861.786Schristos    UINT_32    size;    ///< Size of this structure in bytes
27871.786Schristos
27881.786Schristos    UINT_64    addr;    ///< Address in bytes
27891.786Schristos} ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT;
27901.786Schristos
27911.786Schristos/**
27921.786Schristos****************************************************************************************************
27931.651Slukem*   Addr2ComputeHtileAddrFromCoord
27941.786Schristos*
27951.786Schristos*   @brief
27961.651Slukem*       Compute Htile address according to coordinates (of depth buffer)
27971.651Slukem****************************************************************************************************
27981.651Slukem*/
27991.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord(
28001.896Stron    ADDR_HANDLE                                       hLib,
28011.1009Sginsbach    const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT*    pIn,
28021.651Slukem    ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*         pOut);
28031.651Slukem
28041.651Slukem/**
28051.651Slukem****************************************************************************************************
28061.651Slukem*   ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
28071.651Slukem*
28081.651Slukem*   @brief
28091.651Slukem*       Input structure for Addr2ComputeHtileCoordFromAddr
28101.651Slukem****************************************************************************************************
28111.651Slukem*/
28121.651Slukemtypedef struct _ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
28131.651Slukem{
28141.651Slukem    UINT_32             size;                ///< Size of this structure in bytes
28151.651Slukem
28161.651Slukem    UINT_64             addr;                ///< Address
28171.651Slukem
28181.651Slukem    ADDR2_META_FLAGS    hTileFlags;          ///< HTILE flags
28191.839Schristos    ADDR2_SURFACE_FLAGS depthFlags;          ///< Depth surface flags
28201.839Schristos    AddrSwizzleMode     swizzleMode;         ///< Depth surface swizzle mode
28211.651Slukem    UINT_32             bpp;                 ///< Depth surface bits per pixel
28221.782Swiz    UINT_32             unalignedWidth;      ///< Depth surface original width (of mip0)
28231.651Slukem    UINT_32             unalignedHeight;     ///< Depth surface original height (of mip0)
28241.651Slukem    UINT_32             numSlices;           ///< Depth surface original depth (of mip0)
28251.651Slukem    UINT_32             numMipLevels;        ///< Depth surface total mipmap levels
28261.651Slukem    UINT_32             numSamples;          ///< Depth surface number of samples
28271.651Slukem    UINT_32             pipeXor;             ///< Pipe xor setting
28281.651Slukem} ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT;
28291.651Slukem
28301.651Slukem/**
28311.651Slukem****************************************************************************************************
28321.651Slukem*   ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
28331.651Slukem*
28341.651Slukem*   @brief
28351.651Slukem*       Output structure for Addr2ComputeHtileCoordFromAddr
28361.668Sgroo****************************************************************************************************
28371.651Slukem*/
28381.651Slukemtypedef struct _ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
28391.651Slukem{
28401.651Slukem    UINT_32    size;        ///< Size of this structure in bytes
28411.651Slukem
28421.651Slukem    UINT_32    x;           ///< X coordinate
28431.651Slukem    UINT_32    y;           ///< Y coordinate
28441.839Schristos    UINT_32    slice;       ///< Index of slices
28451.651Slukem    UINT_32    mipId;       ///< mipmap level id
28461.651Slukem} ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT;
28471.651Slukem
28481.651Slukem/**
28491.651Slukem****************************************************************************************************
28501.651Slukem*   Addr2ComputeHtileCoordFromAddr
28511.651Slukem*
28521.651Slukem*   @brief
28531.971Selad*       Compute coordinates within depth buffer (1st pixel of a micro tile) according to
28541.651Slukem*       Htile address
28551.650Slukem****************************************************************************************************
28561.651Slukem*/
28571.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr(
28581.651Slukem    ADDR_HANDLE                                       hLib,
28591.651Slukem    const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT*    pIn,
28601.651Slukem    ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*         pOut);
28611.651Slukem
28621.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
28631.651Slukem//                                     C-mask functions for Gfx9
28641.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
28651.651Slukem
28661.651Slukem/**
28671.651Slukem****************************************************************************************************
28681.651Slukem*   ADDR2_COMPUTE_CMASK_INFO_INPUT
28691.651Slukem*
28701.651Slukem*   @brief
28711.651Slukem*       Input structure of Addr2ComputeCmaskInfo
28721.651Slukem****************************************************************************************************
28731.651Slukem*/
28741.651Slukemtypedef struct _ADDR2_COMPUTE_CMASKINFO_INPUT
28751.651Slukem{
28761.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
28771.651Slukem
28781.651Slukem    ADDR2_META_FLAGS    cMaskFlags;         ///< CMASK flags
28791.651Slukem    ADDR2_SURFACE_FLAGS colorFlags;         ///< Color surface flags
28801.651Slukem    AddrResourceType    resourceType;       ///< Color surface type
28811.651Slukem    AddrSwizzleMode     swizzleMode;        ///< FMask surface swizzle mode
28821.650Slukem    UINT_32             unalignedWidth;     ///< Color surface original width
28831.651Slukem    UINT_32             unalignedHeight;    ///< Color surface original height
28841.651Slukem    UINT_32             numSlices;          ///< Number of slices of color buffer
28851.651Slukem} ADDR2_COMPUTE_CMASK_INFO_INPUT;
28861.902Swiz
28871.902Swiz/**
28881.651Slukem****************************************************************************************************
28891.651Slukem*   ADDR2_COMPUTE_CMASK_INFO_OUTPUT
28901.651Slukem*
28911.651Slukem*   @brief
28921.650Slukem*       Output structure of Addr2ComputeCmaskInfo
28931.651Slukem****************************************************************************************************
28941.651Slukem*/
28951.651Slukemtypedef struct _ADDR2_COMPUTE_CMASK_INFO_OUTPUT
28961.651Slukem{
28971.651Slukem    UINT_32    size;          ///< Size of this structure in bytes
28981.651Slukem
28991.651Slukem    UINT_32    pitch;         ///< Pitch in pixels of color buffer which
29001.651Slukem                              ///  this Cmask matches. The size might be larger than
29011.651Slukem                              ///  original color buffer pitch when called with
29021.651Slukem                              ///  an unaligned pitch.
29031.651Slukem    UINT_32    height;        ///< Height in pixels, as above
29041.651Slukem    UINT_32    baseAlign;     ///< Base alignment
29051.651Slukem    UINT_32    sliceSize;     ///< Slice size, in bytes.
29061.651Slukem    UINT_32    cmaskBytes;    ///< Size in bytes of CMask buffer
29071.898Sgdamore    UINT_32    metaBlkWidth;  ///< Meta block width
29081.651Slukem    UINT_32    metaBlkHeight; ///< Meta block height
29091.651Slukem
29101.651Slukem    UINT_32    metaBlkNumPerSlice; ///< Number of metablock within one slice
29111.651Slukem} ADDR2_COMPUTE_CMASK_INFO_OUTPUT;
29121.651Slukem
29131.742Sthorpej/**
29141.650Slukem****************************************************************************************************
29151.651Slukem*   Addr2ComputeCmaskInfo
29161.651Slukem*
29171.651Slukem*   @brief
29181.651Slukem*       Compute Cmask pitch, height, base alignment and size in bytes from color buffer
29191.651Slukem*       info
29201.651Slukem****************************************************************************************************
29211.651Slukem*/
29221.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo(
29231.651Slukem    ADDR_HANDLE                              hLib,
29241.651Slukem    const ADDR2_COMPUTE_CMASK_INFO_INPUT*    pIn,
29251.651Slukem    ADDR2_COMPUTE_CMASK_INFO_OUTPUT*         pOut);
29261.651Slukem
29271.898Sgdamore/**
29281.651Slukem****************************************************************************************************
29291.651Slukem*   ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
29301.896Stron*
29311.802Swiz*   @brief
29321.742Sthorpej*       Input structure for Addr2ComputeCmaskAddrFromCoord
29331.651Slukem*
29341.651Slukem****************************************************************************************************
29351.651Slukem*/
29361.651Slukemtypedef struct _ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
29371.651Slukem{
29381.651Slukem    UINT_32             size;                ///< Size of this structure in bytes
29391.651Slukem
29401.651Slukem    UINT_32             x;                   ///< X coordinate
29411.651Slukem    UINT_32             y;                   ///< Y coordinate
29421.651Slukem    UINT_32             slice;               ///< Index of slices
29431.651Slukem
29441.651Slukem    ADDR2_META_FLAGS    cMaskFlags;          ///< CMASK flags
29451.651Slukem    ADDR2_SURFACE_FLAGS colorFlags;          ///< Color surface flags
29461.767Satatat    AddrResourceType    resourceType;        ///< Color surface type
29471.651Slukem    AddrSwizzleMode     swizzleMode;         ///< FMask surface swizzle mode
29481.651Slukem
29491.799Sperry    UINT_32             unalignedWidth;      ///< Color surface original width (of mip0)
29501.651Slukem    UINT_32             unalignedHeight;     ///< Color surface original height (of mip0)
29511.970Ssborrill    UINT_32             numSlices;           ///< Color surface original slices (of mip0)
29521.651Slukem
29531.651Slukem    UINT_32             numSamples;          ///< Color surfae sample number
29541.651Slukem    UINT_32             numFrags;            ///< Color surface fragment number
29551.651Slukem
29561.651Slukem    UINT_32             pipeXor;             ///< pipe Xor setting
29571.651Slukem} ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT;
29581.651Slukem
29591.651Slukem/**
29601.651Slukem****************************************************************************************************
29611.651Slukem*   ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
29621.651Slukem*
29631.651Slukem*   @brief
29641.651Slukem*       Output structure for Addr2ComputeCmaskAddrFromCoord
29651.651Slukem****************************************************************************************************
29661.651Slukem*/
29671.651Slukemtypedef struct _ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
29681.651Slukem{
29691.651Slukem    UINT_32    size;           ///< Size of this structure in bytes
29701.651Slukem
29711.651Slukem    UINT_64    addr;           ///< CMASK address in bytes
29721.651Slukem    UINT_32    bitPosition;    ///< Bit position within addr, 0 or 4
29731.651Slukem} ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT;
29741.651Slukem
29751.651Slukem/**
29761.651Slukem****************************************************************************************************
29771.651Slukem*   Addr2ComputeCmaskAddrFromCoord
29781.654Slukem*
29791.651Slukem*   @brief
29801.651Slukem*       Compute Cmask address according to coordinates (of MSAA color buffer)
29811.651Slukem****************************************************************************************************
29821.651Slukem*/
29831.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord(
29841.651Slukem    ADDR_HANDLE                                      hLib,
29851.651Slukem    const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT*   pIn,
29861.651Slukem    ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*        pOut);
29871.650Slukem
29881.651Slukem/**
29891.651Slukem****************************************************************************************************
29901.651Slukem*   ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
29911.651Slukem*
29921.651Slukem*   @brief
29931.651Slukem*       Input structure for Addr2ComputeCmaskCoordFromAddr
29941.651Slukem****************************************************************************************************
29951.651Slukem*/
29961.651Slukemtypedef struct _ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
29971.651Slukem{
29981.651Slukem    UINT_32             size;                ///< Size of this structure in bytes
29991.873Sscw
30001.950Schristos    UINT_64             addr;                ///< CMASK address in bytes
30011.950Schristos    UINT_32             bitPosition;         ///< Bit position within addr, 0 or 4
30021.950Schristos
30031.725Sthorpej    ADDR2_META_FLAGS    cMaskFlags;          ///< CMASK flags
30041.950Schristos    ADDR2_SURFACE_FLAGS colorFlags;          ///< Color surface flags
30051.950Schristos    AddrResourceType    resourceType;        ///< Color surface type
30061.651Slukem    AddrSwizzleMode     swizzleMode;         ///< FMask surface swizzle mode
30071.651Slukem
30081.651Slukem    UINT_32             unalignedWidth;      ///< Color surface original width (of mip0)
30091.651Slukem    UINT_32             unalignedHeight;     ///< Color surface original height (of mip0)
30101.651Slukem    UINT_32             numSlices;           ///< Color surface original slices (of mip0)
30111.811Shubertf    UINT_32             numMipLevels;        ///< Color surface total mipmap levels.
30121.811Shubertf} ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT;
30131.651Slukem
30141.651Slukem/**
30151.651Slukem****************************************************************************************************
30161.651Slukem*   ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
30171.651Slukem*
30181.651Slukem*   @brief
30191.651Slukem*       Output structure for Addr2ComputeCmaskCoordFromAddr
30201.677Schristos****************************************************************************************************
30211.651Slukem*/
30221.651Slukemtypedef struct _ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
30231.651Slukem{
30241.651Slukem    UINT_32    size;        ///< Size of this structure in bytes
30251.651Slukem
30261.651Slukem    UINT_32    x;           ///< X coordinate
30271.651Slukem    UINT_32    y;           ///< Y coordinate
30281.651Slukem    UINT_32    slice;       ///< Index of slices
30291.651Slukem    UINT_32    mipId;       ///< mipmap level id
30301.651Slukem} ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT;
30311.651Slukem
30321.651Slukem/**
30331.786Schristos****************************************************************************************************
30341.651Slukem*   Addr2ComputeCmaskCoordFromAddr
30351.651Slukem*
30361.651Slukem*   @brief
30371.787Slukem*       Compute coordinates within color buffer (1st pixel of a micro tile) according to
30381.651Slukem*       Cmask address
30391.651Slukem****************************************************************************************************
30401.651Slukem*/
30411.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr(
30421.651Slukem    ADDR_HANDLE                                       hLib,
30431.651Slukem    const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT*    pIn,
30441.651Slukem    ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT*         pOut);
30451.651Slukem
30461.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
30471.651Slukem//                                     F-mask functions for Gfx9
30481.650Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
30491.650Slukem
30501.650Slukem/**
30511.650Slukem****************************************************************************************************
30521.650Slukem*   ADDR2_FMASK_FLAGS
30531.650Slukem*
30541.650Slukem*   @brief
30551.651Slukem*       FMASK flags
30561.796Swiz****************************************************************************************************
30571.651Slukem*/
30581.651Slukemtypedef union _ADDR2_FMASK_FLAGS
30591.651Slukem{
30601.651Slukem    struct
30611.651Slukem    {
30621.651Slukem        UINT_32 resolved :  1;    ///< TRUE if this is a resolved fmask, used by H/W clients
30631.651Slukem                                  ///  by H/W clients. S/W should always set it to FALSE.
30641.651Slukem        UINT_32 reserved : 31;    ///< Reserved for future use.
30651.945Sbjh21    };
30661.992Splunky
30671.946Sbjh21    UINT_32 value;
30681.651Slukem} ADDR2_FMASK_FLAGS;
30691.651Slukem
30701.651Slukem/**
30711.656Sbjh21****************************************************************************************************
30721.664Sbjh21*   ADDR2_COMPUTE_FMASK_INFO_INPUT
30731.651Slukem*
30741.651Slukem*   @brief
30751.651Slukem*       Input structure for Addr2ComputeFmaskInfo
30761.651Slukem****************************************************************************************************
30771.667Sbjh21*/
30781.921Sbjh21typedef struct _ADDR2_COMPUTE_FMASK_INFO_INPUT
30791.651Slukem{
30801.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
30811.651Slukem
30821.651Slukem    AddrSwizzleMode     swizzleMode;        ///< FMask surface swizzle mode
30831.664Sbjh21    UINT_32             unalignedWidth;     ///< Color surface original width
30841.946Sbjh21    UINT_32             unalignedHeight;    ///< Color surface original height
30851.651Slukem    UINT_32             numSlices;          ///< Number of slices/depth
30861.651Slukem    UINT_32             numSamples;         ///< Number of samples
30871.921Sbjh21    UINT_32             numFrags;           ///< Number of fragments, leave it zero or the same as
30881.651Slukem                                            ///  number of samples for normal AA; Set it to the
30891.923Sbjh21                                            ///  number of fragments for EQAA
30901.664Sbjh21    ADDR2_FMASK_FLAGS   fMaskFlags;         ///< FMASK flags
30911.651Slukem} ADDR2_COMPUTE_FMASK_INFO_INPUT;
30921.651Slukem
30931.651Slukem/**
30941.651Slukem****************************************************************************************************
30951.651Slukem*   ADDR2_COMPUTE_FMASK_INFO_OUTPUT
30961.651Slukem*
30971.651Slukem*   @brief
30981.651Slukem*       Output structure for Addr2ComputeFmaskInfo
30991.651Slukem****************************************************************************************************
31001.1000Smacallan*/
31011.1000Smacallantypedef struct _ADDR2_COMPUTE_FMASK_INFO_OUTPUT
31021.1000Smacallan{
31031.651Slukem    UINT_32    size;           ///< Size of this structure in bytes
31041.826Smacallan
31051.651Slukem    UINT_32    pitch;          ///< Pitch of fmask in pixels
31061.651Slukem    UINT_32    height;         ///< Height of fmask in pixels
31071.651Slukem    UINT_32    baseAlign;      ///< Base alignment
31081.769Syamt    UINT_32    numSlices;      ///< Slices of fmask
31091.651Slukem    UINT_32    fmaskBytes;     ///< Size of fmask in bytes
31101.651Slukem    UINT_32    bpp;            ///< Bits per pixel of FMASK is: number of bit planes
31111.651Slukem    UINT_32    numSamples;     ///< Number of samples
31121.955Sbouyer    UINT_32    sliceSize;      ///< Size of slice in bytes
31131.738She} ADDR2_COMPUTE_FMASK_INFO_OUTPUT;
31141.651Slukem
31151.984Sxtraeme/**
31161.651Slukem****************************************************************************************************
31171.651Slukem*   Addr2ComputeFmaskInfo
31181.651Slukem*
31191.651Slukem*   @brief
31201.651Slukem*       Compute Fmask pitch/height/slices/alignments and size in bytes
31211.651Slukem****************************************************************************************************
31221.651Slukem*/
31231.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo(
31241.651Slukem    ADDR_HANDLE                              hLib,
31251.651Slukem    const ADDR2_COMPUTE_FMASK_INFO_INPUT*    pIn,
31261.651Slukem    ADDR2_COMPUTE_FMASK_INFO_OUTPUT*         pOut);
31271.651Slukem
31281.651Slukem/**
31291.651Slukem****************************************************************************************************
31301.651Slukem*   ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
31311.651Slukem*
31321.651Slukem*   @brief
31331.651Slukem*       Input structure for Addr2ComputeFmaskAddrFromCoord
31341.651Slukem****************************************************************************************************
31351.651Slukem*/
31361.651Slukemtypedef struct _ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
31371.651Slukem{
31381.651Slukem    UINT_32            size;               ///< Size of this structure in bytes
31391.651Slukem
31401.651Slukem    AddrSwizzleMode    swizzleMode;        ///< FMask surface swizzle mode
31411.651Slukem    UINT_32            x;                  ///< X coordinate
31421.651Slukem    UINT_32            y;                  ///< Y coordinate
31431.651Slukem    UINT_32            slice;              ///< Slice index
31441.651Slukem    UINT_32            sample;             ///< Sample index (fragment index for EQAA)
31451.651Slukem    UINT_32            plane;              ///< Plane number
31461.651Slukem
31471.651Slukem    UINT_32            unalignedWidth;     ///< Color surface original width
31481.651Slukem    UINT_32            unalignedHeight;    ///< Color surface original height
31491.651Slukem    UINT_32            numSamples;         ///< Number of samples
31501.651Slukem    UINT_32            numFrags;           ///< Number of fragments, leave it zero or the same as
31511.651Slukem                                           ///  number of samples for normal AA; Set it to the
31521.651Slukem                                           ///  number of fragments for EQAA
31531.651Slukem    UINT_32            tileSwizzle;        ///< Combined swizzle used to do bank/pipe rotation
31541.651Slukem
31551.651Slukem    ADDR2_FMASK_FLAGS  fMaskFlags; ///< FMASK flags
31561.651Slukem} ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT;
31571.651Slukem
31581.651Slukem/**
31591.651Slukem****************************************************************************************************
31601.651Slukem*   ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
31611.651Slukem*
31621.651Slukem*   @brief
31631.651Slukem*       Output structure for Addr2ComputeFmaskAddrFromCoord
31641.650Slukem****************************************************************************************************
31651.651Slukem*/
31661.651Slukemtypedef struct _ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
31671.651Slukem{
31681.651Slukem    UINT_32    size;           ///< Size of this structure in bytes
31691.651Slukem
31701.651Slukem    UINT_64    addr;           ///< Fmask address
31711.651Slukem    UINT_32    bitPosition;    ///< Bit position within fmaskAddr, 0-7.
31721.651Slukem} ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT;
31731.651Slukem
31741.651Slukem/**
31751.651Slukem****************************************************************************************************
31761.651Slukem*   Addr2ComputeFmaskAddrFromCoord
31771.650Slukem*
31781.650Slukem*   @brief
31791.650Slukem*       Compute Fmask address according to coordinates (x,y,slice,sample,plane)
31801.650Slukem****************************************************************************************************
31811.650Slukem*/
31821.650SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord(
31831.650Slukem    ADDR_HANDLE                                       hLib,
31841.650Slukem    const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT*    pIn,
31851.650Slukem    ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT*         pOut);
31861.650Slukem
31871.650Slukem/**
31881.650Slukem****************************************************************************************************
31891.650Slukem*   ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT
31901.650Slukem*
31911.650Slukem*   @brief
31921.650Slukem*       Input structure for Addr2ComputeFmaskCoordFromAddr
31931.650Slukem****************************************************************************************************
31941.650Slukem*/
31951.650Slukemtypedef struct _ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT
31961.650Slukem{
31971.650Slukem    UINT_32            size;               ///< Size of this structure in bytes
31981.650Slukem
31991.650Slukem    UINT_64            addr;               ///< Address
32001.650Slukem    UINT_32            bitPosition;        ///< Bit position within addr, 0-7.
32011.650Slukem    AddrSwizzleMode    swizzleMode;        ///< FMask surface swizzle mode
32021.650Slukem
32031.650Slukem    UINT_32            unalignedWidth;     ///< Color surface original width
32041.650Slukem    UINT_32            unalignedHeight;    ///< Color surface original height
32051.650Slukem    UINT_32            numSamples;         ///< Number of samples
32061.650Slukem    UINT_32            numFrags;           ///< Number of fragments
32071.650Slukem
32081.650Slukem    UINT_32            tileSwizzle;        ///< Combined swizzle used to do bank/pipe rotation
32091.650Slukem
32101.650Slukem    ADDR2_FMASK_FLAGS  fMaskFlags; ///< FMASK flags
32111.1024Sxtraeme} ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT;
32121.651Slukem
32131.651Slukem/**
32141.651Slukem****************************************************************************************************
32151.651Slukem*   ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
32161.651Slukem*
32171.651Slukem*   @brief
32181.651Slukem*       Output structure for Addr2ComputeFmaskCoordFromAddr
32191.651Slukem****************************************************************************************************
32201.794Sbriggs*/
32211.650Slukemtypedef struct _ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
32221.651Slukem{
32231.651Slukem    UINT_32    size;      ///< Size of this structure in bytes
32241.651Slukem
32251.651Slukem    UINT_32    x;         ///< X coordinate
32261.651Slukem    UINT_32    y;         ///< Y coordinate
32271.651Slukem    UINT_32    slice;     ///< Slice index
32281.1036Sjmmv    UINT_32    sample;    ///< Sample index (fragment index for EQAA)
32291.663Sperry    UINT_32    plane;     ///< Plane number
32301.692Sdyoung} ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT;
32311.770Scube
32321.757Sjoff/**
32331.651Slukem****************************************************************************************************
32341.728Saugustss*   Addr2ComputeFmaskCoordFromAddr
32351.651Slukem*
32361.651Slukem*   @brief
32371.651Slukem*       Compute FMASK coordinate from an given address
32381.651Slukem****************************************************************************************************
32391.754Sreinoud*/
32401.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr(
32411.651Slukem    ADDR_HANDLE                                       hLib,
32421.651Slukem    const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT*    pIn,
32431.730Saugustss    ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT*         pOut);
32441.651Slukem
32451.795Skent////////////////////////////////////////////////////////////////////////////////////////////////////
32461.651Slukem//                                     DCC key functions for Gfx9
32471.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
32481.1026Skiyohara
32491.673Smrg/**
32501.651Slukem****************************************************************************************************
32511.651Slukem*   _ADDR2_COMPUTE_DCCINFO_INPUT
32521.651Slukem*
32531.997Sbouyer*   @brief
32541.651Slukem*       Input structure of Addr2ComputeDccInfo
32551.898Sgdamore****************************************************************************************************
32561.651Slukem*/
32571.959Sbouyertypedef struct _ADDR2_COMPUTE_DCCINFO_INPUT
32581.651Slukem{
32591.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
32601.651Slukem
32611.651Slukem    ADDR2_META_FLAGS    dccKeyFlags;        ///< DCC key flags
32621.651Slukem    ADDR2_SURFACE_FLAGS colorFlags;         ///< Color surface flags
32631.898Sgdamore    AddrResourceType    resourceType;       ///< Color surface type
32641.1021Skiyohara    AddrSwizzleMode     swizzleMode;        ///< Color surface swizzle mode
32651.930Splunky    UINT_32             bpp;                ///< bits per pixel
32661.898Sgdamore    UINT_32             unalignedWidth;     ///< Color surface original width (of mip0)
32671.985Swiz    UINT_32             unalignedHeight;    ///< Color surface original height (of mip0)
32681.930Splunky    UINT_32             numSlices;          ///< Number of slices, of color surface (of mip0)
32691.898Sgdamore    UINT_32             numFrags;           ///< Fragment number of color surface
32701.898Sgdamore    UINT_32             numMipLevels;       ///< Total mipmap levels of color surface
32711.913Stron    UINT_32             dataSurfaceSize;    ///< The padded size of all slices and mip levels
32721.975Skiyohara                                            ///< useful in meta linear case
32731.650Slukem    UINT_32             firstMipIdInTail;   ///< The id of first mip in tail, if no mip is in tail,
32741.651Slukem                                            ///  it should be number of mip levels
32751.651Slukem} ADDR2_COMPUTE_DCCINFO_INPUT;
32761.651Slukem
32771.892Sliamjfoy/**
32781.651Slukem****************************************************************************************************
32791.651Slukem*   ADDR2_COMPUTE_DCCINFO_OUTPUT
32801.651Slukem*
32811.802Swiz*   @brief
32821.651Slukem*       Output structure of Addr2ComputeDccInfo
32831.651Slukem****************************************************************************************************
32841.651Slukem*/
32851.651Slukemtypedef struct _ADDR2_COMPUTE_DCCINFO_OUTPUT
32861.989Smacallan{
32871.802Swiz    UINT_32    size;               ///< Size of this structure in bytes
32881.985Swiz
32891.870Sxtraeme    UINT_32    dccRamBaseAlign;    ///< Base alignment of dcc key
32901.651Slukem    UINT_32    dccRamSize;         ///< Size of dcc key
32911.651Slukem
32921.651Slukem    UINT_32    pitch;              ///< DCC surface mip chain pitch
32931.651Slukem    UINT_32    height;             ///< DCC surface mip chain height
32941.651Slukem    UINT_32    depth;              ///< DCC surface mip chain depth
32951.651Slukem
32961.651Slukem    UINT_32    compressBlkWidth;   ///< DCC compress block width
32971.651Slukem    UINT_32    compressBlkHeight;  ///< DCC compress block height
32981.651Slukem    UINT_32    compressBlkDepth;   ///< DCC compress block depth
32991.651Slukem
33001.651Slukem    UINT_32    metaBlkWidth;       ///< DCC meta block width
33011.651Slukem    UINT_32    metaBlkHeight;      ///< DCC meta block height
33021.1032Sxtraeme    UINT_32    metaBlkDepth;       ///< DCC meta block depth
33031.687Swiz
33041.651Slukem    UINT_32    metaBlkNumPerSlice; ///< Number of metablock within one slice
33051.651Slukem
33061.1000Smacallan    union
33071.651Slukem    {
33081.651Slukem        UINT_32 fastClearSizePerSlice;  ///< Size of DCC within a slice should be fast cleared
33091.651Slukem        UINT_32 dccRamSliceSize;        ///< DCC ram size per slice. For mipmap, it's
33101.651Slukem                                        ///  the slize size of a mip chain, the thickness of a
33111.651Slukem                                        ///  a slice is meta block depth
33121.651Slukem    };
33131.884Sgdamore
33141.651Slukem    ADDR2_META_MIP_INFO* pMipInfo;      ///< DCC mip information
33151.651Slukem} ADDR2_COMPUTE_DCCINFO_OUTPUT;
33161.666Sragge
33171.920Swiz/**
33181.651Slukem****************************************************************************************************
33191.651Slukem*   Addr2ComputeDccInfo
33201.651Slukem*
33211.651Slukem*   @brief
33221.651Slukem*       Compute DCC key size, base alignment
33231.651Slukem*       info
33241.651Slukem****************************************************************************************************
33251.651Slukem*/
33261.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeDccInfo(
33271.651Slukem    ADDR_HANDLE                           hLib,
33281.651Slukem    const ADDR2_COMPUTE_DCCINFO_INPUT*    pIn,
33291.651Slukem    ADDR2_COMPUTE_DCCINFO_OUTPUT*         pOut);
33301.651Slukem
33311.651Slukem/**
33321.651Slukem****************************************************************************************************
33331.985Swiz*   ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
33341.651Slukem*
33351.651Slukem*   @brief
33361.651Slukem*       Input structure for Addr2ComputeDccAddrFromCoord
33371.651Slukem*
33381.651Slukem****************************************************************************************************
33391.651Slukem*/
33401.651Slukemtypedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
33411.651Slukem{
33421.651Slukem    UINT_32             size;                ///< Size of this structure in bytes
33431.651Slukem
33441.651Slukem    UINT_32             x;                   ///< X coordinate
33451.651Slukem    UINT_32             y;                   ///< Y coordinate
33461.945Sbjh21    UINT_32             slice;               ///< Index of slices
33471.651Slukem    UINT_32             sample;              ///< Index of samples, means fragment index for EQAA
33481.651Slukem    UINT_32             mipId;               ///< mipmap level id
33491.651Slukem
33501.651Slukem    ADDR2_META_FLAGS    dccKeyFlags;         ///< DCC flags
33511.651Slukem    ADDR2_SURFACE_FLAGS colorFlags;          ///< Color surface flags
33521.651Slukem    AddrResourceType    resourceType;        ///< Color surface type
33531.651Slukem    AddrSwizzleMode     swizzleMode;         ///< Color surface swizzle mode
33541.651Slukem    UINT_32             bpp;                 ///< Color surface bits per pixel
33551.651Slukem    UINT_32             unalignedWidth;      ///< Color surface original width (of mip0)
33561.651Slukem    UINT_32             unalignedHeight;     ///< Color surface original height (of mip0)
33571.651Slukem    UINT_32             numSlices;           ///< Color surface original slices (of mip0)
33581.651Slukem    UINT_32             numMipLevels;        ///< Color surface mipmap levels
33591.651Slukem    UINT_32             numFrags;            ///< Color surface fragment number
33601.651Slukem
33611.651Slukem    UINT_32             pipeXor;             ///< pipe Xor setting
33621.651Slukem} ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT;
33631.651Slukem
33641.953Srpaulo/**
33651.655Srearnsha****************************************************************************************************
33661.651Slukem*   ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT
33671.651Slukem*
33681.855Sgdamore*   @brief
33691.855Sgdamore*       Output structure for Addr2ComputeDccAddrFromCoord
33701.1030Sgarbled****************************************************************************************************
33711.1030Sgarbled*/
33721.1030Sgarbledtypedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT
33731.1030Sgarbled{
33741.651Slukem    UINT_32    size;           ///< Size of this structure in bytes
33751.651Slukem
33761.651Slukem    UINT_64    addr;           ///< DCC address in bytes
33771.683Sjonathan} ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT;
33781.651Slukem
33791.651Slukem/**
33801.651Slukem****************************************************************************************************
33811.651Slukem*   Addr2ComputeDccAddrFromCoord
33821.651Slukem*
33831.651Slukem*   @brief
33841.652Shannken*       Compute DCC address according to coordinates (of MSAA color buffer)
33851.651Slukem****************************************************************************************************
33861.802Swiz*/
33871.801SkiyoharaADDR_E_RETURNCODE ADDR_API Addr2ComputeDccAddrFromCoord(
33881.800Skiyohara    ADDR_HANDLE                                    hLib,
33891.651Slukem    const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT*   pIn,
33901.651Slukem    ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT*        pOut);
33911.989Smacallan
33921.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
33931.802Swiz//                                     Misc functions for Gfx9
33941.651Slukem////////////////////////////////////////////////////////////////////////////////////////////////////
33951.651Slukem
33961.651Slukem/**
33971.651Slukem****************************************************************************************************
33981.830Sjmcneill*   ADDR2_COMPUTE_PIPEBANKXOR_INPUT
33991.874Sriz*
34001.651Slukem*   @brief
34011.651Slukem*       Input structure of Addr2ComputePipebankXor
34021.651Slukem****************************************************************************************************
34031.651Slukem*/
34041.651Slukemtypedef struct _ADDR2_COMPUTE_PIPEBANKXOR_INPUT
34051.688Sjonathan{
34061.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
34071.650Slukem    UINT_32             surfIndex;          ///< Input surface index
34081.651Slukem    ADDR2_SURFACE_FLAGS flags;              ///< Surface flag
34091.651Slukem    AddrSwizzleMode     swizzleMode;        ///< Surface swizzle mode
34101.651Slukem    AddrResourceType    resourceType;       ///< Surface resource type
34111.650Slukem    AddrFormat          format;             ///< Surface format
34121.650Slukem    UINT_32             numSamples;         ///< Number of samples
34131.651Slukem    UINT_32             numFrags;           ///< Number of fragments, leave it zero or the same as
34141.651Slukem                                            ///  number of samples for normal AA; Set it to the
34151.651Slukem                                            ///  number of fragments for EQAA
34161.650Slukem} ADDR2_COMPUTE_PIPEBANKXOR_INPUT;
34171.651Slukem
34181.651Slukem/**
34191.651Slukem****************************************************************************************************
34201.650Slukem*   ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT
34211.651Slukem*
34221.651Slukem*   @brief
34231.651Slukem*       Output structure of Addr2ComputePipebankXor
34241.651Slukem****************************************************************************************************
34251.651Slukem*/
34261.651Slukemtypedef struct _ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT
34271.651Slukem{
34281.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
34291.651Slukem    UINT_32             pipeBankXor;        ///< Pipe bank xor
34301.651Slukem} ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT;
34311.650Slukem
34321.651Slukem/**
34331.651Slukem****************************************************************************************************
34341.650Slukem*   Addr2ComputePipeBankXor
34351.651Slukem*
34361.650Slukem*   @brief
34371.651Slukem*       Calculate a valid bank pipe xor value for client to use.
34381.651Slukem****************************************************************************************************
34391.651Slukem*/
34401.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputePipeBankXor(
34411.650Slukem    ADDR_HANDLE                            hLib,
34421.651Slukem    const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
34431.727Swiz    ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT*      pOut);
34441.726Swiz
34451.726Swiz/**
34461.726Swiz****************************************************************************************************
34471.726Swiz*   ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT
34481.726Swiz*
34491.726Swiz*   @brief
34501.726Swiz*       Input structure of Addr2ComputeSlicePipeBankXor
34511.726Swiz****************************************************************************************************
34521.726Swiz*/
34531.726Swiztypedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT
34541.726Swiz{
34551.726Swiz    UINT_32             size;               ///< Size of this structure in bytes
34561.904Speter    AddrSwizzleMode     swizzleMode;        ///< Surface swizzle mode
34571.938Speter    AddrResourceType    resourceType;       ///< Surface resource type
34581.938Speter    UINT_32             basePipeBankXor;    ///< Base pipe bank xor
34591.938Speter    UINT_32             slice;              ///< Slice id
34601.812Snakayama    UINT_32             numSamples;         ///< Number of samples
34611.682Suwe} ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT;
34621.682Suwe
34631.651Slukem/**
34641.820Skiyohara****************************************************************************************************
34651.790Sagc*   ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT
34661.651Slukem*
34671.651Slukem*   @brief
34681.651Slukem*       Output structure of Addr2ComputeSlicePipeBankXor
34691.651Slukem****************************************************************************************************
34701.650Slukem*/
34711.972Sdyoungtypedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT
34721.650Slukem{
34731.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
34741.651Slukem    UINT_32             pipeBankXor;        ///< Pipe bank xor
34751.651Slukem} ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT;
34761.651Slukem
34771.651Slukem/**
34781.1011Sxtraeme****************************************************************************************************
34791.985Swiz*   Addr2ComputeSlicePipeBankXor
34801.829Sdyoung*
34811.1007Sjmcneill*   @brief
34821.832Sjmcneill*       Calculate slice pipe bank xor value based on base pipe bank xor and slice id.
34831.650Slukem****************************************************************************************************
34841.651Slukem*/
34851.651SlukemADDR_E_RETURNCODE ADDR_API Addr2ComputeSlicePipeBankXor(
34861.650Slukem    ADDR_HANDLE                                  hLib,
34871.651Slukem    const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
34881.650Slukem    ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT*      pOut);
34891.651Slukem
34901.651Slukem/**
34911.651Slukem****************************************************************************************************
34921.651Slukem*   ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT
34931.880Srittera*
34941.651Slukem*   @brief
34951.650Slukem*       Input structure of Addr2ComputeSubResourceOffsetForSwizzlePattern
34961.650Slukem****************************************************************************************************
34971.650Slukem*/
34981.651Slukemtypedef struct _ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT
34991.650Slukem{
35001.650Slukem    UINT_32             size;               ///< Size of this structure in bytes
35011.651Slukem    AddrSwizzleMode     swizzleMode;        ///< Surface swizzle mode
35021.859Sdyoung    AddrResourceType    resourceType;       ///< Surface resource type
35031.650Slukem    UINT_32             pipeBankXor;        ///< Per resource xor
35041.689Skochi    UINT_32             slice;              ///< Slice id
35051.691Skanaoka    UINT_64             sliceSize;          ///< Slice size of a mip chain
35061.882Sjmcneill    UINT_64             macroBlockOffset;   ///< Macro block offset, returned in ADDR2_MIP_INFO
35071.650Slukem    UINT_32             mipTailOffset;      ///< Mip tail offset, returned in ADDR2_MIP_INFO
35081.650Slukem} ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT;
35091.650Slukem
35101.650Slukem/**
35111.650Slukem****************************************************************************************************
35121.650Slukem*   ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT
35131.650Slukem*
35141.650Slukem*   @brief
35151.985Swiz*       Output structure of Addr2ComputeSubResourceOffsetForSwizzlePattern
35161.651Slukem****************************************************************************************************
35171.1022Sxtraeme*/
35181.1017Skiyoharatypedef struct _ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT
35191.651Slukem{
35201.651Slukem    UINT_32             size;               ///< Size of this structure in bytes
35211.651Slukem    UINT_64             offset;             ///< offset
35221.651Slukem} ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT;
35231.651Slukem
35241.926Swiz/**
35251.992Splunky****************************************************************************************************
35261.800Skiyohara*   Addr2ComputeSubResourceOffsetForSwizzlePattern
35271.783Sdyoung*
35281.651Slukem*   @brief
35291.651Slukem*       Calculate sub resource offset to support swizzle pattern.
35301.651Slukem****************************************************************************************************
35311.651Slukem*/
35321.943SbouyerADDR_E_RETURNCODE ADDR_API Addr2ComputeSubResourceOffsetForSwizzlePattern(
35331.650Slukem    ADDR_HANDLE                                                     hLib,
35341.651Slukem    const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
35351.651Slukem    ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT*      pOut);
35361.651Slukem
35371.651Slukem/**
35381.651Slukem****************************************************************************************************
35391.651Slukem*   ADDR2_BLOCK_SET
35401.651Slukem*
35411.651Slukem*   @brief
35421.651Slukem*       Bit field that defines block type
35431.651Slukem****************************************************************************************************
35441.651Slukem*/
35451.763Spetertypedef union _ADDR2_BLOCK_SET
35461.763Speter{
35471.650Slukem    struct
35481.651Slukem    {
35491.763Speter        UINT_32 micro       : 1;   // 256B block for 2D resource
35501.936Sbouyer        UINT_32 macro4KB    : 1;   // 4KB for 2D/3D resource
35511.763Speter        UINT_32 macro64KB   : 1;   // 64KB for 2D/3D resource
35521.651Slukem        UINT_32 var         : 1;   // VAR block
35531.651Slukem        UINT_32 linear      : 1;   // Linear block
35541.721Slukem        UINT_32 reserved    : 27;
35551.651Slukem    };
35561.651Slukem
35571.651Slukem    UINT_32 value;
35581.651Slukem} ADDR2_BLOCK_SET;
35591.651Slukem
35601.651Slukem/**
35611.651Slukem****************************************************************************************************
35621.651Slukem*   ADDR2_SWTYPE_SET
35631.651Slukem*
35641.651Slukem*   @brief
35651.651Slukem*       Bit field that defines swizzle type
35661.651Slukem****************************************************************************************************
35671.651Slukem*/
35681.651Slukemtypedef union _ADDR2_SWTYPE_SET
35691.651Slukem{
35701.651Slukem    struct
35711.1037Sxtraeme    {
35721.1037Sxtraeme        UINT_32 sw_Z     : 1;   // SW_*_Z_*
35731.736Sgrant        UINT_32 sw_S     : 1;   // SW_*_S_*
35741.1001Sbouyer        UINT_32 sw_D     : 1;   // SW_*_D_*
35751.752Sskrll        UINT_32 sw_R     : 1;   // SW_*_R_*
35761.651Slukem        UINT_32 reserved : 28;
35771.651Slukem    };
35781.737Scube
35791.651Slukem    UINT_32 value;
35801.651Slukem} ADDR2_SWTYPE_SET;
35811.678Suwe
35821.906Sxtraeme/**
35831.651Slukem****************************************************************************************************
35841.651Slukem*   ADDR2_SWMODE_SET
35851.651Slukem*
35861.651Slukem*   @brief
35871.651Slukem*       Bit field that defines swizzle type
35881.651Slukem****************************************************************************************************
35891.651Slukem*/
35901.651Slukemtypedef union _ADDR2_SWMODE_SET
35911.651Slukem{
35921.890Stron    struct
35931.651Slukem    {
35941.650Slukem        UINT_32 swLinear   : 1;
35951.651Slukem        UINT_32 sw256B_S   : 1;
35961.941Sgdamore        UINT_32 sw256B_D   : 1;
35971.650Slukem        UINT_32 sw256B_R   : 1;
35981.651Slukem        UINT_32 sw4KB_Z    : 1;
35991.651Slukem        UINT_32 sw4KB_S    : 1;
36001.651Slukem        UINT_32 sw4KB_D    : 1;
36011.651Slukem        UINT_32 sw4KB_R    : 1;
36021.651Slukem        UINT_32 sw64KB_Z   : 1;
36031.651Slukem        UINT_32 sw64KB_S   : 1;
36041.650Slukem        UINT_32 sw64KB_D   : 1;
36051.651Slukem        UINT_32 sw64KB_R   : 1;
36061.651Slukem        UINT_32 swVar_Z    : 1;
36071.651Slukem        UINT_32 swVar_S    : 1;
36081.1008Stsutsui        UINT_32 swVar_D    : 1;
36091.992Splunky        UINT_32 swVar_R    : 1;
36101.985Swiz        UINT_32 sw64KB_Z_T : 1;
36111.651Slukem        UINT_32 sw64KB_S_T : 1;
36121.651Slukem        UINT_32 sw64KB_D_T : 1;
36131.651Slukem        UINT_32 sw64KB_R_T : 1;
36141.651Slukem        UINT_32 sw4KB_Z_X  : 1;
36151.651Slukem        UINT_32 sw4KB_S_X  : 1;
36161.650Slukem        UINT_32 sw4KB_D_X  : 1;
36171.651Slukem        UINT_32 sw4KB_R_X  : 1;
36181.651Slukem        UINT_32 sw64KB_Z_X : 1;
36191.851Sxtraeme        UINT_32 sw64KB_S_X : 1;
36201.957Swiz        UINT_32 sw64KB_D_X : 1;
36211.651Slukem        UINT_32 sw64KB_R_X : 1;
36221.651Slukem        UINT_32 swVar_Z_X  : 1;
36231.651Slukem        UINT_32 swVar_S_X  : 1;
36241.651Slukem        UINT_32 swVar_D_X  : 1;
36251.651Slukem        UINT_32 swVar_R_X  : 1;
36261.651Slukem    };
36271.651Slukem
36281.651Slukem    UINT_32 value;
36291.651Slukem} ADDR2_SWMODE_SET;
36301.958Sbouyer
36311.985Swiz/**
36321.651Slukem****************************************************************************************************
36331.651Slukem*   ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
36341.651Slukem*
36351.651Slukem*   @brief
36361.651Slukem*       Input structure of Addr2GetPreferredSurfaceSetting
36371.651Slukem****************************************************************************************************
36381.651Slukem*/
36391.651Slukemtypedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
36401.651Slukem{
36411.651Slukem    UINT_32               size;              ///< Size of this structure in bytes
36421.929Sriz
36431.929Sriz    ADDR2_SURFACE_FLAGS   flags;             ///< Surface flags
36441.651Slukem    AddrResourceType      resourceType;      ///< Surface type
36451.651Slukem    AddrFormat            format;            ///< Surface format
36461.724Smanu    AddrResrouceLocation  resourceLoction;   ///< Surface heap choice
36471.651Slukem    ADDR2_BLOCK_SET       forbiddenBlock;    ///< Client can use it to disable some block setting
36481.651Slukem                                             ///< such as linear for DXTn, tiled for YUV
36491.651Slukem    ADDR2_SWTYPE_SET      preferredSwSet;    ///< Client can use it to specify sw type(s) wanted
36501.651Slukem    BOOL_32               noXor;             ///< Do not use xor mode for this resource
36511.651Slukem    UINT_32               bpp;               ///< bits per pixel
36521.651Slukem    UINT_32               width;             ///< Width (of mip0), in pixels
36531.651Slukem    UINT_32               height;            ///< Height (of mip0), in pixels
36541.650Slukem    UINT_32               numSlices;         ///< Number surface slice/depth (of mip0),
36551.651Slukem    UINT_32               numMipLevels;      ///< Total mipmap levels.
36561.651Slukem    UINT_32               numSamples;        ///< Number of samples
36571.651Slukem    UINT_32               numFrags;          ///< Number of fragments, leave it zero or the same as
36581.651Slukem                                             ///  number of samples for normal AA; Set it to the
36591.651Slukem                                             ///  number of fragments for EQAA
36601.651Slukem    UINT_32               maxAlign;          ///< maximum base/size alignment requested by client
36611.651Slukem    UINT_32               minSizeAlign;      ///< memory allocated for surface in client driver will
36621.651Slukem                                             ///  be padded to multiple of this value (in bytes)
36631.651Slukem} ADDR2_GET_PREFERRED_SURF_SETTING_INPUT;
36641.1000Smacallan
36651.651Slukem/**
36661.650Slukem****************************************************************************************************
36671.651Slukem*   ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT
36681.651Slukem*
36691.651Slukem*   @brief
36701.651Slukem*       Output structure of Addr2GetPreferredSurfaceSetting
36711.651Slukem****************************************************************************************************
36721.651Slukem*/
36731.863Schstypedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT
36741.1013Skiyohara{
36751.1013Skiyohara    UINT_32               size;                 ///< Size of this structure in bytes
36761.928Sitohy
36771.722Sitohy    AddrSwizzleMode       swizzleMode;          ///< Suggested swizzle mode to be used
36781.924Smatt    AddrResourceType      resourceType;         ///< Suggested resource type to program HW
36791.651Slukem    ADDR2_BLOCK_SET       validBlockSet;        ///< Valid block type bit conbination
36801.926Swiz    BOOL_32               canXor;               ///< If client can use xor on a valid macro block
36811.651Slukem                                                ///  type
36821.651Slukem    ADDR2_SWTYPE_SET      validSwTypeSet;       ///< Valid swizzle type bit combination
36831.651Slukem    ADDR2_SWTYPE_SET      clientPreferredSwSet; ///< Client-preferred swizzle type bit combination
36841.651Slukem    ADDR2_SWMODE_SET      validSwModeSet;       ///< Valid swizzle mode bit combination
36851.651Slukem} ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT;
36861.651Slukem
36871.651Slukem/**
36881.651Slukem****************************************************************************************************
36891.651Slukem*   Addr2GetPreferredSurfaceSetting
36901.651Slukem*
36911.874Sriz*   @brief
36921.651Slukem*       Suggest a preferred setting for client driver to program HW register
36931.651Slukem****************************************************************************************************
36941.650Slukem*/
36951.651SlukemADDR_E_RETURNCODE ADDR_API Addr2GetPreferredSurfaceSetting(
36961.651Slukem    ADDR_HANDLE                                   hLib,
36971.651Slukem    const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
36981.874Sriz    ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT*      pOut);
36991.1034Sjmcneill
37001.651Slukem/**
37011.992Splunky****************************************************************************************************
37021.651Slukem*   Addr2IsValidDisplaySwizzleMode
37031.651Slukem*
37041.651Slukem*   @brief
37051.651Slukem*       Return whether the swizzle mode is supported by DCE / DCN.
37061.651Slukem****************************************************************************************************
37071.651Slukem*/
37081.651SlukemADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode(
37091.651Slukem    ADDR_HANDLE     hLib,
37101.651Slukem    AddrSwizzleMode swizzleMode,
37111.651Slukem    UINT_32         bpp,
37121.651Slukem    bool            *result);
37131.651Slukem
37141.651Slukem#if defined(__cplusplus)
37151.651Slukem}
37161.651Slukem#endif
37171.651Slukem
37181.651Slukem#endif // __ADDR_INTERFACE_H__
37191.651Slukem