1b8e80941Smrg/*
2b8e80941Smrg * Copyright © 2018 Red Hat.
3b8e80941Smrg *
4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5b8e80941Smrg * copy of this software and associated documentation files (the "Software"),
6b8e80941Smrg * to deal in the Software without restriction, including without limitation
7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the
9b8e80941Smrg * Software is furnished to do so, subject to the following conditions:
10b8e80941Smrg *
11b8e80941Smrg * The above copyright notice and this permission notice (including the next
12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the
13b8e80941Smrg * Software.
14b8e80941Smrg *
15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21b8e80941Smrg * IN THE SOFTWARE.
22b8e80941Smrg */
23b8e80941Smrg#include "ac_llvm_util.h"
24b8e80941Smrg#include "ac_llvm_build.h"
25b8e80941Smrg#include "radv_shader_helper.h"
26b8e80941Smrg
27b8e80941Smrg#include <list>
28b8e80941Smrgclass radv_llvm_per_thread_info {
29b8e80941Smrgpublic:
30b8e80941Smrg	radv_llvm_per_thread_info(enum radeon_family arg_family,
31b8e80941Smrg				enum ac_target_machine_options arg_tm_options)
32b8e80941Smrg		: family(arg_family), tm_options(arg_tm_options), passes(NULL) {}
33b8e80941Smrg
34b8e80941Smrg	~radv_llvm_per_thread_info()
35b8e80941Smrg	{
36b8e80941Smrg		ac_destroy_llvm_passes(passes);
37b8e80941Smrg		ac_destroy_llvm_compiler(&llvm_info);
38b8e80941Smrg	}
39b8e80941Smrg
40b8e80941Smrg	bool init(void)
41b8e80941Smrg	{
42b8e80941Smrg		if (!ac_init_llvm_compiler(&llvm_info,
43b8e80941Smrg					  family,
44b8e80941Smrg					  tm_options))
45b8e80941Smrg			return false;
46b8e80941Smrg
47b8e80941Smrg		passes = ac_create_llvm_passes(llvm_info.tm);
48b8e80941Smrg		if (!passes)
49b8e80941Smrg			return false;
50b8e80941Smrg
51b8e80941Smrg		return true;
52b8e80941Smrg	}
53b8e80941Smrg
54b8e80941Smrg	bool compile_to_memory_buffer(LLVMModuleRef module,
55b8e80941Smrg				      struct ac_shader_binary *binary)
56b8e80941Smrg	{
57b8e80941Smrg		return ac_compile_module_to_binary(passes, module, binary);
58b8e80941Smrg	}
59b8e80941Smrg
60b8e80941Smrg	bool is_same(enum radeon_family arg_family,
61b8e80941Smrg		     enum ac_target_machine_options arg_tm_options) {
62b8e80941Smrg		if (arg_family == family &&
63b8e80941Smrg		    arg_tm_options == tm_options)
64b8e80941Smrg			return true;
65b8e80941Smrg		return false;
66b8e80941Smrg	}
67b8e80941Smrg	struct ac_llvm_compiler llvm_info;
68b8e80941Smrgprivate:
69b8e80941Smrg	enum radeon_family family;
70b8e80941Smrg	enum ac_target_machine_options tm_options;
71b8e80941Smrg	struct ac_compiler_passes *passes;
72b8e80941Smrg};
73b8e80941Smrg
74b8e80941Smrg/* we have to store a linked list per thread due to the possiblity of multiple gpus being required */
75b8e80941Smrgstatic thread_local std::list<radv_llvm_per_thread_info> radv_llvm_per_thread_list;
76b8e80941Smrg
77b8e80941Smrgbool radv_compile_to_binary(struct ac_llvm_compiler *info,
78b8e80941Smrg			    LLVMModuleRef module,
79b8e80941Smrg			    struct ac_shader_binary *binary)
80b8e80941Smrg{
81b8e80941Smrg	radv_llvm_per_thread_info *thread_info = nullptr;
82b8e80941Smrg
83b8e80941Smrg	for (auto &I : radv_llvm_per_thread_list) {
84b8e80941Smrg		if (I.llvm_info.tm == info->tm) {
85b8e80941Smrg			thread_info = &I;
86b8e80941Smrg			break;
87b8e80941Smrg		}
88b8e80941Smrg	}
89b8e80941Smrg
90b8e80941Smrg	if (!thread_info) {
91b8e80941Smrg		struct ac_compiler_passes *passes = ac_create_llvm_passes(info->tm);
92b8e80941Smrg		bool ret = ac_compile_module_to_binary(passes, module, binary);
93b8e80941Smrg		ac_destroy_llvm_passes(passes);
94b8e80941Smrg		return ret;
95b8e80941Smrg	}
96b8e80941Smrg
97b8e80941Smrg	return thread_info->compile_to_memory_buffer(module, binary);
98b8e80941Smrg}
99b8e80941Smrg
100b8e80941Smrgbool radv_init_llvm_compiler(struct ac_llvm_compiler *info,
101b8e80941Smrg			     bool thread_compiler,
102b8e80941Smrg			     enum radeon_family family,
103b8e80941Smrg			     enum ac_target_machine_options tm_options)
104b8e80941Smrg{
105b8e80941Smrg	if (thread_compiler) {
106b8e80941Smrg		for (auto &I : radv_llvm_per_thread_list) {
107b8e80941Smrg			if (I.is_same(family, tm_options)) {
108b8e80941Smrg				*info = I.llvm_info;
109b8e80941Smrg				return true;
110b8e80941Smrg			}
111b8e80941Smrg		}
112b8e80941Smrg
113b8e80941Smrg		radv_llvm_per_thread_list.emplace_back(family, tm_options);
114b8e80941Smrg		radv_llvm_per_thread_info &tinfo = radv_llvm_per_thread_list.back();
115b8e80941Smrg
116b8e80941Smrg		if (!tinfo.init()) {
117b8e80941Smrg			radv_llvm_per_thread_list.pop_back();
118b8e80941Smrg			return false;
119b8e80941Smrg		}
120b8e80941Smrg
121b8e80941Smrg		*info = tinfo.llvm_info;
122b8e80941Smrg		return true;
123b8e80941Smrg	}
124b8e80941Smrg
125b8e80941Smrg	if (!ac_init_llvm_compiler(info,
126b8e80941Smrg				   family,
127b8e80941Smrg				   tm_options))
128b8e80941Smrg		return false;
129b8e80941Smrg	return true;
130b8e80941Smrg}
131b8e80941Smrg
132b8e80941Smrgvoid radv_destroy_llvm_compiler(struct ac_llvm_compiler *info,
133b8e80941Smrg				bool thread_compiler)
134b8e80941Smrg{
135b8e80941Smrg	if (!thread_compiler)
136b8e80941Smrg		ac_destroy_llvm_compiler(info);
137b8e80941Smrg}
138