1/* 2 * Copyright © 2014-2015 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#include "nir.h" 25#include "nir_builder.h" 26 27/** @file nir_lower_alu_to_scalar.c 28 * 29 * Replaces nir_alu_instr operations with more than one channel used in the 30 * arguments with individual per-channel operations. 31 */ 32 33static void 34nir_alu_ssa_dest_init(nir_alu_instr *instr, unsigned num_components, 35 unsigned bit_size) 36{ 37 nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components, 38 bit_size, NULL); 39 instr->dest.write_mask = (1 << num_components) - 1; 40} 41 42static void 43lower_reduction(nir_alu_instr *instr, nir_op chan_op, nir_op merge_op, 44 nir_builder *builder) 45{ 46 unsigned num_components = nir_op_infos[instr->op].input_sizes[0]; 47 48 nir_ssa_def *last = NULL; 49 for (unsigned i = 0; i < num_components; i++) { 50 nir_alu_instr *chan = nir_alu_instr_create(builder->shader, chan_op); 51 nir_alu_ssa_dest_init(chan, 1, instr->dest.dest.ssa.bit_size); 52 nir_alu_src_copy(&chan->src[0], &instr->src[0], chan); 53 chan->src[0].swizzle[0] = chan->src[0].swizzle[i]; 54 if (nir_op_infos[chan_op].num_inputs > 1) { 55 assert(nir_op_infos[chan_op].num_inputs == 2); 56 nir_alu_src_copy(&chan->src[1], &instr->src[1], chan); 57 chan->src[1].swizzle[0] = chan->src[1].swizzle[i]; 58 } 59 chan->exact = instr->exact; 60 61 nir_builder_instr_insert(builder, &chan->instr); 62 63 if (i == 0) { 64 last = &chan->dest.dest.ssa; 65 } else { 66 last = nir_build_alu(builder, merge_op, 67 last, &chan->dest.dest.ssa, NULL, NULL); 68 } 69 } 70 71 assert(instr->dest.write_mask == 1); 72 nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(last)); 73 nir_instr_remove(&instr->instr); 74} 75 76static bool 77lower_alu_instr_scalar(nir_alu_instr *instr, nir_builder *b) 78{ 79 unsigned num_src = nir_op_infos[instr->op].num_inputs; 80 unsigned i, chan; 81 82 assert(instr->dest.dest.is_ssa); 83 assert(instr->dest.write_mask != 0); 84 85 b->cursor = nir_before_instr(&instr->instr); 86 b->exact = instr->exact; 87 88#define LOWER_REDUCTION(name, chan, merge) \ 89 case name##2: \ 90 case name##3: \ 91 case name##4: \ 92 lower_reduction(instr, chan, merge, b); \ 93 return true; 94 95 switch (instr->op) { 96 case nir_op_vec4: 97 case nir_op_vec3: 98 case nir_op_vec2: 99 case nir_op_cube_face_coord: 100 case nir_op_cube_face_index: 101 /* We don't need to scalarize these ops, they're the ones generated to 102 * group up outputs into a value that can be SSAed. 103 */ 104 return false; 105 106 case nir_op_pack_half_2x16: 107 if (!b->shader->options->lower_pack_half_2x16) 108 return false; 109 110 nir_ssa_def *src_vec2 = nir_ssa_for_alu_src(b, instr, 0); 111 112 nir_ssa_def *val = 113 nir_pack_half_2x16_split(b, nir_channel(b, src_vec2, 0), 114 nir_channel(b, src_vec2, 1)); 115 116 nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(val)); 117 nir_instr_remove(&instr->instr); 118 return true; 119 120 case nir_op_unpack_unorm_4x8: 121 case nir_op_unpack_snorm_4x8: 122 case nir_op_unpack_unorm_2x16: 123 case nir_op_unpack_snorm_2x16: 124 /* There is no scalar version of these ops, unless we were to break it 125 * down to bitshifts and math (which is definitely not intended). 126 */ 127 return false; 128 129 case nir_op_unpack_half_2x16: { 130 if (!b->shader->options->lower_unpack_half_2x16) 131 return false; 132 133 nir_ssa_def *packed = nir_ssa_for_alu_src(b, instr, 0); 134 135 nir_ssa_def *comps[2]; 136 comps[0] = nir_unpack_half_2x16_split_x(b, packed); 137 comps[1] = nir_unpack_half_2x16_split_y(b, packed); 138 nir_ssa_def *vec = nir_vec(b, comps, 2); 139 140 nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(vec)); 141 nir_instr_remove(&instr->instr); 142 return true; 143 } 144 145 case nir_op_pack_uvec2_to_uint: { 146 assert(b->shader->options->lower_pack_snorm_2x16 || 147 b->shader->options->lower_pack_unorm_2x16); 148 149 nir_ssa_def *word = nir_extract_u16(b, nir_ssa_for_alu_src(b, instr, 0), 150 nir_imm_int(b, 0)); 151 nir_ssa_def *val = 152 nir_ior(b, nir_ishl(b, nir_channel(b, word, 1), nir_imm_int(b, 16)), 153 nir_channel(b, word, 0)); 154 155 nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(val)); 156 nir_instr_remove(&instr->instr); 157 break; 158 } 159 160 case nir_op_pack_uvec4_to_uint: { 161 assert(b->shader->options->lower_pack_snorm_4x8 || 162 b->shader->options->lower_pack_unorm_4x8); 163 164 nir_ssa_def *byte = nir_extract_u8(b, nir_ssa_for_alu_src(b, instr, 0), 165 nir_imm_int(b, 0)); 166 nir_ssa_def *val = 167 nir_ior(b, nir_ior(b, nir_ishl(b, nir_channel(b, byte, 3), nir_imm_int(b, 24)), 168 nir_ishl(b, nir_channel(b, byte, 2), nir_imm_int(b, 16))), 169 nir_ior(b, nir_ishl(b, nir_channel(b, byte, 1), nir_imm_int(b, 8)), 170 nir_channel(b, byte, 0))); 171 172 nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(val)); 173 nir_instr_remove(&instr->instr); 174 break; 175 } 176 177 case nir_op_fdph: { 178 nir_ssa_def *src0_vec = nir_ssa_for_alu_src(b, instr, 0); 179 nir_ssa_def *src1_vec = nir_ssa_for_alu_src(b, instr, 1); 180 181 nir_ssa_def *sum[4]; 182 for (unsigned i = 0; i < 3; i++) { 183 sum[i] = nir_fmul(b, nir_channel(b, src0_vec, i), 184 nir_channel(b, src1_vec, i)); 185 } 186 sum[3] = nir_channel(b, src1_vec, 3); 187 188 nir_ssa_def *val = nir_fadd(b, nir_fadd(b, sum[0], sum[1]), 189 nir_fadd(b, sum[2], sum[3])); 190 191 nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(val)); 192 nir_instr_remove(&instr->instr); 193 return true; 194 } 195 196 case nir_op_unpack_64_2x32: 197 case nir_op_unpack_32_2x16: 198 return false; 199 200 LOWER_REDUCTION(nir_op_fdot, nir_op_fmul, nir_op_fadd); 201 LOWER_REDUCTION(nir_op_ball_fequal, nir_op_feq, nir_op_iand); 202 LOWER_REDUCTION(nir_op_ball_iequal, nir_op_ieq, nir_op_iand); 203 LOWER_REDUCTION(nir_op_bany_fnequal, nir_op_fne, nir_op_ior); 204 LOWER_REDUCTION(nir_op_bany_inequal, nir_op_ine, nir_op_ior); 205 LOWER_REDUCTION(nir_op_b32all_fequal, nir_op_feq32, nir_op_iand); 206 LOWER_REDUCTION(nir_op_b32all_iequal, nir_op_ieq32, nir_op_iand); 207 LOWER_REDUCTION(nir_op_b32any_fnequal, nir_op_fne32, nir_op_ior); 208 LOWER_REDUCTION(nir_op_b32any_inequal, nir_op_ine32, nir_op_ior); 209 LOWER_REDUCTION(nir_op_fall_equal, nir_op_seq, nir_op_fand); 210 LOWER_REDUCTION(nir_op_fany_nequal, nir_op_sne, nir_op_for); 211 212 default: 213 break; 214 } 215 216 if (instr->dest.dest.ssa.num_components == 1) 217 return false; 218 219 unsigned num_components = instr->dest.dest.ssa.num_components; 220 nir_ssa_def *comps[NIR_MAX_VEC_COMPONENTS] = { NULL }; 221 222 for (chan = 0; chan < NIR_MAX_VEC_COMPONENTS; chan++) { 223 if (!(instr->dest.write_mask & (1 << chan))) 224 continue; 225 226 nir_alu_instr *lower = nir_alu_instr_create(b->shader, instr->op); 227 for (i = 0; i < num_src; i++) { 228 /* We only handle same-size-as-dest (input_sizes[] == 0) or scalar 229 * args (input_sizes[] == 1). 230 */ 231 assert(nir_op_infos[instr->op].input_sizes[i] < 2); 232 unsigned src_chan = (nir_op_infos[instr->op].input_sizes[i] == 1 ? 233 0 : chan); 234 235 nir_alu_src_copy(&lower->src[i], &instr->src[i], lower); 236 for (int j = 0; j < NIR_MAX_VEC_COMPONENTS; j++) 237 lower->src[i].swizzle[j] = instr->src[i].swizzle[src_chan]; 238 } 239 240 nir_alu_ssa_dest_init(lower, 1, instr->dest.dest.ssa.bit_size); 241 lower->dest.saturate = instr->dest.saturate; 242 comps[chan] = &lower->dest.dest.ssa; 243 lower->exact = instr->exact; 244 245 nir_builder_instr_insert(b, &lower->instr); 246 } 247 248 nir_ssa_def *vec = nir_vec(b, comps, num_components); 249 250 nir_ssa_def_rewrite_uses(&instr->dest.dest.ssa, nir_src_for_ssa(vec)); 251 252 nir_instr_remove(&instr->instr); 253 return true; 254} 255 256static bool 257nir_lower_alu_to_scalar_impl(nir_function_impl *impl) 258{ 259 nir_builder builder; 260 nir_builder_init(&builder, impl); 261 bool progress = false; 262 263 nir_foreach_block(block, impl) { 264 nir_foreach_instr_safe(instr, block) { 265 if (instr->type == nir_instr_type_alu) { 266 progress = lower_alu_instr_scalar(nir_instr_as_alu(instr), 267 &builder) || progress; 268 } 269 } 270 } 271 272 nir_metadata_preserve(impl, nir_metadata_block_index | 273 nir_metadata_dominance); 274 275 return progress; 276} 277 278bool 279nir_lower_alu_to_scalar(nir_shader *shader) 280{ 281 bool progress = false; 282 283 nir_foreach_function(function, shader) { 284 if (function->impl) 285 progress = nir_lower_alu_to_scalar_impl(function->impl) || progress; 286 } 287 288 return progress; 289} 290