1/*
2 * Copyright (C) 2012-2013 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 *    Rob Clark <robclark@freedesktop.org>
25 */
26
27#include "pipe/p_state.h"
28#include "util/u_string.h"
29#include "util/u_memory.h"
30#include "util/u_inlines.h"
31
32#include "fd2_texture.h"
33#include "fd2_util.h"
34
35static enum sq_tex_clamp
36tex_clamp(unsigned wrap)
37{
38	switch (wrap) {
39	case PIPE_TEX_WRAP_REPEAT:
40		return SQ_TEX_WRAP;
41	case PIPE_TEX_WRAP_CLAMP:
42		return SQ_TEX_CLAMP_HALF_BORDER;
43	case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
44		return SQ_TEX_CLAMP_LAST_TEXEL;
45	case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
46		return SQ_TEX_CLAMP_BORDER;
47	case PIPE_TEX_WRAP_MIRROR_REPEAT:
48		return SQ_TEX_MIRROR;
49	case PIPE_TEX_WRAP_MIRROR_CLAMP:
50		return SQ_TEX_MIRROR_ONCE_HALF_BORDER;
51	case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
52		return SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
53	case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
54		return SQ_TEX_MIRROR_ONCE_BORDER;
55	default:
56		DBG("invalid wrap: %u", wrap);
57		return 0;
58	}
59}
60
61static enum sq_tex_filter
62tex_filter(unsigned filter)
63{
64	switch (filter) {
65	case PIPE_TEX_FILTER_NEAREST:
66		return SQ_TEX_FILTER_POINT;
67	case PIPE_TEX_FILTER_LINEAR:
68		return SQ_TEX_FILTER_BILINEAR;
69	default:
70		DBG("invalid filter: %u", filter);
71		return 0;
72	}
73}
74
75static enum sq_tex_filter
76mip_filter(unsigned filter)
77{
78	switch (filter) {
79	case PIPE_TEX_MIPFILTER_NONE:
80		return SQ_TEX_FILTER_BASEMAP;
81	case PIPE_TEX_MIPFILTER_NEAREST:
82		return SQ_TEX_FILTER_POINT;
83	case PIPE_TEX_MIPFILTER_LINEAR:
84		return SQ_TEX_FILTER_BILINEAR;
85	default:
86		DBG("invalid filter: %u", filter);
87		return 0;
88	}
89}
90
91static void *
92fd2_sampler_state_create(struct pipe_context *pctx,
93		const struct pipe_sampler_state *cso)
94{
95	struct fd2_sampler_stateobj *so = CALLOC_STRUCT(fd2_sampler_stateobj);
96
97	if (!so)
98		return NULL;
99
100	so->base = *cso;
101
102	/* TODO
103	 * cso->max_anisotropy
104	 * cso->normalized_coords (dealt with by shader for rect textures?)
105	 */
106
107	/* SQ_TEX0_PITCH() must be OR'd in later when we know the bound texture: */
108	so->tex0 =
109		A2XX_SQ_TEX_0_CLAMP_X(tex_clamp(cso->wrap_s)) |
110		A2XX_SQ_TEX_0_CLAMP_Y(tex_clamp(cso->wrap_t)) |
111		A2XX_SQ_TEX_0_CLAMP_Z(tex_clamp(cso->wrap_r));
112
113	so->tex3 =
114		A2XX_SQ_TEX_3_XY_MAG_FILTER(tex_filter(cso->mag_img_filter)) |
115		A2XX_SQ_TEX_3_XY_MIN_FILTER(tex_filter(cso->min_img_filter)) |
116		A2XX_SQ_TEX_3_MIP_FILTER(mip_filter(cso->min_mip_filter));
117
118	so->tex4 = 0;
119	if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE)
120		so->tex4 = A2XX_SQ_TEX_4_LOD_BIAS(cso->lod_bias);
121
122	return so;
123}
124
125static void
126fd2_sampler_states_bind(struct pipe_context *pctx,
127		enum pipe_shader_type shader, unsigned start,
128		unsigned nr, void **hwcso)
129{
130	if (!hwcso)
131		nr = 0;
132
133	if (shader == PIPE_SHADER_FRAGMENT) {
134		struct fd_context *ctx = fd_context(pctx);
135
136		/* on a2xx, since there is a flat address space for textures/samplers,
137		 * a change in # of fragment textures/samplers will trigger patching and
138		 * re-emitting the vertex shader:
139		 */
140		if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers)
141			ctx->dirty |= FD_DIRTY_TEXSTATE;
142	}
143
144	fd_sampler_states_bind(pctx, shader, start, nr, hwcso);
145}
146
147static enum sq_tex_dimension
148tex_dimension(unsigned target)
149{
150	switch (target) {
151	default:
152		assert(0);
153	case PIPE_TEXTURE_1D:
154		assert(0); /* TODO */
155		return SQ_TEX_DIMENSION_1D;
156	case PIPE_TEXTURE_RECT:
157	case PIPE_TEXTURE_2D:
158		return SQ_TEX_DIMENSION_2D;
159	case PIPE_TEXTURE_3D:
160		assert(0); /* TODO */
161		return SQ_TEX_DIMENSION_3D;
162	case PIPE_TEXTURE_CUBE:
163		return SQ_TEX_DIMENSION_CUBE;
164	}
165}
166
167static struct pipe_sampler_view *
168fd2_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
169		const struct pipe_sampler_view *cso)
170{
171	struct fd2_pipe_sampler_view *so = CALLOC_STRUCT(fd2_pipe_sampler_view);
172	struct fd_resource *rsc = fd_resource(prsc);
173
174	if (!so)
175		return NULL;
176
177	so->base = *cso;
178	pipe_reference(NULL, &prsc->reference);
179	so->base.texture = prsc;
180	so->base.reference.count = 1;
181	so->base.context = pctx;
182
183	so->tex0 = A2XX_SQ_TEX_0_PITCH(rsc->slices[0].pitch);
184	so->tex1 =
185		A2XX_SQ_TEX_1_FORMAT(fd2_pipe2surface(cso->format)) |
186		A2XX_SQ_TEX_1_CLAMP_POLICY(SQ_TEX_CLAMP_POLICY_OGL);
187	so->tex2 =
188		A2XX_SQ_TEX_2_HEIGHT(prsc->height0 - 1) |
189		A2XX_SQ_TEX_2_WIDTH(prsc->width0 - 1);
190	so->tex3 = fd2_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g,
191			cso->swizzle_b, cso->swizzle_a);
192
193	so->tex4 =
194		A2XX_SQ_TEX_4_MIP_MIN_LEVEL(fd_sampler_first_level(cso)) |
195		A2XX_SQ_TEX_4_MIP_MAX_LEVEL(fd_sampler_last_level(cso));
196
197	so->tex5 = A2XX_SQ_TEX_5_DIMENSION(tex_dimension(prsc->target));
198
199	return &so->base;
200}
201
202static void
203fd2_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
204		unsigned start, unsigned nr,
205		struct pipe_sampler_view **views)
206{
207	if (shader == PIPE_SHADER_FRAGMENT) {
208		struct fd_context *ctx = fd_context(pctx);
209
210		/* on a2xx, since there is a flat address space for textures/samplers,
211		 * a change in # of fragment textures/samplers will trigger patching and
212		 * re-emitting the vertex shader:
213		 */
214		if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_textures)
215			ctx->dirty |= FD_DIRTY_TEXSTATE;
216	}
217
218	fd_set_sampler_views(pctx, shader, start, nr, views);
219}
220
221/* map gallium sampler-id to hw const-idx.. adreno uses a flat address
222 * space of samplers (const-idx), so we need to map the gallium sampler-id
223 * which is per-shader to a global const-idx space.
224 *
225 * Fragment shader sampler maps directly to const-idx, and vertex shader
226 * is offset by the # of fragment shader samplers.  If the # of fragment
227 * shader samplers changes, this shifts the vertex shader indexes.
228 *
229 * TODO maybe we can do frag shader 0..N  and vert shader N..0 to avoid
230 * this??
231 */
232unsigned
233fd2_get_const_idx(struct fd_context *ctx, struct fd_texture_stateobj *tex,
234		unsigned samp_id)
235{
236	if (tex == &ctx->tex[PIPE_SHADER_FRAGMENT])
237		return samp_id;
238	return samp_id + ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers;
239}
240
241/* for reasons unknown, it appears ETC1 cubemap needs swapped xy coordinates */
242bool fd2_texture_swap_xy(struct fd_texture_stateobj *tex, unsigned samp_id)
243{
244	return tex->textures[samp_id]->format == PIPE_FORMAT_ETC1_RGB8 &&
245		tex->textures[samp_id]->texture->target == PIPE_TEXTURE_CUBE;
246}
247
248void
249fd2_texture_init(struct pipe_context *pctx)
250{
251	pctx->create_sampler_state = fd2_sampler_state_create;
252	pctx->bind_sampler_states = fd2_sampler_states_bind;
253	pctx->create_sampler_view = fd2_sampler_view_create;
254	pctx->set_sampler_views = fd2_set_sampler_views;
255}
256