1848b8605Smrg/**************************************************************************
2848b8605Smrg *
3848b8605Smrg * Copyright 2003 VMware, Inc.
4848b8605Smrg * All Rights Reserved.
5848b8605Smrg *
6848b8605Smrg * Permission is hereby granted, free of charge, to any person obtaining a
7848b8605Smrg * copy of this software and associated documentation files (the
8848b8605Smrg * "Software"), to deal in the Software without restriction, including
9848b8605Smrg * without limitation the rights to use, copy, modify, merge, publish,
10848b8605Smrg * distribute, sub license, and/or sell copies of the Software, and to
11848b8605Smrg * permit persons to whom the Software is furnished to do so, subject to
12848b8605Smrg * the following conditions:
13848b8605Smrg *
14848b8605Smrg * The above copyright notice and this permission notice (including the
15848b8605Smrg * next paragraph) shall be included in all copies or substantial portions
16848b8605Smrg * of the Software.
17848b8605Smrg *
18848b8605Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19848b8605Smrg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20848b8605Smrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21848b8605Smrg * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22848b8605Smrg * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23848b8605Smrg * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24848b8605Smrg * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25848b8605Smrg *
26848b8605Smrg **************************************************************************/
27848b8605Smrg
28848b8605Smrg
29848b8605Smrg#ifndef I915_FPC_H
30848b8605Smrg#define I915_FPC_H
31848b8605Smrg
32848b8605Smrg
33848b8605Smrg#include "i915_context.h"
34848b8605Smrg#include "i915_reg.h"
35848b8605Smrg
36848b8605Smrg#include "pipe/p_shader_tokens.h"
37848b8605Smrg
38848b8605Smrg#include "tgsi/tgsi_parse.h"
39848b8605Smrg
40848b8605Smrg#define I915_PROGRAM_SIZE 192
41848b8605Smrg
42848b8605Smrg/* Use those indices for pos/face routing, must be >= num of inputs */
43848b8605Smrg#define I915_SEMANTIC_POS  100
44848b8605Smrg#define I915_SEMANTIC_FACE 101
45848b8605Smrg
46848b8605Smrg
47848b8605Smrg/**
48848b8605Smrg * Program translation state
49848b8605Smrg */
50848b8605Smrgstruct i915_fp_compile {
51848b8605Smrg   struct i915_fragment_shader *shader;  /* the shader we're compiling */
52848b8605Smrg
53848b8605Smrg   boolean used_constants[I915_MAX_CONSTANT];
54848b8605Smrg
55848b8605Smrg   /** maps TGSI immediate index to constant slot */
56848b8605Smrg   uint num_immediates;
57848b8605Smrg   uint immediates_map[I915_MAX_CONSTANT];
58848b8605Smrg   float immediates[I915_MAX_CONSTANT][4];
59848b8605Smrg
60848b8605Smrg   boolean first_instruction;
61848b8605Smrg
62848b8605Smrg   uint declarations[I915_PROGRAM_SIZE];
63848b8605Smrg   uint program[I915_PROGRAM_SIZE];
64848b8605Smrg
65848b8605Smrg   uint *csr;            /**< Cursor, points into program. */
66848b8605Smrg
67848b8605Smrg   uint *decl;           /**< Cursor, points into declarations. */
68848b8605Smrg
69848b8605Smrg   uint decl_s;          /**< flags for which s regs need to be decl'd */
70848b8605Smrg   uint decl_t;          /**< flags for which t regs need to be decl'd */
71848b8605Smrg
72848b8605Smrg   uint temp_flag;       /**< Tracks temporary regs which are in use */
73848b8605Smrg   uint utemp_flag;      /**< Tracks TYPE_U temporary regs which are in use */
74848b8605Smrg
75b8e80941Smrg   uint register_phases[I915_MAX_TEMPORARY];
76848b8605Smrg   uint nr_tex_indirect;
77848b8605Smrg   uint nr_tex_insn;
78848b8605Smrg   uint nr_alu_insn;
79848b8605Smrg   uint nr_decl_insn;
80848b8605Smrg
81848b8605Smrg   boolean error;      /**< Set if i915_program_error() is called */
82848b8605Smrg   uint NumNativeInstructions;
83848b8605Smrg   uint NumNativeAluInstructions;
84848b8605Smrg   uint NumNativeTexInstructions;
85848b8605Smrg   uint NumNativeTexIndirections;
86848b8605Smrg};
87848b8605Smrg
88848b8605Smrg
89848b8605Smrg/* Having zero and one in here makes the definition of swizzle a lot
90848b8605Smrg * easier.
91848b8605Smrg */
92848b8605Smrg#define UREG_TYPE_SHIFT               29
93848b8605Smrg#define UREG_NR_SHIFT                 24
94848b8605Smrg#define UREG_CHANNEL_X_NEGATE_SHIFT   23
95848b8605Smrg#define UREG_CHANNEL_X_SHIFT          20
96848b8605Smrg#define UREG_CHANNEL_Y_NEGATE_SHIFT   19
97848b8605Smrg#define UREG_CHANNEL_Y_SHIFT          16
98848b8605Smrg#define UREG_CHANNEL_Z_NEGATE_SHIFT   15
99848b8605Smrg#define UREG_CHANNEL_Z_SHIFT          12
100848b8605Smrg#define UREG_CHANNEL_W_NEGATE_SHIFT   11
101848b8605Smrg#define UREG_CHANNEL_W_SHIFT          8
102848b8605Smrg#define UREG_CHANNEL_ZERO_NEGATE_MBZ  5
103848b8605Smrg#define UREG_CHANNEL_ZERO_SHIFT       4
104848b8605Smrg#define UREG_CHANNEL_ONE_NEGATE_MBZ   1
105848b8605Smrg#define UREG_CHANNEL_ONE_SHIFT        0
106848b8605Smrg
107848b8605Smrg#define UREG_BAD          0xffffffff    /* not a valid ureg */
108848b8605Smrg
109848b8605Smrg#define X    SRC_X
110848b8605Smrg#define Y    SRC_Y
111848b8605Smrg#define Z    SRC_Z
112848b8605Smrg#define W    SRC_W
113848b8605Smrg#define ZERO SRC_ZERO
114848b8605Smrg#define ONE  SRC_ONE
115848b8605Smrg
116848b8605Smrg/* Construct a ureg:
117848b8605Smrg */
118848b8605Smrg#define UREG( type, nr ) (((type)<< UREG_TYPE_SHIFT) |		\
119848b8605Smrg			  ((nr)  << UREG_NR_SHIFT) |		\
120848b8605Smrg			  (X     << UREG_CHANNEL_X_SHIFT) |	\
121848b8605Smrg			  (Y     << UREG_CHANNEL_Y_SHIFT) |	\
122848b8605Smrg			  (Z     << UREG_CHANNEL_Z_SHIFT) |	\
123848b8605Smrg			  (W     << UREG_CHANNEL_W_SHIFT) |	\
124848b8605Smrg			  (ZERO  << UREG_CHANNEL_ZERO_SHIFT) |	\
125848b8605Smrg			  (ONE   << UREG_CHANNEL_ONE_SHIFT))
126848b8605Smrg
127848b8605Smrg#define GET_CHANNEL_SRC( reg, channel ) ((reg<<(channel*4)) & (0xf<<20))
128848b8605Smrg#define CHANNEL_SRC( src, channel ) (src>>(channel*4))
129848b8605Smrg
130848b8605Smrg#define GET_UREG_TYPE(reg) (((reg)>>UREG_TYPE_SHIFT)&REG_TYPE_MASK)
131848b8605Smrg#define GET_UREG_NR(reg)   (((reg)>>UREG_NR_SHIFT)&REG_NR_MASK)
132848b8605Smrg
133848b8605Smrg
134848b8605Smrg
135848b8605Smrg#define UREG_XYZW_CHANNEL_MASK 0x00ffff00
136848b8605Smrg
137848b8605Smrg/* One neat thing about the UREG representation:
138848b8605Smrg */
139b8e80941Smrgstatic inline int
140848b8605Smrgswizzle(int reg, uint x, uint y, uint z, uint w)
141848b8605Smrg{
142848b8605Smrg   assert(x <= SRC_ONE);
143848b8605Smrg   assert(y <= SRC_ONE);
144848b8605Smrg   assert(z <= SRC_ONE);
145848b8605Smrg   assert(w <= SRC_ONE);
146848b8605Smrg   return ((reg & ~UREG_XYZW_CHANNEL_MASK) |
147848b8605Smrg           CHANNEL_SRC(GET_CHANNEL_SRC(reg, x), 0) |
148848b8605Smrg           CHANNEL_SRC(GET_CHANNEL_SRC(reg, y), 1) |
149848b8605Smrg           CHANNEL_SRC(GET_CHANNEL_SRC(reg, z), 2) |
150848b8605Smrg           CHANNEL_SRC(GET_CHANNEL_SRC(reg, w), 3));
151848b8605Smrg}
152848b8605Smrg
153848b8605Smrg
154848b8605Smrg#define A0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
155848b8605Smrg#define D0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
156848b8605Smrg#define T0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
157848b8605Smrg#define A0_SRC0( reg ) (((reg)&UREG_MASK)>>UREG_A0_SRC0_SHIFT_LEFT)
158848b8605Smrg#define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT)
159848b8605Smrg#define A1_SRC1( reg ) (((reg)&UREG_MASK)>>UREG_A1_SRC1_SHIFT_LEFT)
160848b8605Smrg#define A2_SRC1( reg ) (((reg)&UREG_MASK)<<UREG_A2_SRC1_SHIFT_RIGHT)
161848b8605Smrg#define A2_SRC2( reg ) (((reg)&UREG_MASK)>>UREG_A2_SRC2_SHIFT_LEFT)
162848b8605Smrg
163848b8605Smrg/* These are special, and don't have swizzle/negate bits.
164848b8605Smrg */
165848b8605Smrg#define T0_SAMPLER( reg )     (GET_UREG_NR(reg)<<T0_SAMPLER_NR_SHIFT)
166848b8605Smrg#define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg)<<T1_ADDRESS_REG_NR_SHIFT) | \
167848b8605Smrg			       (GET_UREG_TYPE(reg)<<T1_ADDRESS_REG_TYPE_SHIFT))
168848b8605Smrg
169848b8605Smrg
170848b8605Smrg/* Macros for translating UREG's into the various register fields used
171848b8605Smrg * by the I915 programmable unit.
172848b8605Smrg */
173848b8605Smrg#define UREG_A0_DEST_SHIFT_LEFT  (UREG_TYPE_SHIFT - A0_DEST_TYPE_SHIFT)
174848b8605Smrg#define UREG_A0_SRC0_SHIFT_LEFT  (UREG_TYPE_SHIFT - A0_SRC0_TYPE_SHIFT)
175848b8605Smrg#define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
176848b8605Smrg#define UREG_A1_SRC1_SHIFT_LEFT  (UREG_TYPE_SHIFT - A1_SRC1_TYPE_SHIFT)
177848b8605Smrg#define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
178848b8605Smrg#define UREG_A2_SRC2_SHIFT_LEFT  (UREG_TYPE_SHIFT - A2_SRC2_TYPE_SHIFT)
179848b8605Smrg
180848b8605Smrg#define UREG_MASK         0xffffff00
181848b8605Smrg#define UREG_TYPE_NR_MASK ((REG_TYPE_MASK << UREG_TYPE_SHIFT) | \
182848b8605Smrg  			   (REG_NR_MASK << UREG_NR_SHIFT))
183848b8605Smrg
184848b8605Smrg
185848b8605Smrg
186848b8605Smrg
187848b8605Smrg/***********************************************************************
188848b8605Smrg * Public interface for the compiler
189848b8605Smrg */
190848b8605Smrgextern void
191848b8605Smrgi915_translate_fragment_program( struct i915_context *i915,
192848b8605Smrg                                 struct i915_fragment_shader *fs);
193848b8605Smrg
194848b8605Smrg
195848b8605Smrg
196848b8605Smrgextern uint i915_get_temp(struct i915_fp_compile *p);
197848b8605Smrgextern uint i915_get_utemp(struct i915_fp_compile *p);
198848b8605Smrgextern void i915_release_utemps(struct i915_fp_compile *p);
199848b8605Smrg
200848b8605Smrg
201848b8605Smrgextern uint i915_emit_texld(struct i915_fp_compile *p,
202848b8605Smrg                              uint dest,
203848b8605Smrg                              uint destmask,
204848b8605Smrg                              uint sampler,
205848b8605Smrg                              uint coord,
206848b8605Smrg                              uint op,
207848b8605Smrg                              uint num_coord);
208848b8605Smrg
209848b8605Smrgextern uint i915_emit_arith(struct i915_fp_compile *p,
210848b8605Smrg                              uint op,
211848b8605Smrg                              uint dest,
212848b8605Smrg                              uint mask,
213848b8605Smrg                              uint saturate,
214848b8605Smrg                              uint src0, uint src1, uint src2);
215848b8605Smrg
216848b8605Smrgextern uint i915_emit_decl(struct i915_fp_compile *p,
217848b8605Smrg                             uint type, uint nr, uint d0_flags);
218848b8605Smrg
219848b8605Smrg
220848b8605Smrgextern uint i915_emit_const1f(struct i915_fp_compile *p, float c0);
221848b8605Smrg
222848b8605Smrgextern uint i915_emit_const2f(struct i915_fp_compile *p,
223848b8605Smrg                                float c0, float c1);
224848b8605Smrg
225848b8605Smrgextern uint i915_emit_const4fv(struct i915_fp_compile *p,
226848b8605Smrg                                 const float * c);
227848b8605Smrg
228848b8605Smrgextern uint i915_emit_const4f(struct i915_fp_compile *p,
229848b8605Smrg                                float c0, float c1,
230848b8605Smrg                                float c2, float c3);
231848b8605Smrg
232848b8605Smrg
233848b8605Smrg/*======================================================================
234848b8605Smrg * i915_fpc_translate.c
235848b8605Smrg */
236848b8605Smrg
237848b8605Smrgextern void
238848b8605Smrgi915_program_error(struct i915_fp_compile *p, const char *msg, ...);
239848b8605Smrg
240848b8605Smrg
241848b8605Smrg/*======================================================================
242848b8605Smrg * i915_fpc_optimize.c
243848b8605Smrg */
244848b8605Smrg
245848b8605Smrg
246848b8605Smrgstruct i915_src_register
247848b8605Smrg{
248848b8605Smrg   unsigned File        : 4;  /* TGSI_FILE_ */
249848b8605Smrg   unsigned Indirect    : 1;  /* BOOL */
250848b8605Smrg   unsigned Dimension   : 1;  /* BOOL */
251848b8605Smrg   int      Index       : 16; /* SINT */
252848b8605Smrg   unsigned SwizzleX    : 3;  /* TGSI_SWIZZLE_ */
253848b8605Smrg   unsigned SwizzleY    : 3;  /* TGSI_SWIZZLE_ */
254848b8605Smrg   unsigned SwizzleZ    : 3;  /* TGSI_SWIZZLE_ */
255848b8605Smrg   unsigned SwizzleW    : 3;  /* TGSI_SWIZZLE_ */
256848b8605Smrg   unsigned Absolute    : 1;    /* BOOL */
257848b8605Smrg   unsigned Negate      : 1;    /* BOOL */
258848b8605Smrg};
259848b8605Smrg
260848b8605Smrg/* Additional swizzle supported in i915 */
261848b8605Smrg#define TGSI_SWIZZLE_ZERO 4
262848b8605Smrg#define TGSI_SWIZZLE_ONE 5
263848b8605Smrg
264848b8605Smrgstruct i915_dst_register
265848b8605Smrg{
266848b8605Smrg   unsigned File        : 4;  /* TGSI_FILE_ */
267848b8605Smrg   unsigned WriteMask   : 4;  /* TGSI_WRITEMASK_ */
268848b8605Smrg   unsigned Indirect    : 1;  /* BOOL */
269848b8605Smrg   unsigned Dimension   : 1;  /* BOOL */
270848b8605Smrg   int      Index       : 16; /* SINT */
271848b8605Smrg   unsigned Padding     : 6;
272848b8605Smrg};
273848b8605Smrg
274848b8605Smrg
275848b8605Smrgstruct i915_full_dst_register
276848b8605Smrg{
277848b8605Smrg   struct i915_dst_register               Register;
278848b8605Smrg/*
279848b8605Smrg   struct tgsi_ind_register               Indirect;
280848b8605Smrg   struct tgsi_dimension                  Dimension;
281848b8605Smrg   struct tgsi_ind_register               DimIndirect;
282848b8605Smrg*/
283848b8605Smrg};
284848b8605Smrg
285848b8605Smrgstruct i915_full_src_register
286848b8605Smrg{
287848b8605Smrg   struct i915_src_register         Register;
288848b8605Smrg/*
289848b8605Smrg   struct tgsi_ind_register         Indirect;
290848b8605Smrg   struct tgsi_dimension            Dimension;
291848b8605Smrg   struct tgsi_ind_register         DimIndirect;
292848b8605Smrg*/
293848b8605Smrg};
294848b8605Smrg
295848b8605Smrgstruct i915_full_instruction
296848b8605Smrg{
297848b8605Smrg   struct tgsi_instruction             Instruction;
298848b8605Smrg/*
299848b8605Smrg   struct tgsi_instruction_label       Label;
300848b8605Smrg*/
301848b8605Smrg   struct tgsi_instruction_texture     Texture;
302848b8605Smrg   struct i915_full_dst_register       Dst[1];
303848b8605Smrg   struct i915_full_src_register       Src[3];
304848b8605Smrg};
305848b8605Smrg
306848b8605Smrg
307848b8605Smrgunion i915_full_token
308848b8605Smrg{
309848b8605Smrg   struct tgsi_token             Token;
310848b8605Smrg   struct tgsi_full_declaration  FullDeclaration;
311848b8605Smrg   struct tgsi_full_immediate    FullImmediate;
312848b8605Smrg   struct i915_full_instruction  FullInstruction;
313848b8605Smrg   struct tgsi_full_property     FullProperty;
314848b8605Smrg};
315848b8605Smrg
316848b8605Smrgstruct i915_token_list
317848b8605Smrg{
318848b8605Smrg   union i915_full_token*     Tokens;
319848b8605Smrg   unsigned                   NumTokens;
320848b8605Smrg};
321848b8605Smrg
322848b8605Smrgextern struct i915_token_list* i915_optimize(const struct tgsi_token *tokens);
323848b8605Smrg
324848b8605Smrgextern void i915_optimize_free(struct i915_token_list *tokens);
325848b8605Smrg
326848b8605Smrgextern uint i915_num_coords(uint tex);
327848b8605Smrg
328848b8605Smrg#endif
329