1/* 2 * Copyright © 2017 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 23/** 24 * @file iris_formats.c 25 * 26 * Converts Gallium formats (PIPE_FORMAT_*) to hardware ones (ISL_FORMAT_*). 27 * Provides information about which formats support what features. 28 */ 29 30#include "util/bitscan.h" 31#include "util/macros.h" 32#include "util/u_format.h" 33 34#include "iris_resource.h" 35#include "iris_screen.h" 36 37static enum isl_format 38iris_isl_format_for_pipe_format(enum pipe_format pf) 39{ 40 static const enum isl_format table[PIPE_FORMAT_COUNT] = { 41 [0 ... PIPE_FORMAT_COUNT-1] = ISL_FORMAT_UNSUPPORTED, 42 43 [PIPE_FORMAT_B8G8R8A8_UNORM] = ISL_FORMAT_B8G8R8A8_UNORM, 44 [PIPE_FORMAT_B8G8R8X8_UNORM] = ISL_FORMAT_B8G8R8X8_UNORM, 45 [PIPE_FORMAT_B5G5R5A1_UNORM] = ISL_FORMAT_B5G5R5A1_UNORM, 46 [PIPE_FORMAT_B4G4R4A4_UNORM] = ISL_FORMAT_B4G4R4A4_UNORM, 47 [PIPE_FORMAT_B5G6R5_UNORM] = ISL_FORMAT_B5G6R5_UNORM, 48 [PIPE_FORMAT_R10G10B10A2_UNORM] = ISL_FORMAT_R10G10B10A2_UNORM, 49 50 [PIPE_FORMAT_Z16_UNORM] = ISL_FORMAT_R16_UNORM, 51 [PIPE_FORMAT_Z32_UNORM] = ISL_FORMAT_R32_UNORM, 52 [PIPE_FORMAT_Z32_FLOAT] = ISL_FORMAT_R32_FLOAT, 53 54 /* We translate the combined depth/stencil formats to depth only here */ 55 [PIPE_FORMAT_Z24_UNORM_S8_UINT] = ISL_FORMAT_R24_UNORM_X8_TYPELESS, 56 [PIPE_FORMAT_Z24X8_UNORM] = ISL_FORMAT_R24_UNORM_X8_TYPELESS, 57 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT] = ISL_FORMAT_R32_FLOAT, 58 59 [PIPE_FORMAT_S8_UINT] = ISL_FORMAT_R8_UINT, 60 [PIPE_FORMAT_X24S8_UINT] = ISL_FORMAT_R8_UINT, 61 [PIPE_FORMAT_X32_S8X24_UINT] = ISL_FORMAT_R8_UINT, 62 63 [PIPE_FORMAT_R64_FLOAT] = ISL_FORMAT_R64_FLOAT, 64 [PIPE_FORMAT_R64G64_FLOAT] = ISL_FORMAT_R64G64_FLOAT, 65 [PIPE_FORMAT_R64G64B64_FLOAT] = ISL_FORMAT_R64G64B64_FLOAT, 66 [PIPE_FORMAT_R64G64B64A64_FLOAT] = ISL_FORMAT_R64G64B64A64_FLOAT, 67 [PIPE_FORMAT_R32_FLOAT] = ISL_FORMAT_R32_FLOAT, 68 [PIPE_FORMAT_R32G32_FLOAT] = ISL_FORMAT_R32G32_FLOAT, 69 [PIPE_FORMAT_R32G32B32_FLOAT] = ISL_FORMAT_R32G32B32_FLOAT, 70 [PIPE_FORMAT_R32G32B32A32_FLOAT] = ISL_FORMAT_R32G32B32A32_FLOAT, 71 [PIPE_FORMAT_R32_UNORM] = ISL_FORMAT_R32_UNORM, 72 [PIPE_FORMAT_R32G32_UNORM] = ISL_FORMAT_R32G32_UNORM, 73 [PIPE_FORMAT_R32G32B32_UNORM] = ISL_FORMAT_R32G32B32_UNORM, 74 [PIPE_FORMAT_R32G32B32A32_UNORM] = ISL_FORMAT_R32G32B32A32_UNORM, 75 [PIPE_FORMAT_R32_USCALED] = ISL_FORMAT_R32_USCALED, 76 [PIPE_FORMAT_R32G32_USCALED] = ISL_FORMAT_R32G32_USCALED, 77 [PIPE_FORMAT_R32G32B32_USCALED] = ISL_FORMAT_R32G32B32_USCALED, 78 [PIPE_FORMAT_R32G32B32A32_USCALED] = ISL_FORMAT_R32G32B32A32_USCALED, 79 [PIPE_FORMAT_R32_SNORM] = ISL_FORMAT_R32_SNORM, 80 [PIPE_FORMAT_R32G32_SNORM] = ISL_FORMAT_R32G32_SNORM, 81 [PIPE_FORMAT_R32G32B32_SNORM] = ISL_FORMAT_R32G32B32_SNORM, 82 [PIPE_FORMAT_R32G32B32A32_SNORM] = ISL_FORMAT_R32G32B32A32_SNORM, 83 [PIPE_FORMAT_R32_SSCALED] = ISL_FORMAT_R32_SSCALED, 84 [PIPE_FORMAT_R32G32_SSCALED] = ISL_FORMAT_R32G32_SSCALED, 85 [PIPE_FORMAT_R32G32B32_SSCALED] = ISL_FORMAT_R32G32B32_SSCALED, 86 [PIPE_FORMAT_R32G32B32A32_SSCALED] = ISL_FORMAT_R32G32B32A32_SSCALED, 87 [PIPE_FORMAT_R16_UNORM] = ISL_FORMAT_R16_UNORM, 88 [PIPE_FORMAT_R16G16_UNORM] = ISL_FORMAT_R16G16_UNORM, 89 [PIPE_FORMAT_R16G16B16_UNORM] = ISL_FORMAT_R16G16B16_UNORM, 90 [PIPE_FORMAT_R16G16B16A16_UNORM] = ISL_FORMAT_R16G16B16A16_UNORM, 91 [PIPE_FORMAT_R16_USCALED] = ISL_FORMAT_R16_USCALED, 92 [PIPE_FORMAT_R16G16_USCALED] = ISL_FORMAT_R16G16_USCALED, 93 [PIPE_FORMAT_R16G16B16_USCALED] = ISL_FORMAT_R16G16B16_USCALED, 94 [PIPE_FORMAT_R16G16B16A16_USCALED] = ISL_FORMAT_R16G16B16A16_USCALED, 95 [PIPE_FORMAT_R16_SNORM] = ISL_FORMAT_R16_SNORM, 96 [PIPE_FORMAT_R16G16_SNORM] = ISL_FORMAT_R16G16_SNORM, 97 [PIPE_FORMAT_R16G16B16_SNORM] = ISL_FORMAT_R16G16B16_SNORM, 98 [PIPE_FORMAT_R16G16B16A16_SNORM] = ISL_FORMAT_R16G16B16A16_SNORM, 99 [PIPE_FORMAT_R16_SSCALED] = ISL_FORMAT_R16_SSCALED, 100 [PIPE_FORMAT_R16G16_SSCALED] = ISL_FORMAT_R16G16_SSCALED, 101 [PIPE_FORMAT_R16G16B16_SSCALED] = ISL_FORMAT_R16G16B16_SSCALED, 102 [PIPE_FORMAT_R16G16B16A16_SSCALED] = ISL_FORMAT_R16G16B16A16_SSCALED, 103 [PIPE_FORMAT_R8_UNORM] = ISL_FORMAT_R8_UNORM, 104 [PIPE_FORMAT_R8G8_UNORM] = ISL_FORMAT_R8G8_UNORM, 105 [PIPE_FORMAT_R8G8B8_UNORM] = ISL_FORMAT_R8G8B8_UNORM, 106 [PIPE_FORMAT_R8G8B8A8_UNORM] = ISL_FORMAT_R8G8B8A8_UNORM, 107 [PIPE_FORMAT_R8_USCALED] = ISL_FORMAT_R8_USCALED, 108 [PIPE_FORMAT_R8G8_USCALED] = ISL_FORMAT_R8G8_USCALED, 109 [PIPE_FORMAT_R8G8B8_USCALED] = ISL_FORMAT_R8G8B8_USCALED, 110 [PIPE_FORMAT_R8G8B8A8_USCALED] = ISL_FORMAT_R8G8B8A8_USCALED, 111 [PIPE_FORMAT_R8_SNORM] = ISL_FORMAT_R8_SNORM, 112 [PIPE_FORMAT_R8G8_SNORM] = ISL_FORMAT_R8G8_SNORM, 113 [PIPE_FORMAT_R8G8B8_SNORM] = ISL_FORMAT_R8G8B8_SNORM, 114 [PIPE_FORMAT_R8G8B8A8_SNORM] = ISL_FORMAT_R8G8B8A8_SNORM, 115 [PIPE_FORMAT_R8_SSCALED] = ISL_FORMAT_R8_SSCALED, 116 [PIPE_FORMAT_R8G8_SSCALED] = ISL_FORMAT_R8G8_SSCALED, 117 [PIPE_FORMAT_R8G8B8_SSCALED] = ISL_FORMAT_R8G8B8_SSCALED, 118 [PIPE_FORMAT_R8G8B8A8_SSCALED] = ISL_FORMAT_R8G8B8A8_SSCALED, 119 [PIPE_FORMAT_R32_FIXED] = ISL_FORMAT_R32_SFIXED, 120 [PIPE_FORMAT_R32G32_FIXED] = ISL_FORMAT_R32G32_SFIXED, 121 [PIPE_FORMAT_R32G32B32_FIXED] = ISL_FORMAT_R32G32B32_SFIXED, 122 [PIPE_FORMAT_R32G32B32A32_FIXED] = ISL_FORMAT_R32G32B32A32_SFIXED, 123 [PIPE_FORMAT_R16_FLOAT] = ISL_FORMAT_R16_FLOAT, 124 [PIPE_FORMAT_R16G16_FLOAT] = ISL_FORMAT_R16G16_FLOAT, 125 [PIPE_FORMAT_R16G16B16_FLOAT] = ISL_FORMAT_R16G16B16_FLOAT, 126 [PIPE_FORMAT_R16G16B16A16_FLOAT] = ISL_FORMAT_R16G16B16A16_FLOAT, 127 128 [PIPE_FORMAT_R8G8B8_SRGB] = ISL_FORMAT_R8G8B8_UNORM_SRGB, 129 [PIPE_FORMAT_B8G8R8A8_SRGB] = ISL_FORMAT_B8G8R8A8_UNORM_SRGB, 130 [PIPE_FORMAT_B8G8R8X8_SRGB] = ISL_FORMAT_B8G8R8X8_UNORM_SRGB, 131 [PIPE_FORMAT_R8G8B8A8_SRGB] = ISL_FORMAT_R8G8B8A8_UNORM_SRGB, 132 133 [PIPE_FORMAT_DXT1_RGB] = ISL_FORMAT_BC1_UNORM, 134 [PIPE_FORMAT_DXT1_RGBA] = ISL_FORMAT_BC1_UNORM, 135 [PIPE_FORMAT_DXT3_RGBA] = ISL_FORMAT_BC2_UNORM, 136 [PIPE_FORMAT_DXT5_RGBA] = ISL_FORMAT_BC3_UNORM, 137 138 [PIPE_FORMAT_DXT1_SRGB] = ISL_FORMAT_BC1_UNORM_SRGB, 139 [PIPE_FORMAT_DXT1_SRGBA] = ISL_FORMAT_BC1_UNORM_SRGB, 140 [PIPE_FORMAT_DXT3_SRGBA] = ISL_FORMAT_BC2_UNORM_SRGB, 141 [PIPE_FORMAT_DXT5_SRGBA] = ISL_FORMAT_BC3_UNORM_SRGB, 142 143 [PIPE_FORMAT_RGTC1_UNORM] = ISL_FORMAT_BC4_UNORM, 144 [PIPE_FORMAT_RGTC1_SNORM] = ISL_FORMAT_BC4_SNORM, 145 [PIPE_FORMAT_RGTC2_UNORM] = ISL_FORMAT_BC5_UNORM, 146 [PIPE_FORMAT_RGTC2_SNORM] = ISL_FORMAT_BC5_SNORM, 147 148 [PIPE_FORMAT_R10G10B10A2_USCALED] = ISL_FORMAT_R10G10B10A2_USCALED, 149 [PIPE_FORMAT_R11G11B10_FLOAT] = ISL_FORMAT_R11G11B10_FLOAT, 150 [PIPE_FORMAT_R9G9B9E5_FLOAT] = ISL_FORMAT_R9G9B9E5_SHAREDEXP, 151 [PIPE_FORMAT_R1_UNORM] = ISL_FORMAT_R1_UNORM, 152 [PIPE_FORMAT_R10G10B10X2_USCALED] = ISL_FORMAT_R10G10B10X2_USCALED, 153 [PIPE_FORMAT_B10G10R10A2_UNORM] = ISL_FORMAT_B10G10R10A2_UNORM, 154 [PIPE_FORMAT_R8G8B8X8_UNORM] = ISL_FORMAT_R8G8B8X8_UNORM, 155 156 /* Just use red formats for these - they're actually renderable, 157 * and faster to sample than the legacy L/I/A/LA formats. 158 */ 159 [PIPE_FORMAT_I8_UNORM] = ISL_FORMAT_R8_UNORM, 160 [PIPE_FORMAT_I8_UINT] = ISL_FORMAT_R8_UINT, 161 [PIPE_FORMAT_I8_SINT] = ISL_FORMAT_R8_SINT, 162 [PIPE_FORMAT_I8_SNORM] = ISL_FORMAT_R8_SNORM, 163 [PIPE_FORMAT_I16_UINT] = ISL_FORMAT_R16_UINT, 164 [PIPE_FORMAT_I16_UNORM] = ISL_FORMAT_R16_UNORM, 165 [PIPE_FORMAT_I16_SINT] = ISL_FORMAT_R16_SINT, 166 [PIPE_FORMAT_I16_SNORM] = ISL_FORMAT_R16_SNORM, 167 [PIPE_FORMAT_I16_FLOAT] = ISL_FORMAT_R16_FLOAT, 168 [PIPE_FORMAT_I32_UINT] = ISL_FORMAT_R32_UINT, 169 [PIPE_FORMAT_I32_SINT] = ISL_FORMAT_R32_SINT, 170 [PIPE_FORMAT_I32_FLOAT] = ISL_FORMAT_R32_FLOAT, 171 172 [PIPE_FORMAT_L8_UINT] = ISL_FORMAT_R8_UINT, 173 [PIPE_FORMAT_L8_UNORM] = ISL_FORMAT_R8_UNORM, 174 [PIPE_FORMAT_L8_SINT] = ISL_FORMAT_R8_SINT, 175 [PIPE_FORMAT_L8_SNORM] = ISL_FORMAT_R8_SNORM, 176 [PIPE_FORMAT_L16_UINT] = ISL_FORMAT_R16_UINT, 177 [PIPE_FORMAT_L16_UNORM] = ISL_FORMAT_R16_UNORM, 178 [PIPE_FORMAT_L16_SINT] = ISL_FORMAT_R16_SINT, 179 [PIPE_FORMAT_L16_SNORM] = ISL_FORMAT_R16_SNORM, 180 [PIPE_FORMAT_L16_FLOAT] = ISL_FORMAT_R16_FLOAT, 181 [PIPE_FORMAT_L32_UINT] = ISL_FORMAT_R32_UINT, 182 [PIPE_FORMAT_L32_SINT] = ISL_FORMAT_R32_SINT, 183 [PIPE_FORMAT_L32_FLOAT] = ISL_FORMAT_R32_FLOAT, 184 185 /* We also map alpha and luminance-alpha formats to red as well, 186 * though most of these (other than A8_UNORM) will be non-renderable. 187 */ 188 [PIPE_FORMAT_A8_UINT] = ISL_FORMAT_R8_UINT, 189 [PIPE_FORMAT_A8_UNORM] = ISL_FORMAT_R8_UNORM, 190 [PIPE_FORMAT_A8_SINT] = ISL_FORMAT_R8_SINT, 191 [PIPE_FORMAT_A8_SNORM] = ISL_FORMAT_R8_SNORM, 192 [PIPE_FORMAT_A16_UINT] = ISL_FORMAT_R16_UINT, 193 [PIPE_FORMAT_A16_UNORM] = ISL_FORMAT_R16_UNORM, 194 [PIPE_FORMAT_A16_SINT] = ISL_FORMAT_R16_SINT, 195 [PIPE_FORMAT_A16_SNORM] = ISL_FORMAT_R16_SNORM, 196 [PIPE_FORMAT_A16_FLOAT] = ISL_FORMAT_R16_FLOAT, 197 [PIPE_FORMAT_A32_UINT] = ISL_FORMAT_R32_UINT, 198 [PIPE_FORMAT_A32_SINT] = ISL_FORMAT_R32_SINT, 199 [PIPE_FORMAT_A32_FLOAT] = ISL_FORMAT_R32_FLOAT, 200 201 [PIPE_FORMAT_L8A8_UINT] = ISL_FORMAT_R8G8_UINT, 202 [PIPE_FORMAT_L8A8_UNORM] = ISL_FORMAT_R8G8_UNORM, 203 [PIPE_FORMAT_L8A8_SINT] = ISL_FORMAT_R8G8_SINT, 204 [PIPE_FORMAT_L8A8_SNORM] = ISL_FORMAT_R8G8_SNORM, 205 [PIPE_FORMAT_L16A16_UINT] = ISL_FORMAT_R16G16_UINT, 206 [PIPE_FORMAT_L16A16_UNORM] = ISL_FORMAT_R16G16_UNORM, 207 [PIPE_FORMAT_L16A16_SINT] = ISL_FORMAT_R16G16_SINT, 208 [PIPE_FORMAT_L16A16_SNORM] = ISL_FORMAT_R16G16_SNORM, 209 [PIPE_FORMAT_L16A16_FLOAT] = ISL_FORMAT_R16G16_FLOAT, 210 [PIPE_FORMAT_L32A32_UINT] = ISL_FORMAT_R32G32_UINT, 211 [PIPE_FORMAT_L32A32_SINT] = ISL_FORMAT_R32G32_SINT, 212 [PIPE_FORMAT_L32A32_FLOAT] = ISL_FORMAT_R32G32_FLOAT, 213 214 /* Sadly, we have to use luminance[-alpha] formats for sRGB decoding. */ 215 [PIPE_FORMAT_R8_SRGB] = ISL_FORMAT_L8_UNORM_SRGB, 216 [PIPE_FORMAT_L8_SRGB] = ISL_FORMAT_L8_UNORM_SRGB, 217 [PIPE_FORMAT_L8A8_SRGB] = ISL_FORMAT_L8A8_UNORM_SRGB, 218 219 [PIPE_FORMAT_R10G10B10A2_SSCALED] = ISL_FORMAT_R10G10B10A2_SSCALED, 220 [PIPE_FORMAT_R10G10B10A2_SNORM] = ISL_FORMAT_R10G10B10A2_SNORM, 221 222 [PIPE_FORMAT_B10G10R10A2_USCALED] = ISL_FORMAT_B10G10R10A2_USCALED, 223 [PIPE_FORMAT_B10G10R10A2_SSCALED] = ISL_FORMAT_B10G10R10A2_SSCALED, 224 [PIPE_FORMAT_B10G10R10A2_SNORM] = ISL_FORMAT_B10G10R10A2_SNORM, 225 226 [PIPE_FORMAT_R8_UINT] = ISL_FORMAT_R8_UINT, 227 [PIPE_FORMAT_R8G8_UINT] = ISL_FORMAT_R8G8_UINT, 228 [PIPE_FORMAT_R8G8B8_UINT] = ISL_FORMAT_R8G8B8_UINT, 229 [PIPE_FORMAT_R8G8B8A8_UINT] = ISL_FORMAT_R8G8B8A8_UINT, 230 231 [PIPE_FORMAT_R8_SINT] = ISL_FORMAT_R8_SINT, 232 [PIPE_FORMAT_R8G8_SINT] = ISL_FORMAT_R8G8_SINT, 233 [PIPE_FORMAT_R8G8B8_SINT] = ISL_FORMAT_R8G8B8_SINT, 234 [PIPE_FORMAT_R8G8B8A8_SINT] = ISL_FORMAT_R8G8B8A8_SINT, 235 236 [PIPE_FORMAT_R16_UINT] = ISL_FORMAT_R16_UINT, 237 [PIPE_FORMAT_R16G16_UINT] = ISL_FORMAT_R16G16_UINT, 238 [PIPE_FORMAT_R16G16B16_UINT] = ISL_FORMAT_R16G16B16_UINT, 239 [PIPE_FORMAT_R16G16B16A16_UINT] = ISL_FORMAT_R16G16B16A16_UINT, 240 241 [PIPE_FORMAT_R16_SINT] = ISL_FORMAT_R16_SINT, 242 [PIPE_FORMAT_R16G16_SINT] = ISL_FORMAT_R16G16_SINT, 243 [PIPE_FORMAT_R16G16B16_SINT] = ISL_FORMAT_R16G16B16_SINT, 244 [PIPE_FORMAT_R16G16B16A16_SINT] = ISL_FORMAT_R16G16B16A16_SINT, 245 246 [PIPE_FORMAT_R32_UINT] = ISL_FORMAT_R32_UINT, 247 [PIPE_FORMAT_R32G32_UINT] = ISL_FORMAT_R32G32_UINT, 248 [PIPE_FORMAT_R32G32B32_UINT] = ISL_FORMAT_R32G32B32_UINT, 249 [PIPE_FORMAT_R32G32B32A32_UINT] = ISL_FORMAT_R32G32B32A32_UINT, 250 251 [PIPE_FORMAT_R32_SINT] = ISL_FORMAT_R32_SINT, 252 [PIPE_FORMAT_R32G32_SINT] = ISL_FORMAT_R32G32_SINT, 253 [PIPE_FORMAT_R32G32B32_SINT] = ISL_FORMAT_R32G32B32_SINT, 254 [PIPE_FORMAT_R32G32B32A32_SINT] = ISL_FORMAT_R32G32B32A32_SINT, 255 256 [PIPE_FORMAT_B10G10R10A2_UINT] = ISL_FORMAT_B10G10R10A2_UINT, 257 258 [PIPE_FORMAT_ETC1_RGB8] = ISL_FORMAT_ETC1_RGB8, 259 260 [PIPE_FORMAT_R8G8B8X8_SRGB] = ISL_FORMAT_R8G8B8X8_UNORM_SRGB, 261 [PIPE_FORMAT_B10G10R10X2_UNORM] = ISL_FORMAT_B10G10R10X2_UNORM, 262 [PIPE_FORMAT_R16G16B16X16_UNORM] = ISL_FORMAT_R16G16B16X16_UNORM, 263 [PIPE_FORMAT_R16G16B16X16_FLOAT] = ISL_FORMAT_R16G16B16X16_FLOAT, 264 [PIPE_FORMAT_R32G32B32X32_FLOAT] = ISL_FORMAT_R32G32B32X32_FLOAT, 265 266 [PIPE_FORMAT_R10G10B10A2_UINT] = ISL_FORMAT_R10G10B10A2_UINT, 267 268 [PIPE_FORMAT_B5G6R5_SRGB] = ISL_FORMAT_B5G6R5_UNORM_SRGB, 269 270 [PIPE_FORMAT_BPTC_RGBA_UNORM] = ISL_FORMAT_BC7_UNORM, 271 [PIPE_FORMAT_BPTC_SRGBA] = ISL_FORMAT_BC7_UNORM_SRGB, 272 [PIPE_FORMAT_BPTC_RGB_FLOAT] = ISL_FORMAT_BC6H_SF16, 273 [PIPE_FORMAT_BPTC_RGB_UFLOAT] = ISL_FORMAT_BC6H_UF16, 274 275 [PIPE_FORMAT_ETC2_RGB8] = ISL_FORMAT_ETC2_RGB8, 276 [PIPE_FORMAT_ETC2_SRGB8] = ISL_FORMAT_ETC2_SRGB8, 277 [PIPE_FORMAT_ETC2_RGB8A1] = ISL_FORMAT_ETC2_RGB8_PTA, 278 [PIPE_FORMAT_ETC2_SRGB8A1] = ISL_FORMAT_ETC2_SRGB8_PTA, 279 [PIPE_FORMAT_ETC2_RGBA8] = ISL_FORMAT_ETC2_EAC_RGBA8, 280 [PIPE_FORMAT_ETC2_SRGBA8] = ISL_FORMAT_ETC2_EAC_SRGB8_A8, 281 [PIPE_FORMAT_ETC2_R11_UNORM] = ISL_FORMAT_EAC_R11, 282 [PIPE_FORMAT_ETC2_R11_SNORM] = ISL_FORMAT_EAC_SIGNED_R11, 283 [PIPE_FORMAT_ETC2_RG11_UNORM] = ISL_FORMAT_EAC_RG11, 284 [PIPE_FORMAT_ETC2_RG11_SNORM] = ISL_FORMAT_EAC_SIGNED_RG11, 285 286 287 [PIPE_FORMAT_ASTC_4x4] = ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16, 288 [PIPE_FORMAT_ASTC_5x4] = ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16, 289 [PIPE_FORMAT_ASTC_5x5] = ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16, 290 [PIPE_FORMAT_ASTC_6x5] = ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16, 291 [PIPE_FORMAT_ASTC_6x6] = ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16, 292 [PIPE_FORMAT_ASTC_8x5] = ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16, 293 [PIPE_FORMAT_ASTC_8x6] = ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16, 294 [PIPE_FORMAT_ASTC_8x8] = ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16, 295 [PIPE_FORMAT_ASTC_10x5] = ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16, 296 [PIPE_FORMAT_ASTC_10x6] = ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16, 297 [PIPE_FORMAT_ASTC_10x8] = ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16, 298 [PIPE_FORMAT_ASTC_10x10] = ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16, 299 [PIPE_FORMAT_ASTC_12x10] = ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16, 300 [PIPE_FORMAT_ASTC_12x12] = ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16, 301 302 [PIPE_FORMAT_ASTC_4x4_SRGB] = ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB, 303 [PIPE_FORMAT_ASTC_5x4_SRGB] = ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB, 304 [PIPE_FORMAT_ASTC_5x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB, 305 [PIPE_FORMAT_ASTC_6x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB, 306 [PIPE_FORMAT_ASTC_6x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB, 307 [PIPE_FORMAT_ASTC_8x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB, 308 [PIPE_FORMAT_ASTC_8x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB, 309 [PIPE_FORMAT_ASTC_8x8_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB, 310 [PIPE_FORMAT_ASTC_10x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB, 311 [PIPE_FORMAT_ASTC_10x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB, 312 [PIPE_FORMAT_ASTC_10x8_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB, 313 [PIPE_FORMAT_ASTC_10x10_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB, 314 [PIPE_FORMAT_ASTC_12x10_SRGB] = ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB, 315 [PIPE_FORMAT_ASTC_12x12_SRGB] = ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB, 316 317 [PIPE_FORMAT_A1B5G5R5_UNORM] = ISL_FORMAT_A1B5G5R5_UNORM, 318 }; 319 assert(pf < PIPE_FORMAT_COUNT); 320 return table[pf]; 321} 322 323struct iris_format_info 324iris_format_for_usage(const struct gen_device_info *devinfo, 325 enum pipe_format pformat, 326 isl_surf_usage_flags_t usage) 327{ 328 enum isl_format format = iris_isl_format_for_pipe_format(pformat); 329 struct isl_swizzle swizzle = ISL_SWIZZLE_IDENTITY; 330 331 if (!util_format_is_srgb(pformat)) { 332 if (util_format_is_intensity(pformat)) { 333 swizzle = ISL_SWIZZLE(RED, RED, RED, RED); 334 } else if (util_format_is_luminance(pformat)) { 335 swizzle = ISL_SWIZZLE(RED, RED, RED, ONE); 336 } else if (util_format_is_luminance_alpha(pformat)) { 337 swizzle = ISL_SWIZZLE(RED, RED, RED, GREEN); 338 } else if (util_format_is_alpha(pformat)) { 339 swizzle = ISL_SWIZZLE(ZERO, ZERO, ZERO, RED); 340 } 341 } 342 343 if (pformat == PIPE_FORMAT_DXT1_RGB || 344 pformat == PIPE_FORMAT_DXT1_SRGB) { 345 swizzle = ISL_SWIZZLE(RED, GREEN, BLUE, ONE); 346 } 347 348 if ((usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) && 349 pformat == PIPE_FORMAT_A8_UNORM) { 350 /* Most of the hardware A/LA formats are not renderable, except 351 * for A8_UNORM. SURFACE_STATE's shader channel select fields 352 * cannot be used to swap RGB and A channels when rendering (as 353 * it could impact alpha blending), so we have to use the actual 354 * A8_UNORM format when rendering. 355 */ 356 format = ISL_FORMAT_A8_UNORM; 357 swizzle = ISL_SWIZZLE_IDENTITY; 358 } 359 360 /* We choose RGBA over RGBX for rendering the hardware doesn't support 361 * rendering to RGBX. However, when this internal override is used on Gen9+, 362 * fast clears don't work correctly. 363 * 364 * i965 fixes this by pretending to not support RGBX formats, and the higher 365 * layers of Mesa pick the RGBA format instead. Gallium doesn't work that 366 * way, and might choose a different format, like BGRX instead of RGBX, 367 * which will also cause problems when sampling from a surface fast cleared 368 * as RGBX. So we always choose RGBA instead of RGBX explicitly 369 * here. 370 */ 371 if (isl_format_is_rgbx(format) && 372 !isl_format_supports_rendering(devinfo, format)) { 373 format = isl_format_rgbx_to_rgba(format); 374 swizzle = ISL_SWIZZLE(RED, GREEN, BLUE, ONE); 375 } 376 377 return (struct iris_format_info) { .fmt = format, .swizzle = swizzle }; 378} 379 380/** 381 * The pscreen->is_format_supported() driver hook. 382 * 383 * Returns true if the given format is supported for the given usage 384 * (PIPE_BIND_*) and sample count. 385 */ 386boolean 387iris_is_format_supported(struct pipe_screen *pscreen, 388 enum pipe_format pformat, 389 enum pipe_texture_target target, 390 unsigned sample_count, 391 unsigned storage_sample_count, 392 unsigned usage) 393{ 394 struct iris_screen *screen = (struct iris_screen *) pscreen; 395 const struct gen_device_info *devinfo = &screen->devinfo; 396 uint32_t max_samples = devinfo->gen == 8 ? 8 : 16; 397 398 // XXX: msaa max 399 if (sample_count > max_samples || !util_is_power_of_two_or_zero(sample_count)) 400 return false; 401 402 if (pformat == PIPE_FORMAT_NONE) 403 return true; 404 405 enum isl_format format = iris_isl_format_for_pipe_format(pformat); 406 407 if (format == ISL_FORMAT_UNSUPPORTED) 408 return false; 409 410 const struct isl_format_layout *fmtl = isl_format_get_layout(format); 411 const bool is_integer = isl_format_has_int_channel(format); 412 bool supported = true; 413 414 if (sample_count > 1) 415 supported &= isl_format_supports_multisampling(devinfo, format); 416 417 if (usage & PIPE_BIND_DEPTH_STENCIL) { 418 supported &= format == ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS || 419 format == ISL_FORMAT_R32_FLOAT || 420 format == ISL_FORMAT_R24_UNORM_X8_TYPELESS || 421 format == ISL_FORMAT_R16_UNORM || 422 format == ISL_FORMAT_R8_UINT; 423 } 424 425 if (usage & PIPE_BIND_RENDER_TARGET) { 426 /* Alpha and luminance-alpha formats other than A8_UNORM are not 427 * renderable. For texturing, we can use R or RG formats with 428 * shader channel selects (SCS) to swizzle the data into the correct 429 * channels. But for render targets, the hardware prohibits using 430 * SCS to move shader outputs between the RGB and A channels, as it 431 * would alter what data is used for alpha blending. 432 * 433 * For BLORP, we can apply the swizzle in the shader. But for 434 * general rendering, this would mean recompiling the shader, which 435 * we'd like to avoid doing. So we mark these formats non-renderable. 436 * 437 * We do support A8_UNORM as it's required and is renderable. 438 */ 439 if (pformat != PIPE_FORMAT_A8_UNORM && 440 (util_format_is_alpha(pformat) || 441 util_format_is_luminance_alpha(pformat))) 442 supported = false; 443 444 enum isl_format rt_format = format; 445 446 if (isl_format_is_rgbx(format) && 447 !isl_format_supports_rendering(devinfo, format)) 448 rt_format = isl_format_rgbx_to_rgba(format); 449 450 supported &= isl_format_supports_rendering(devinfo, rt_format); 451 452 if (!is_integer) 453 supported &= isl_format_supports_alpha_blending(devinfo, rt_format); 454 } 455 456 if (usage & PIPE_BIND_SHADER_IMAGE) { 457 /* Dataport doesn't support compression, and we can't resolve an MCS 458 * compressed surface. (Buffer images may have sample count of 0.) 459 */ 460 supported &= sample_count <= 1; 461 462 // XXX: allow untyped reads 463 supported &= isl_format_supports_typed_reads(devinfo, format) && 464 isl_format_supports_typed_writes(devinfo, format); 465 } 466 467 if (usage & PIPE_BIND_SAMPLER_VIEW) { 468 supported &= isl_format_supports_sampling(devinfo, format); 469 if (!is_integer) 470 supported &= isl_format_supports_filtering(devinfo, format); 471 472 /* Don't advertise 3-component RGB formats. This ensures that they 473 * are renderable from an API perspective since the state tracker will 474 * fall back to RGBA or RGBX, which are renderable. We want to render 475 * internally for copies and blits, even if the application doesn't. 476 * 477 * We do need to advertise 32-bit RGB for texture buffers though. 478 */ 479 supported &= fmtl->bpb != 24 && fmtl->bpb != 48 && 480 (fmtl->bpb != 96 || target == PIPE_BUFFER); 481 } 482 483 if (usage & PIPE_BIND_VERTEX_BUFFER) 484 supported &= isl_format_supports_vertex_fetch(devinfo, format); 485 486 if (usage & PIPE_BIND_INDEX_BUFFER) { 487 supported &= format == ISL_FORMAT_R8_UINT || 488 format == ISL_FORMAT_R16_UINT || 489 format == ISL_FORMAT_R32_UINT; 490 } 491 492 if (usage & PIPE_BIND_CONSTANT_BUFFER) { 493 // XXX: 494 } 495 496 if (usage & PIPE_BIND_STREAM_OUTPUT) { 497 // XXX: 498 } 499 500 if (usage & PIPE_BIND_CURSOR) { 501 // XXX: 502 } 503 504 if (usage & PIPE_BIND_CUSTOM) { 505 // XXX: 506 } 507 508 if (usage & PIPE_BIND_SHADER_BUFFER) { 509 // XXX: 510 } 511 512 if (usage & PIPE_BIND_COMPUTE_RESOURCE) { 513 // XXX: 514 } 515 516 if (usage & PIPE_BIND_COMMAND_ARGS_BUFFER) { 517 // XXX: 518 } 519 520 if (usage & PIPE_BIND_QUERY_BUFFER) { 521 // XXX: 522 } 523 524 return supported; 525} 526 527