1b8e80941Smrg/*
2b8e80941Smrg * Copyright (c) 2017-2019 Lima Project
3b8e80941Smrg *
4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5b8e80941Smrg * copy of this software and associated documentation files (the "Software"),
6b8e80941Smrg * to deal in the Software without restriction, including without limitation
7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sub license,
8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the
9b8e80941Smrg * Software is furnished to do so, subject to the following conditions:
10b8e80941Smrg *
11b8e80941Smrg * The above copyright notice and this permission notice (including the
12b8e80941Smrg * next paragraph) shall be included in all copies or substantial portions
13b8e80941Smrg * of the Software.
14b8e80941Smrg *
15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21b8e80941Smrg * DEALINGS IN THE SOFTWARE.
22b8e80941Smrg *
23b8e80941Smrg */
24b8e80941Smrg
25b8e80941Smrg#include <string.h>
26b8e80941Smrg
27b8e80941Smrg#include "util/ralloc.h"
28b8e80941Smrg#include "util/u_debug.h"
29b8e80941Smrg#include "util/u_screen.h"
30b8e80941Smrg#include "renderonly/renderonly.h"
31b8e80941Smrg
32b8e80941Smrg#include "drm-uapi/drm_fourcc.h"
33b8e80941Smrg#include "drm-uapi/lima_drm.h"
34b8e80941Smrg
35b8e80941Smrg#include "lima_screen.h"
36b8e80941Smrg#include "lima_context.h"
37b8e80941Smrg#include "lima_resource.h"
38b8e80941Smrg#include "lima_program.h"
39b8e80941Smrg#include "lima_bo.h"
40b8e80941Smrg#include "lima_fence.h"
41b8e80941Smrg#include "ir/lima_ir.h"
42b8e80941Smrg
43b8e80941Smrg#include "xf86drm.h"
44b8e80941Smrg
45b8e80941Smrgstatic void
46b8e80941Smrglima_screen_destroy(struct pipe_screen *pscreen)
47b8e80941Smrg{
48b8e80941Smrg   struct lima_screen *screen = lima_screen(pscreen);
49b8e80941Smrg
50b8e80941Smrg   if (lima_dump_command_stream) {
51b8e80941Smrg      fclose(lima_dump_command_stream);
52b8e80941Smrg      lima_dump_command_stream = NULL;
53b8e80941Smrg   }
54b8e80941Smrg
55b8e80941Smrg   slab_destroy_parent(&screen->transfer_pool);
56b8e80941Smrg
57b8e80941Smrg   if (screen->ro)
58b8e80941Smrg      free(screen->ro);
59b8e80941Smrg
60b8e80941Smrg   if (screen->pp_buffer)
61b8e80941Smrg      lima_bo_free(screen->pp_buffer);
62b8e80941Smrg
63b8e80941Smrg   lima_bo_table_fini(screen);
64b8e80941Smrg   ralloc_free(screen);
65b8e80941Smrg}
66b8e80941Smrg
67b8e80941Smrgstatic const char *
68b8e80941Smrglima_screen_get_name(struct pipe_screen *pscreen)
69b8e80941Smrg{
70b8e80941Smrg   struct lima_screen *screen = lima_screen(pscreen);
71b8e80941Smrg
72b8e80941Smrg   switch (screen->gpu_type) {
73b8e80941Smrg   case DRM_LIMA_PARAM_GPU_ID_MALI400:
74b8e80941Smrg     return "Mali400";
75b8e80941Smrg   case DRM_LIMA_PARAM_GPU_ID_MALI450:
76b8e80941Smrg     return "Mali450";
77b8e80941Smrg   }
78b8e80941Smrg
79b8e80941Smrg   return NULL;
80b8e80941Smrg}
81b8e80941Smrg
82b8e80941Smrgstatic const char *
83b8e80941Smrglima_screen_get_vendor(struct pipe_screen *pscreen)
84b8e80941Smrg{
85b8e80941Smrg   return "lima";
86b8e80941Smrg}
87b8e80941Smrg
88b8e80941Smrgstatic const char *
89b8e80941Smrglima_screen_get_device_vendor(struct pipe_screen *pscreen)
90b8e80941Smrg{
91b8e80941Smrg   return "ARM";
92b8e80941Smrg}
93b8e80941Smrg
94b8e80941Smrgstatic int
95b8e80941Smrglima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
96b8e80941Smrg{
97b8e80941Smrg   switch (param) {
98b8e80941Smrg   case PIPE_CAP_NPOT_TEXTURES:
99b8e80941Smrg   case PIPE_CAP_BLEND_EQUATION_SEPARATE:
100b8e80941Smrg   case PIPE_CAP_ACCELERATED:
101b8e80941Smrg   case PIPE_CAP_UMA:
102b8e80941Smrg   case PIPE_CAP_NATIVE_FENCE_FD:
103b8e80941Smrg      return 1;
104b8e80941Smrg
105b8e80941Smrg   /* Unimplemented, but for exporting OpenGL 2.0 */
106b8e80941Smrg   case PIPE_CAP_OCCLUSION_QUERY:
107b8e80941Smrg   case PIPE_CAP_POINT_SPRITE:
108b8e80941Smrg      return 1;
109b8e80941Smrg
110b8e80941Smrg   /* not clear supported */
111b8e80941Smrg   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
112b8e80941Smrg   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
113b8e80941Smrg   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
114b8e80941Smrg   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
115b8e80941Smrg      return 1;
116b8e80941Smrg
117b8e80941Smrg   case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
118b8e80941Smrg      return 1;
119b8e80941Smrg
120b8e80941Smrg   case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
121b8e80941Smrg   case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
122b8e80941Smrg   case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
123b8e80941Smrg      return LIMA_MAX_MIP_LEVELS;
124b8e80941Smrg
125b8e80941Smrg   case PIPE_CAP_VENDOR_ID:
126b8e80941Smrg      return 0x13B5;
127b8e80941Smrg
128b8e80941Smrg   case PIPE_CAP_VIDEO_MEMORY:
129b8e80941Smrg      return 0;
130b8e80941Smrg
131b8e80941Smrg   case PIPE_CAP_PCI_GROUP:
132b8e80941Smrg   case PIPE_CAP_PCI_BUS:
133b8e80941Smrg   case PIPE_CAP_PCI_DEVICE:
134b8e80941Smrg   case PIPE_CAP_PCI_FUNCTION:
135b8e80941Smrg      return 0;
136b8e80941Smrg
137b8e80941Smrg   case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
138b8e80941Smrg      return 0;
139b8e80941Smrg
140b8e80941Smrg   default:
141b8e80941Smrg      return u_pipe_screen_get_param_defaults(pscreen, param);
142b8e80941Smrg   }
143b8e80941Smrg}
144b8e80941Smrg
145b8e80941Smrgstatic float
146b8e80941Smrglima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
147b8e80941Smrg{
148b8e80941Smrg   switch (param) {
149b8e80941Smrg   case PIPE_CAPF_MAX_LINE_WIDTH:
150b8e80941Smrg   case PIPE_CAPF_MAX_LINE_WIDTH_AA:
151b8e80941Smrg   case PIPE_CAPF_MAX_POINT_WIDTH:
152b8e80941Smrg   case PIPE_CAPF_MAX_POINT_WIDTH_AA:
153b8e80941Smrg      return 255.0f;
154b8e80941Smrg   case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
155b8e80941Smrg      return 16.0f;
156b8e80941Smrg   case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
157b8e80941Smrg      return 16.0f;
158b8e80941Smrg
159b8e80941Smrg   default:
160b8e80941Smrg      return 0.0f;
161b8e80941Smrg   }
162b8e80941Smrg}
163b8e80941Smrg
164b8e80941Smrgstatic int
165b8e80941Smrgget_vertex_shader_param(struct lima_screen *screen,
166b8e80941Smrg                        enum pipe_shader_cap param)
167b8e80941Smrg{
168b8e80941Smrg   switch (param) {
169b8e80941Smrg   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
170b8e80941Smrg   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
171b8e80941Smrg   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
172b8e80941Smrg   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
173b8e80941Smrg      return 16384; /* need investigate */
174b8e80941Smrg
175b8e80941Smrg   case PIPE_SHADER_CAP_MAX_INPUTS:
176b8e80941Smrg      return 16; /* attributes */
177b8e80941Smrg
178b8e80941Smrg   case PIPE_SHADER_CAP_MAX_OUTPUTS:
179b8e80941Smrg      return LIMA_MAX_VARYING_NUM; /* varying */
180b8e80941Smrg
181b8e80941Smrg   case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
182b8e80941Smrg      return 4096; /* need investigate */
183b8e80941Smrg   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
184b8e80941Smrg      return 1;
185b8e80941Smrg
186b8e80941Smrg   case PIPE_SHADER_CAP_PREFERRED_IR:
187b8e80941Smrg      return PIPE_SHADER_IR_NIR;
188b8e80941Smrg
189b8e80941Smrg   case PIPE_SHADER_CAP_MAX_TEMPS:
190b8e80941Smrg      return 256; /* need investigate */
191b8e80941Smrg
192b8e80941Smrg   default:
193b8e80941Smrg      return 0;
194b8e80941Smrg   }
195b8e80941Smrg}
196b8e80941Smrg
197b8e80941Smrgstatic int
198b8e80941Smrgget_fragment_shader_param(struct lima_screen *screen,
199b8e80941Smrg                          enum pipe_shader_cap param)
200b8e80941Smrg{
201b8e80941Smrg   switch (param) {
202b8e80941Smrg   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
203b8e80941Smrg   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
204b8e80941Smrg   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
205b8e80941Smrg   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
206b8e80941Smrg      return 16384; /* need investigate */
207b8e80941Smrg
208b8e80941Smrg   case PIPE_SHADER_CAP_MAX_INPUTS:
209b8e80941Smrg      return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
210b8e80941Smrg
211b8e80941Smrg   case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
212b8e80941Smrg      return 4096; /* need investigate */
213b8e80941Smrg   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
214b8e80941Smrg      return 1;
215b8e80941Smrg
216b8e80941Smrg   case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
217b8e80941Smrg      return 16; /* need investigate */
218b8e80941Smrg
219b8e80941Smrg   case PIPE_SHADER_CAP_PREFERRED_IR:
220b8e80941Smrg      return PIPE_SHADER_IR_NIR;
221b8e80941Smrg
222b8e80941Smrg   case PIPE_SHADER_CAP_MAX_TEMPS:
223b8e80941Smrg      return 256; /* need investigate */
224b8e80941Smrg
225b8e80941Smrg   default:
226b8e80941Smrg      return 0;
227b8e80941Smrg   }
228b8e80941Smrg}
229b8e80941Smrg
230b8e80941Smrgstatic int
231b8e80941Smrglima_screen_get_shader_param(struct pipe_screen *pscreen,
232b8e80941Smrg                             enum pipe_shader_type shader,
233b8e80941Smrg                             enum pipe_shader_cap param)
234b8e80941Smrg{
235b8e80941Smrg   struct lima_screen *screen = lima_screen(pscreen);
236b8e80941Smrg
237b8e80941Smrg   switch (shader) {
238b8e80941Smrg   case PIPE_SHADER_FRAGMENT:
239b8e80941Smrg      return get_fragment_shader_param(screen, param);
240b8e80941Smrg   case PIPE_SHADER_VERTEX:
241b8e80941Smrg      return get_vertex_shader_param(screen, param);
242b8e80941Smrg
243b8e80941Smrg   default:
244b8e80941Smrg      return 0;
245b8e80941Smrg   }
246b8e80941Smrg}
247b8e80941Smrg
248b8e80941Smrgstatic boolean
249b8e80941Smrglima_screen_is_format_supported(struct pipe_screen *pscreen,
250b8e80941Smrg                                enum pipe_format format,
251b8e80941Smrg                                enum pipe_texture_target target,
252b8e80941Smrg                                unsigned sample_count,
253b8e80941Smrg                                unsigned storage_sample_count,
254b8e80941Smrg                                unsigned usage)
255b8e80941Smrg{
256b8e80941Smrg   switch (target) {
257b8e80941Smrg   case PIPE_BUFFER:
258b8e80941Smrg   case PIPE_TEXTURE_1D:
259b8e80941Smrg   case PIPE_TEXTURE_2D:
260b8e80941Smrg      break;
261b8e80941Smrg   default:
262b8e80941Smrg      return FALSE;
263b8e80941Smrg   }
264b8e80941Smrg
265b8e80941Smrg   if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
266b8e80941Smrg      return false;
267b8e80941Smrg
268b8e80941Smrg   /* be able to support 16, now limit to 4 */
269b8e80941Smrg   if (sample_count > 1 && sample_count != 4)
270b8e80941Smrg      return FALSE;
271b8e80941Smrg
272b8e80941Smrg   if (usage & PIPE_BIND_RENDER_TARGET) {
273b8e80941Smrg      switch (format) {
274b8e80941Smrg      case PIPE_FORMAT_B8G8R8A8_UNORM:
275b8e80941Smrg      case PIPE_FORMAT_B8G8R8X8_UNORM:
276b8e80941Smrg      case PIPE_FORMAT_R8G8B8A8_UNORM:
277b8e80941Smrg      case PIPE_FORMAT_R8G8B8X8_UNORM:
278b8e80941Smrg      case PIPE_FORMAT_Z16_UNORM:
279b8e80941Smrg      case PIPE_FORMAT_Z24_UNORM_S8_UINT:
280b8e80941Smrg      case PIPE_FORMAT_Z24X8_UNORM:
281b8e80941Smrg         break;
282b8e80941Smrg      default:
283b8e80941Smrg         return FALSE;
284b8e80941Smrg      }
285b8e80941Smrg   }
286b8e80941Smrg
287b8e80941Smrg   if (usage & PIPE_BIND_DEPTH_STENCIL) {
288b8e80941Smrg      switch (format) {
289b8e80941Smrg      case PIPE_FORMAT_Z16_UNORM:
290b8e80941Smrg      case PIPE_FORMAT_Z24_UNORM_S8_UINT:
291b8e80941Smrg      case PIPE_FORMAT_Z24X8_UNORM:
292b8e80941Smrg         break;
293b8e80941Smrg      default:
294b8e80941Smrg         return FALSE;
295b8e80941Smrg      }
296b8e80941Smrg   }
297b8e80941Smrg
298b8e80941Smrg   if (usage & PIPE_BIND_VERTEX_BUFFER) {
299b8e80941Smrg      switch (format) {
300b8e80941Smrg      case PIPE_FORMAT_R32G32B32_FLOAT:
301b8e80941Smrg         break;
302b8e80941Smrg      default:
303b8e80941Smrg         return FALSE;
304b8e80941Smrg      }
305b8e80941Smrg   }
306b8e80941Smrg
307b8e80941Smrg   if (usage & PIPE_BIND_INDEX_BUFFER) {
308b8e80941Smrg      switch (format) {
309b8e80941Smrg      case PIPE_FORMAT_I8_UINT:
310b8e80941Smrg      case PIPE_FORMAT_I16_UINT:
311b8e80941Smrg      case PIPE_FORMAT_I32_UINT:
312b8e80941Smrg         break;
313b8e80941Smrg      default:
314b8e80941Smrg         return FALSE;
315b8e80941Smrg      }
316b8e80941Smrg   }
317b8e80941Smrg
318b8e80941Smrg   if (usage & PIPE_BIND_SAMPLER_VIEW) {
319b8e80941Smrg      switch (format) {
320b8e80941Smrg      case PIPE_FORMAT_R8G8B8X8_UNORM:
321b8e80941Smrg      case PIPE_FORMAT_R8G8B8A8_UNORM:
322b8e80941Smrg      case PIPE_FORMAT_B8G8R8X8_UNORM:
323b8e80941Smrg      case PIPE_FORMAT_B8G8R8A8_UNORM:
324b8e80941Smrg      case PIPE_FORMAT_A8B8G8R8_SRGB:
325b8e80941Smrg      case PIPE_FORMAT_B8G8R8A8_SRGB:
326b8e80941Smrg      case PIPE_FORMAT_Z16_UNORM:
327b8e80941Smrg      case PIPE_FORMAT_Z24_UNORM_S8_UINT:
328b8e80941Smrg      case PIPE_FORMAT_Z24X8_UNORM:
329b8e80941Smrg         break;
330b8e80941Smrg      default:
331b8e80941Smrg         return FALSE;
332b8e80941Smrg      }
333b8e80941Smrg   }
334b8e80941Smrg
335b8e80941Smrg   return TRUE;
336b8e80941Smrg}
337b8e80941Smrg
338b8e80941Smrgstatic const void *
339b8e80941Smrglima_screen_get_compiler_options(struct pipe_screen *pscreen,
340b8e80941Smrg                                 enum pipe_shader_ir ir,
341b8e80941Smrg                                 enum pipe_shader_type shader)
342b8e80941Smrg{
343b8e80941Smrg   return lima_program_get_compiler_options(shader);
344b8e80941Smrg}
345b8e80941Smrg
346b8e80941Smrgstatic bool
347b8e80941Smrglima_screen_query_info(struct lima_screen *screen)
348b8e80941Smrg{
349b8e80941Smrg   struct drm_lima_get_param param;
350b8e80941Smrg
351b8e80941Smrg   memset(&param, 0, sizeof(param));
352b8e80941Smrg   param.param = DRM_LIMA_PARAM_GPU_ID;
353b8e80941Smrg   if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
354b8e80941Smrg      return false;
355b8e80941Smrg
356b8e80941Smrg   switch (param.value) {
357b8e80941Smrg   case DRM_LIMA_PARAM_GPU_ID_MALI400:
358b8e80941Smrg   case DRM_LIMA_PARAM_GPU_ID_MALI450:
359b8e80941Smrg      screen->gpu_type = param.value;
360b8e80941Smrg      break;
361b8e80941Smrg   default:
362b8e80941Smrg      return false;
363b8e80941Smrg   }
364b8e80941Smrg
365b8e80941Smrg   memset(&param, 0, sizeof(param));
366b8e80941Smrg   param.param = DRM_LIMA_PARAM_NUM_PP;
367b8e80941Smrg   if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
368b8e80941Smrg      return false;
369b8e80941Smrg
370b8e80941Smrg   screen->num_pp = param.value;
371b8e80941Smrg
372b8e80941Smrg   return true;
373b8e80941Smrg}
374b8e80941Smrg
375b8e80941Smrgstatic void
376b8e80941Smrglima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
377b8e80941Smrg                                   enum pipe_format format, int max,
378b8e80941Smrg                                   uint64_t *modifiers,
379b8e80941Smrg                                   unsigned int *external_only,
380b8e80941Smrg                                   int *count)
381b8e80941Smrg{
382b8e80941Smrg   uint64_t available_modifiers[] = {
383b8e80941Smrg      DRM_FORMAT_MOD_LINEAR,
384b8e80941Smrg   };
385b8e80941Smrg
386b8e80941Smrg   if (!modifiers) {
387b8e80941Smrg      *count = ARRAY_SIZE(available_modifiers);
388b8e80941Smrg      return;
389b8e80941Smrg   }
390b8e80941Smrg
391b8e80941Smrg   for (int i = 0; i < *count; i++) {
392b8e80941Smrg      modifiers[i] = available_modifiers[i];
393b8e80941Smrg      if (external_only)
394b8e80941Smrg         external_only = false;
395b8e80941Smrg   }
396b8e80941Smrg}
397b8e80941Smrg
398b8e80941Smrgstatic const struct debug_named_value debug_options[] = {
399b8e80941Smrg        { "gp",       LIMA_DEBUG_GP,
400b8e80941Smrg          "print GP shader compiler result of each stage" },
401b8e80941Smrg        { "pp",       LIMA_DEBUG_PP,
402b8e80941Smrg          "print PP shader compiler result of each stage" },
403b8e80941Smrg        { "dump",     LIMA_DEBUG_DUMP,
404b8e80941Smrg          "dump GPU command stream to $PWD/lima.dump" },
405b8e80941Smrg        { NULL }
406b8e80941Smrg};
407b8e80941Smrg
408b8e80941SmrgDEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
409b8e80941Smrguint32_t lima_debug;
410b8e80941Smrg
411b8e80941Smrgstatic void
412b8e80941Smrglima_screen_parse_env(void)
413b8e80941Smrg{
414b8e80941Smrg   lima_debug = debug_get_option_lima_debug();
415b8e80941Smrg
416b8e80941Smrg   if (lima_debug & LIMA_DEBUG_DUMP) {
417b8e80941Smrg      const char *dump_command = "lima.dump";
418b8e80941Smrg      printf("lima: dump command stream to file %s\n", dump_command);
419b8e80941Smrg      lima_dump_command_stream = fopen(dump_command, "w");
420b8e80941Smrg      if (!lima_dump_command_stream)
421b8e80941Smrg         fprintf(stderr, "lima: fail to open command stream log file %s\n",
422b8e80941Smrg                 dump_command);
423b8e80941Smrg   }
424b8e80941Smrg
425b8e80941Smrg   lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
426b8e80941Smrg   if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
427b8e80941Smrg       lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
428b8e80941Smrg      fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
429b8e80941Smrg              "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
430b8e80941Smrg              LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
431b8e80941Smrg      lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
432b8e80941Smrg   }
433b8e80941Smrg
434b8e80941Smrg   lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
435b8e80941Smrg   if (lima_ppir_force_spilling < 0) {
436b8e80941Smrg      fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
437b8e80941Smrg              "reset to default 0\n", lima_ppir_force_spilling);
438b8e80941Smrg      lima_ppir_force_spilling = 0;
439b8e80941Smrg   }
440b8e80941Smrg}
441b8e80941Smrg
442b8e80941Smrgstruct pipe_screen *
443b8e80941Smrglima_screen_create(int fd, struct renderonly *ro)
444b8e80941Smrg{
445b8e80941Smrg   struct lima_screen *screen;
446b8e80941Smrg
447b8e80941Smrg   screen = rzalloc(NULL, struct lima_screen);
448b8e80941Smrg   if (!screen)
449b8e80941Smrg      return NULL;
450b8e80941Smrg
451b8e80941Smrg   screen->fd = fd;
452b8e80941Smrg
453b8e80941Smrg   if (!lima_screen_query_info(screen))
454b8e80941Smrg      goto err_out0;
455b8e80941Smrg
456b8e80941Smrg   if (!lima_bo_table_init(screen))
457b8e80941Smrg      goto err_out0;
458b8e80941Smrg
459b8e80941Smrg   screen->pp_ra = ppir_regalloc_init(screen);
460b8e80941Smrg   if (!screen->pp_ra)
461b8e80941Smrg      goto err_out1;
462b8e80941Smrg
463b8e80941Smrg   screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
464b8e80941Smrg   if (!screen->pp_buffer)
465b8e80941Smrg      goto err_out1;
466b8e80941Smrg
467b8e80941Smrg   /* fs program for clear buffer?
468b8e80941Smrg    * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
469b8e80941Smrg    */
470b8e80941Smrg   static const uint32_t pp_clear_program[] = {
471b8e80941Smrg      0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
472b8e80941Smrg      0x000005f5, 0x00000000, 0x00000000, 0x00000000,
473b8e80941Smrg   };
474b8e80941Smrg   memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
475b8e80941Smrg          pp_clear_program, sizeof(pp_clear_program));
476b8e80941Smrg
477b8e80941Smrg   /* copy texture to framebuffer, used to reload gpu tile buffer
478b8e80941Smrg    * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
479b8e80941Smrg    */
480b8e80941Smrg   static const uint32_t pp_reload_program[] = {
481b8e80941Smrg      0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
482b8e80941Smrg      0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
483b8e80941Smrg   };
484b8e80941Smrg   memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
485b8e80941Smrg          pp_reload_program, sizeof(pp_reload_program));
486b8e80941Smrg
487b8e80941Smrg   /* 0/1/2 vertex index for reload/clear draw */
488b8e80941Smrg   static const uint8_t pp_shared_index[] = { 0, 1, 2 };
489b8e80941Smrg   memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
490b8e80941Smrg          pp_shared_index, sizeof(pp_shared_index));
491b8e80941Smrg
492b8e80941Smrg   /* 4096x4096 gl pos used for partial clear */
493b8e80941Smrg   static const float pp_clear_gl_pos[] = {
494b8e80941Smrg      4096, 0,    1, 1,
495b8e80941Smrg      0,    0,    1, 1,
496b8e80941Smrg      0,    4096, 1, 1,
497b8e80941Smrg   };
498b8e80941Smrg   memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
499b8e80941Smrg          pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
500b8e80941Smrg
501b8e80941Smrg   /* is pp frame render state static? */
502b8e80941Smrg   uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
503b8e80941Smrg   memset(pp_frame_rsw, 0, 0x40);
504b8e80941Smrg   pp_frame_rsw[8] = 0x0000f008;
505b8e80941Smrg   pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
506b8e80941Smrg   pp_frame_rsw[13] = 0x00000100;
507b8e80941Smrg
508b8e80941Smrg   if (ro) {
509b8e80941Smrg      screen->ro = renderonly_dup(ro);
510b8e80941Smrg      if (!screen->ro) {
511b8e80941Smrg         fprintf(stderr, "Failed to dup renderonly object\n");
512b8e80941Smrg         goto err_out2;
513b8e80941Smrg      }
514b8e80941Smrg   }
515b8e80941Smrg
516b8e80941Smrg   screen->base.destroy = lima_screen_destroy;
517b8e80941Smrg   screen->base.get_name = lima_screen_get_name;
518b8e80941Smrg   screen->base.get_vendor = lima_screen_get_vendor;
519b8e80941Smrg   screen->base.get_device_vendor = lima_screen_get_device_vendor;
520b8e80941Smrg   screen->base.get_param = lima_screen_get_param;
521b8e80941Smrg   screen->base.get_paramf = lima_screen_get_paramf;
522b8e80941Smrg   screen->base.get_shader_param = lima_screen_get_shader_param;
523b8e80941Smrg   screen->base.context_create = lima_context_create;
524b8e80941Smrg   screen->base.is_format_supported = lima_screen_is_format_supported;
525b8e80941Smrg   screen->base.get_compiler_options = lima_screen_get_compiler_options;
526b8e80941Smrg   screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
527b8e80941Smrg
528b8e80941Smrg   lima_resource_screen_init(screen);
529b8e80941Smrg   lima_fence_screen_init(screen);
530b8e80941Smrg
531b8e80941Smrg   slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
532b8e80941Smrg
533b8e80941Smrg   screen->refcnt = 1;
534b8e80941Smrg
535b8e80941Smrg   lima_screen_parse_env();
536b8e80941Smrg
537b8e80941Smrg   return &screen->base;
538b8e80941Smrg
539b8e80941Smrgerr_out2:
540b8e80941Smrg   lima_bo_free(screen->pp_buffer);
541b8e80941Smrgerr_out1:
542b8e80941Smrg   lima_bo_table_fini(screen);
543b8e80941Smrgerr_out0:
544b8e80941Smrg   ralloc_free(screen);
545b8e80941Smrg   return NULL;
546b8e80941Smrg}
547