1848b8605Smrg/*
2848b8605Smrg * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3848b8605Smrg *
4848b8605Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5848b8605Smrg * copy of this software and associated documentation files (the "Software"),
6848b8605Smrg * to deal in the Software without restriction, including without limitation
7848b8605Smrg * on the rights to use, copy, modify, merge, publish, distribute, sub
8848b8605Smrg * license, and/or sell copies of the Software, and to permit persons to whom
9848b8605Smrg * the Software is furnished to do so, subject to the following conditions:
10848b8605Smrg *
11848b8605Smrg * The above copyright notice and this permission notice (including the next
12848b8605Smrg * paragraph) shall be included in all copies or substantial portions of the
13848b8605Smrg * Software.
14848b8605Smrg *
15848b8605Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16848b8605Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17848b8605Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18848b8605Smrg * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19848b8605Smrg * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20848b8605Smrg * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21848b8605Smrg * USE OR OTHER DEALINGS IN THE SOFTWARE.
22848b8605Smrg */
23848b8605Smrg#ifndef R600_ASM_H
24848b8605Smrg#define R600_ASM_H
25848b8605Smrg
26848b8605Smrg#include "r600_pipe.h"
27848b8605Smrg#include "r600_isa.h"
28b8e80941Smrg#include "tgsi/tgsi_exec.h"
29848b8605Smrg
30848b8605Smrgstruct r600_bytecode_alu_src {
31848b8605Smrg	unsigned			sel;
32848b8605Smrg	unsigned			chan;
33848b8605Smrg	unsigned			neg;
34848b8605Smrg	unsigned			abs;
35848b8605Smrg	unsigned			rel;
36848b8605Smrg	unsigned			kc_bank;
37b8e80941Smrg	unsigned			kc_rel;
38848b8605Smrg	uint32_t			value;
39848b8605Smrg};
40848b8605Smrg
41848b8605Smrgstruct r600_bytecode_alu_dst {
42848b8605Smrg	unsigned			sel;
43848b8605Smrg	unsigned			chan;
44848b8605Smrg	unsigned			clamp;
45848b8605Smrg	unsigned			write;
46848b8605Smrg	unsigned			rel;
47848b8605Smrg};
48848b8605Smrg
49848b8605Smrgstruct r600_bytecode_alu {
50848b8605Smrg	struct list_head		list;
51848b8605Smrg	struct r600_bytecode_alu_src		src[3];
52848b8605Smrg	struct r600_bytecode_alu_dst		dst;
53848b8605Smrg	unsigned			op;
54848b8605Smrg	unsigned			last;
55848b8605Smrg	unsigned			is_op3;
56b8e80941Smrg	unsigned			is_lds_idx_op;
57848b8605Smrg	unsigned			execute_mask;
58848b8605Smrg	unsigned			update_pred;
59848b8605Smrg	unsigned			pred_sel;
60848b8605Smrg	unsigned			bank_swizzle;
61848b8605Smrg	unsigned			bank_swizzle_force;
62848b8605Smrg	unsigned			omod;
63848b8605Smrg	unsigned                        index_mode;
64b8e80941Smrg	unsigned                        lds_idx;
65848b8605Smrg};
66848b8605Smrg
67848b8605Smrgstruct r600_bytecode_tex {
68848b8605Smrg	struct list_head		list;
69848b8605Smrg	unsigned			op;
70848b8605Smrg	unsigned			inst_mod;
71848b8605Smrg	unsigned			resource_id;
72848b8605Smrg	unsigned			src_gpr;
73848b8605Smrg	unsigned			src_rel;
74848b8605Smrg	unsigned			dst_gpr;
75848b8605Smrg	unsigned			dst_rel;
76848b8605Smrg	unsigned			dst_sel_x;
77848b8605Smrg	unsigned			dst_sel_y;
78848b8605Smrg	unsigned			dst_sel_z;
79848b8605Smrg	unsigned			dst_sel_w;
80848b8605Smrg	unsigned			lod_bias;
81848b8605Smrg	unsigned			coord_type_x;
82848b8605Smrg	unsigned			coord_type_y;
83848b8605Smrg	unsigned			coord_type_z;
84848b8605Smrg	unsigned			coord_type_w;
85848b8605Smrg	int				offset_x;
86848b8605Smrg	int				offset_y;
87848b8605Smrg	int				offset_z;
88848b8605Smrg	unsigned			sampler_id;
89848b8605Smrg	unsigned			src_sel_x;
90848b8605Smrg	unsigned			src_sel_y;
91848b8605Smrg	unsigned			src_sel_z;
92848b8605Smrg	unsigned			src_sel_w;
93b8e80941Smrg	/* indexed samplers/resources only on evergreen/cayman */
94b8e80941Smrg	unsigned			sampler_index_mode;
95b8e80941Smrg	unsigned			resource_index_mode;
96848b8605Smrg};
97848b8605Smrg
98848b8605Smrgstruct r600_bytecode_vtx {
99848b8605Smrg	struct list_head		list;
100848b8605Smrg	unsigned			op;
101848b8605Smrg	unsigned			fetch_type;
102848b8605Smrg	unsigned			buffer_id;
103848b8605Smrg	unsigned			src_gpr;
104848b8605Smrg	unsigned			src_sel_x;
105848b8605Smrg	unsigned			mega_fetch_count;
106848b8605Smrg	unsigned			dst_gpr;
107848b8605Smrg	unsigned			dst_sel_x;
108848b8605Smrg	unsigned			dst_sel_y;
109848b8605Smrg	unsigned			dst_sel_z;
110848b8605Smrg	unsigned			dst_sel_w;
111848b8605Smrg	unsigned			use_const_fields;
112848b8605Smrg	unsigned			data_format;
113848b8605Smrg	unsigned			num_format_all;
114848b8605Smrg	unsigned			format_comp_all;
115848b8605Smrg	unsigned			srf_mode_all;
116848b8605Smrg	unsigned			offset;
117848b8605Smrg	unsigned			endian;
118b8e80941Smrg	unsigned			buffer_index_mode;
119b8e80941Smrg
120b8e80941Smrg	// READ_SCRATCH fields
121b8e80941Smrg	unsigned			uncached;
122b8e80941Smrg	unsigned			indexed;
123b8e80941Smrg	unsigned			src_sel_y;
124b8e80941Smrg	unsigned			src_rel;
125b8e80941Smrg	unsigned			elem_size;
126b8e80941Smrg	unsigned			array_size;
127b8e80941Smrg	unsigned			array_base;
128b8e80941Smrg	unsigned			burst_count;
129b8e80941Smrg	unsigned			dst_rel;
130b8e80941Smrg};
131b8e80941Smrg
132b8e80941Smrgstruct r600_bytecode_gds {
133b8e80941Smrg	struct list_head		list;
134b8e80941Smrg	unsigned			op;
135b8e80941Smrg	unsigned			src_gpr;
136b8e80941Smrg	unsigned			src_rel;
137b8e80941Smrg	unsigned			src_sel_x;
138b8e80941Smrg	unsigned			src_sel_y;
139b8e80941Smrg	unsigned			src_sel_z;
140b8e80941Smrg	unsigned			src_gpr2;
141b8e80941Smrg	unsigned			dst_gpr;
142b8e80941Smrg	unsigned			dst_rel;
143b8e80941Smrg	unsigned			dst_sel_x;
144b8e80941Smrg	unsigned			dst_sel_y;
145b8e80941Smrg	unsigned			dst_sel_z;
146b8e80941Smrg	unsigned			dst_sel_w;
147b8e80941Smrg	unsigned			uav_index_mode;
148b8e80941Smrg	unsigned                        uav_id;
149b8e80941Smrg	unsigned                        alloc_consume;
150b8e80941Smrg	unsigned                        bcast_first_req;
151848b8605Smrg};
152848b8605Smrg
153848b8605Smrgstruct r600_bytecode_output {
154848b8605Smrg	unsigned			array_base;
155848b8605Smrg	unsigned			array_size;
156848b8605Smrg	unsigned			comp_mask;
157848b8605Smrg	unsigned			type;
158848b8605Smrg
159848b8605Smrg	unsigned			op;
160848b8605Smrg
161848b8605Smrg	unsigned			elem_size;
162848b8605Smrg	unsigned			gpr;
163848b8605Smrg	unsigned			swizzle_x;
164848b8605Smrg	unsigned			swizzle_y;
165848b8605Smrg	unsigned			swizzle_z;
166848b8605Smrg	unsigned			swizzle_w;
167848b8605Smrg	unsigned			burst_count;
168848b8605Smrg	unsigned			index_gpr;
169b8e80941Smrg	unsigned			mark; /* used by MEM_SCRATCH */
170b8e80941Smrg};
171b8e80941Smrg
172b8e80941Smrgstruct r600_bytecode_rat {
173b8e80941Smrg	unsigned			id;
174b8e80941Smrg	unsigned			inst;
175b8e80941Smrg	unsigned			index_mode;
176848b8605Smrg};
177848b8605Smrg
178848b8605Smrgstruct r600_bytecode_kcache {
179848b8605Smrg	unsigned			bank;
180848b8605Smrg	unsigned			mode;
181848b8605Smrg	unsigned			addr;
182b8e80941Smrg	unsigned			index_mode;
183848b8605Smrg};
184848b8605Smrg
185848b8605Smrgstruct r600_bytecode_cf {
186848b8605Smrg	struct list_head		list;
187848b8605Smrg
188848b8605Smrg	unsigned			op;
189848b8605Smrg	unsigned			addr;
190848b8605Smrg	unsigned			ndw;
191848b8605Smrg	unsigned			id;
192848b8605Smrg	unsigned			cond;
193848b8605Smrg	unsigned			pop_count;
194b8e80941Smrg	unsigned			count;
195848b8605Smrg	unsigned			cf_addr; /* control flow addr */
196848b8605Smrg	struct r600_bytecode_kcache		kcache[4];
197848b8605Smrg	unsigned			r6xx_uses_waterfall;
198848b8605Smrg	unsigned			eg_alu_extended;
199848b8605Smrg	unsigned			barrier;
200848b8605Smrg	unsigned			end_of_program;
201b8e80941Smrg	unsigned                        mark;
202b8e80941Smrg	unsigned                        vpm;
203848b8605Smrg	struct list_head		alu;
204848b8605Smrg	struct list_head		tex;
205848b8605Smrg	struct list_head		vtx;
206b8e80941Smrg	struct list_head		gds;
207848b8605Smrg	struct r600_bytecode_output		output;
208b8e80941Smrg	struct r600_bytecode_rat		rat;
209848b8605Smrg	struct r600_bytecode_alu		*curr_bs_head;
210848b8605Smrg	struct r600_bytecode_alu		*prev_bs_head;
211848b8605Smrg	struct r600_bytecode_alu		*prev2_bs_head;
212848b8605Smrg	unsigned isa[2];
213848b8605Smrg};
214848b8605Smrg
215848b8605Smrg#define FC_NONE				0
216848b8605Smrg#define FC_IF				1
217848b8605Smrg#define FC_LOOP				2
218848b8605Smrg#define FC_REP				3
219848b8605Smrg#define FC_PUSH_VPM			4
220848b8605Smrg#define FC_PUSH_WQM			5
221848b8605Smrg
222848b8605Smrgstruct r600_cf_stack_entry {
223848b8605Smrg	int				type;
224848b8605Smrg	struct r600_bytecode_cf		*start;
225848b8605Smrg	struct r600_bytecode_cf		**mid; /* used to store the else point */
226848b8605Smrg	int				num_mid;
227848b8605Smrg};
228848b8605Smrg
229848b8605Smrg#define SQ_MAX_CALL_DEPTH 0x00000020
230848b8605Smrg
231848b8605Smrg#define AR_HANDLE_NORMAL 0
232848b8605Smrg#define AR_HANDLE_RV6XX 1 /* except RV670 */
233848b8605Smrg
234848b8605Smrgstruct r600_stack_info {
235848b8605Smrg	/* current level of non-WQM PUSH operations
236848b8605Smrg	 * (PUSH, PUSH_ELSE, ALU_PUSH_BEFORE) */
237848b8605Smrg	int push;
238848b8605Smrg	/* current level of WQM PUSH operations
239848b8605Smrg	 * (PUSH, PUSH_ELSE, PUSH_WQM) */
240848b8605Smrg	int push_wqm;
241848b8605Smrg	/* current loop level */
242848b8605Smrg	int loop;
243848b8605Smrg
244848b8605Smrg	/* required depth */
245848b8605Smrg	int max_entries;
246848b8605Smrg	/* subentries per entry */
247848b8605Smrg	int entry_size;
248848b8605Smrg};
249848b8605Smrg
250848b8605Smrgstruct r600_bytecode {
251848b8605Smrg	enum chip_class			chip_class;
252848b8605Smrg	enum radeon_family		family;
253848b8605Smrg	bool				has_compressed_msaa_texturing;
254848b8605Smrg	int				type;
255848b8605Smrg	struct list_head		cf;
256848b8605Smrg	struct r600_bytecode_cf		*cf_last;
257848b8605Smrg	unsigned			ndw;
258848b8605Smrg	unsigned			ncf;
259848b8605Smrg	unsigned			ngpr;
260848b8605Smrg	unsigned			nstack;
261848b8605Smrg	unsigned			nlds_dw;
262848b8605Smrg	unsigned			nresource;
263848b8605Smrg	unsigned			force_add_cf;
264848b8605Smrg	uint32_t			*bytecode;
265848b8605Smrg	uint32_t			fc_sp;
266b8e80941Smrg	struct r600_cf_stack_entry	fc_stack[TGSI_EXEC_MAX_NESTING];
267848b8605Smrg	struct r600_stack_info		stack;
268848b8605Smrg	unsigned	ar_loaded;
269848b8605Smrg	unsigned	ar_reg;
270848b8605Smrg	unsigned	ar_chan;
271848b8605Smrg	unsigned        ar_handling;
272848b8605Smrg	unsigned        r6xx_nop_after_rel_dst;
273b8e80941Smrg	bool            index_loaded[2];
274b8e80941Smrg	unsigned        index_reg[2]; /* indexing register CF_INDEX_[01] */
275848b8605Smrg	unsigned        debug_id;
276848b8605Smrg	struct r600_isa* isa;
277b8e80941Smrg	struct r600_bytecode_output pending_outputs[5];
278b8e80941Smrg	int n_pending_outputs;
279b8e80941Smrg	boolean			need_wait_ack; /* emit a pending WAIT_ACK prior to control flow */
280b8e80941Smrg	boolean			precise;
281848b8605Smrg};
282848b8605Smrg
283848b8605Smrg/* eg_asm.c */
284848b8605Smrgint eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
285b8e80941Smrgint egcm_load_index_reg(struct r600_bytecode *bc, unsigned id, bool inside_alu_clause);
286b8e80941Smrgint eg_bytecode_gds_build(struct r600_bytecode *bc, struct r600_bytecode_gds *gds, unsigned id);
287b8e80941Smrgint eg_bytecode_alu_build(struct r600_bytecode *bc,
288b8e80941Smrg			  struct r600_bytecode_alu *alu, unsigned id);
289848b8605Smrg/* r600_asm.c */
290848b8605Smrgvoid r600_bytecode_init(struct r600_bytecode *bc,
291848b8605Smrg			enum chip_class chip_class,
292848b8605Smrg			enum radeon_family family,
293848b8605Smrg			bool has_compressed_msaa_texturing);
294848b8605Smrgvoid r600_bytecode_clear(struct r600_bytecode *bc);
295848b8605Smrgint r600_bytecode_add_alu(struct r600_bytecode *bc,
296848b8605Smrg		const struct r600_bytecode_alu *alu);
297848b8605Smrgint r600_bytecode_add_vtx(struct r600_bytecode *bc,
298848b8605Smrg		const struct r600_bytecode_vtx *vtx);
299b8e80941Smrgint r600_bytecode_add_vtx_tc(struct r600_bytecode *bc,
300b8e80941Smrg			     const struct r600_bytecode_vtx *vtx);
301848b8605Smrgint r600_bytecode_add_tex(struct r600_bytecode *bc,
302848b8605Smrg		const struct r600_bytecode_tex *tex);
303b8e80941Smrgint r600_bytecode_add_gds(struct r600_bytecode *bc,
304b8e80941Smrg		const struct r600_bytecode_gds *gds);
305848b8605Smrgint r600_bytecode_add_output(struct r600_bytecode *bc,
306848b8605Smrg		const struct r600_bytecode_output *output);
307b8e80941Smrgint r600_bytecode_add_pending_output(struct r600_bytecode *bc,
308b8e80941Smrg		const struct r600_bytecode_output *output);
309b8e80941Smrgvoid r600_bytecode_need_wait_ack(struct r600_bytecode *bc, boolean needed);
310b8e80941Smrgboolean r600_bytecode_get_need_wait_ack(struct r600_bytecode *bc);
311848b8605Smrgint r600_bytecode_build(struct r600_bytecode *bc);
312848b8605Smrgint r600_bytecode_add_cf(struct r600_bytecode *bc);
313848b8605Smrgint r600_bytecode_add_cfinst(struct r600_bytecode *bc,
314848b8605Smrg		unsigned op);
315848b8605Smrgint r600_bytecode_add_alu_type(struct r600_bytecode *bc,
316848b8605Smrg		const struct r600_bytecode_alu *alu, unsigned type);
317848b8605Smrgvoid r600_bytecode_special_constants(uint32_t value,
318b8e80941Smrg		unsigned *sel, unsigned *neg, unsigned abs);
319848b8605Smrgvoid r600_bytecode_disasm(struct r600_bytecode *bc);
320848b8605Smrgvoid r600_bytecode_alu_read(struct r600_bytecode *bc,
321848b8605Smrg		struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
322848b8605Smrg
323848b8605Smrgint cm_bytecode_add_cf_end(struct r600_bytecode *bc);
324848b8605Smrg
325848b8605Smrgvoid *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
326848b8605Smrg				      unsigned count,
327848b8605Smrg				      const struct pipe_vertex_element *elements);
328848b8605Smrg
329848b8605Smrg/* r700_asm.c */
330848b8605Smrgvoid r700_bytecode_cf_vtx_build(uint32_t *bytecode,
331848b8605Smrg		const struct r600_bytecode_cf *cf);
332848b8605Smrgint r700_bytecode_alu_build(struct r600_bytecode *bc,
333848b8605Smrg		struct r600_bytecode_alu *alu, unsigned id);
334848b8605Smrgvoid r700_bytecode_alu_read(struct r600_bytecode *bc,
335848b8605Smrg		struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
336b8e80941Smrgint r700_bytecode_fetch_mem_build(struct r600_bytecode *bc,
337b8e80941Smrg		struct r600_bytecode_vtx *mem, unsigned id);
338b8e80941Smrg
339848b8605Smrgvoid r600_bytecode_export_read(struct r600_bytecode *bc,
340848b8605Smrg		struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
341848b8605Smrgvoid eg_bytecode_export_read(struct r600_bytecode *bc,
342848b8605Smrg		struct r600_bytecode_output *output, uint32_t word0, uint32_t word1);
343848b8605Smrg
344848b8605Smrgvoid r600_vertex_data_type(enum pipe_format pformat, unsigned *format,
345848b8605Smrg			   unsigned *num_format, unsigned *format_comp, unsigned *endian);
346b8e80941Smrg
347b8e80941Smrgstatic inline int fp64_switch(int i)
348b8e80941Smrg{
349b8e80941Smrg	switch (i) {
350b8e80941Smrg	case 0:
351b8e80941Smrg		return 1;
352b8e80941Smrg	case 1:
353b8e80941Smrg		return 0;
354b8e80941Smrg	case 2:
355b8e80941Smrg		return 3;
356b8e80941Smrg	case 3:
357b8e80941Smrg		return 2;
358b8e80941Smrg	}
359b8e80941Smrg	return 0;
360b8e80941Smrg}
361848b8605Smrg#endif
362