1848b8605Smrg 2848b8605Smrg#ifndef R600_OPCODES_H 3848b8605Smrg#define R600_OPCODES_H 4848b8605Smrg 5b8e80941Smrg#define R600_S_SQ_CF_WORD1_CF_INST(x) (((unsigned)(x) & 0x7F) << 23) 6848b8605Smrg#define R600_G_SQ_CF_WORD1_CF_INST(x) (((x) >> 23) & 0x7F) 7b8e80941Smrg#define R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((unsigned)(x) & 0x7F) << 23) 8848b8605Smrg#define R600_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) >> 23) & 0x7F) 9b8e80941Smrg#define R600_S_SQ_CF_ALU_WORD1_CF_INST(x) (((unsigned)(x) & 0xF) << 26) 10848b8605Smrg#define R600_G_SQ_CF_ALU_WORD1_CF_INST(x) (((x) >> 26) & 0xF) 11848b8605Smrg 12b8e80941Smrg#define EG_S_SQ_CF_WORD1_CF_INST(x) (((unsigned)(x) & 0xFF) << 22) 13848b8605Smrg#define EG_G_SQ_CF_WORD1_CF_INST(x) (((x) >> 22) & 0xFF) 14b8e80941Smrg#define EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((unsigned)(x) & 0xFF) << 22) 15848b8605Smrg#define EG_G_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(x) (((x) >> 22) & 0xFF) 16b8e80941Smrg#define EG_S_SQ_CF_ALU_WORD1_CF_INST(x) (((unsigned)(x) & 0xF) << 26) 17848b8605Smrg#define EG_G_SQ_CF_ALU_WORD1_CF_INST(x) (((x) >> 26) & 0xF) 18848b8605Smrg 19848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_NOP R600_S_SQ_CF_WORD1_CF_INST(0x00000000) 20848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_TEX R600_S_SQ_CF_WORD1_CF_INST(0x00000001) 21848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_VTX R600_S_SQ_CF_WORD1_CF_INST(0x00000002) 22848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC R600_S_SQ_CF_WORD1_CF_INST(0x00000003) 23848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START R600_S_SQ_CF_WORD1_CF_INST(0x00000004) 24848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END R600_S_SQ_CF_WORD1_CF_INST(0x00000005) 25848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10 R600_S_SQ_CF_WORD1_CF_INST(0x00000006) 26848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL R600_S_SQ_CF_WORD1_CF_INST(0x00000007) 27848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE R600_S_SQ_CF_WORD1_CF_INST(0x00000008) 28848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK R600_S_SQ_CF_WORD1_CF_INST(0x00000009) 29848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_JUMP R600_S_SQ_CF_WORD1_CF_INST(0x0000000A) 30848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH R600_S_SQ_CF_WORD1_CF_INST(0x0000000B) 31848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH_ELSE R600_S_SQ_CF_WORD1_CF_INST(0x0000000C) 32848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_ELSE R600_S_SQ_CF_WORD1_CF_INST(0x0000000D) 33848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_POP R600_S_SQ_CF_WORD1_CF_INST(0x0000000E) 34848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_POP_JUMP R600_S_SQ_CF_WORD1_CF_INST(0x0000000F) 35848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH R600_S_SQ_CF_WORD1_CF_INST(0x00000010) 36848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH_ELSE R600_S_SQ_CF_WORD1_CF_INST(0x00000011) 37848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_CALL R600_S_SQ_CF_WORD1_CF_INST(0x00000012) 38848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS R600_S_SQ_CF_WORD1_CF_INST(0x00000013) 39848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_RETURN R600_S_SQ_CF_WORD1_CF_INST(0x00000014) 40848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_VERTEX R600_S_SQ_CF_WORD1_CF_INST(0x00000015) 41848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_CUT_VERTEX R600_S_SQ_CF_WORD1_CF_INST(0x00000016) 42848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_CUT_VERTEX R600_S_SQ_CF_WORD1_CF_INST(0x00000017) 43848b8605Smrg#define V_SQ_CF_WORD1_SQ_CF_INST_KILL R600_S_SQ_CF_WORD1_CF_INST(0x00000018) 44848b8605Smrg 45848b8605Smrg#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU R600_S_SQ_CF_ALU_WORD1_CF_INST(0x00000008) 46848b8605Smrg#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE R600_S_SQ_CF_ALU_WORD1_CF_INST(0x00000009) 47848b8605Smrg#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER R600_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000A) 48848b8605Smrg#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER R600_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000B) 49848b8605Smrg#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_CONTINUE R600_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000D) 50848b8605Smrg#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_BREAK R600_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000E) 51848b8605Smrg#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_ELSE_AFTER R600_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000F) 52848b8605Smrg 53848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD 0x00000000 54848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL 0x00000001 55848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE 0x00000002 56848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX 0x00000003 57848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN 0x00000004 58848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_DX10 0x00000005 59848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_DX10 0x00000006 60848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FREXP_64 0x00000007 61848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE 0x00000008 62848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT 0x00000009 63848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE 0x0000000A 64848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE 0x0000000B 65848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_DX10 0x0000000C 66848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_DX10 0x0000000D 67848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_DX10 0x0000000E 68848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_DX10 0x0000000F 69848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT 0x00000010 70848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC 0x00000011 71848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL 0x00000012 72848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE 0x00000013 73848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR 0x00000014 74848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA 0x00000015 75848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR 0x00000016 76848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_64 0x00000017 77848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT 0x00000018 78848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV 0x00000019 79848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP 0x0000001A 80848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_64 0x0000001B 81848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT64_TO_FLT32 0x0000001C 82848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT32_TO_FLT64 0x0000001D 83848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT 0x0000001E 84848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT 0x0000001F 85848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE 0x00000020 86848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT 0x00000021 87848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE 0x00000022 88848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE 0x00000023 89848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV 0x00000024 90848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP 0x00000025 91848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR 0x00000026 92848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE 0x00000027 93848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH 0x00000028 94848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH 0x00000029 95848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH 0x0000002A 96848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH 0x0000002B 97848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE 0x0000002C 98848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT 0x0000002D 99848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE 0x0000002E 100848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE 0x0000002F 101848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT 0x00000030 102848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT 0x00000031 103848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT 0x00000032 104848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT 0x00000033 105848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT 0x00000034 106848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT 0x00000035 107848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT 0x00000036 108848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT 0x00000037 109848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT 0x00000038 110848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT 0x00000039 111848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT 0x0000003A 112848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT 0x0000003B 113848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT 0x0000003C 114848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT 0x0000003D 115848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT 0x0000003E 116848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT 0x0000003F 117848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT 0x00000040 118848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT 0x00000041 119848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT 0x00000042 120848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT 0x00000043 121848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT 0x00000044 122848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT 0x00000045 123848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT 0x00000046 124848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT 0x00000047 125848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT 0x00000048 126848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT 0x00000049 127848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT 0x0000004A 128848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT 0x0000004B 129848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT 0x0000004C 130848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT 0x0000004D 131848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT 0x0000004E 132848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT 0x0000004F 133848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 0x00000050 134848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE 0x00000051 135848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE 0x00000052 136848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4 0x00000053 137848b8605Smrg 138848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT 0x00000060 139848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE 0x00000061 140848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED 0x00000062 141848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE 0x00000063 142848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED 0x00000064 143848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_FF 0x00000065 144848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE 0x00000066 145848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED 0x00000067 146848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_FF 0x00000068 147848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE 0x00000069 148848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_IEEE 0x0000006A 149848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT 0x0000006B 150848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT 0x0000006C 151848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT 0x0000006D 152848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN 0x0000006E 153848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS 0x0000006F 154848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT 0x00000070 155848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT 0x00000071 156848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT 0x00000072 157848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT 0x00000073 158848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT 0x00000074 159848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT 0x00000075 160848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT 0x00000076 161848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT 0x00000077 162848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT 0x00000078 163848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT 0x00000079 164848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDEXP_64 0x0000007A 165848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT_64 0x0000007B 166848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_64 0x0000007C 167848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_64 0x0000007D 168848b8605Smrg#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_64 0x0000007E 169848b8605Smrg 170848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_64 0x00000008 171848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_64_M2 0x00000009 172848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_64_M4 0x0000000A 173848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_64_D2 0x0000000B 174848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT 0x0000000C 175848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M2 0x0000000D 176848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M4 0x0000000E 177848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_D2 0x0000000F 178848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD 0x00000010 179848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M2 0x00000011 180848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M4 0x00000012 181848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_D2 0x00000013 182848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE 0x00000014 183848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M2 0x00000015 184848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M4 0x00000016 185848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_D2 0x00000017 186848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE 0x00000018 187848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT 0x00000019 188848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE 0x0000001A 189848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT 0x0000001C 190848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT_INT 0x0000001D 191848b8605Smrg#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT 0x0000001E 192848b8605Smrg 193848b8605Smrg#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0 R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000020) 194848b8605Smrg#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1 R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000021) 195848b8605Smrg#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2 R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000022) 196848b8605Smrg#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3 R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000023) 197848b8605Smrg#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_SCRATCH R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000024) 198848b8605Smrg#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_REDUCTION R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000025) 199848b8605Smrg#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RING R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000026) 200848b8605Smrg#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000027) 201848b8605Smrg#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE R600_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000028) 202848b8605Smrg 203848b8605Smrg/* cayman doesn't have VTX */ 204848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_NOP EG_S_SQ_CF_WORD1_CF_INST(0x00000000) 205848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_TEX EG_S_SQ_CF_WORD1_CF_INST(0x00000001) 206848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_TC EG_S_SQ_CF_WORD1_CF_INST(0x00000001) 207848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_VTX EG_S_SQ_CF_WORD1_CF_INST(0x00000002) 208848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_RSVD_2 EG_S_SQ_CF_WORD1_CF_INST(0x00000002) 209848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_GDS EG_S_SQ_CF_WORD1_CF_INST(0x00000003) 210848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START EG_S_SQ_CF_WORD1_CF_INST(0x00000004) 211848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END EG_S_SQ_CF_WORD1_CF_INST(0x00000005) 212848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10 EG_S_SQ_CF_WORD1_CF_INST(0x00000006) 213848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL EG_S_SQ_CF_WORD1_CF_INST(0x00000007) 214848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE EG_S_SQ_CF_WORD1_CF_INST(0x00000008) 215848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK EG_S_SQ_CF_WORD1_CF_INST(0x00000009) 216848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMP EG_S_SQ_CF_WORD1_CF_INST(0x0000000A) 217848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_PUSH EG_S_SQ_CF_WORD1_CF_INST(0x0000000B) 218848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_RSVD_12 EG_S_SQ_CF_WORD1_CF_INST(0x0000000C) /* resvd */ 219848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_ELSE EG_S_SQ_CF_WORD1_CF_INST(0x0000000D) 220848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_POP EG_S_SQ_CF_WORD1_CF_INST(0x0000000E) 221848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_RSVD_15 EG_S_SQ_CF_WORD1_CF_INST(0x0000000F) 222848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_RSVD_16 EG_S_SQ_CF_WORD1_CF_INST(0x00000010) 223848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_RSVD_17 EG_S_SQ_CF_WORD1_CF_INST(0x00000011) 224848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL EG_S_SQ_CF_WORD1_CF_INST(0x00000012) 225848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS EG_S_SQ_CF_WORD1_CF_INST(0x00000013) 226848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_RETURN EG_S_SQ_CF_WORD1_CF_INST(0x00000014) 227848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_EMIT_VERTEX EG_S_SQ_CF_WORD1_CF_INST(0x00000015) 228848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_EMIT_CUT_VERTEX EG_S_SQ_CF_WORD1_CF_INST(0x00000016) 229848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_CUT_VERTEX EG_S_SQ_CF_WORD1_CF_INST(0x00000017) 230848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_KILL EG_S_SQ_CF_WORD1_CF_INST(0x00000018) 231848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_RSVD_25 EG_S_SQ_CF_WORD1_CF_INST(0x00000019) 232848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_WAIT_ACK EG_S_SQ_CF_WORD1_CF_INST(0x0000001a) 233848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_TC_ACK EG_S_SQ_CF_WORD1_CF_INST(0x0000001b) 234848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_VC_ACK EG_S_SQ_CF_WORD1_CF_INST(0x0000001c) 235848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_RSVD_28 EG_S_SQ_CF_WORD1_CF_INST(0x0000001c) 236848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_JUMPTABLE EG_S_SQ_CF_WORD1_CF_INST(0x0000001d) 237848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_GLOBAL_WAVE_SYNC EG_S_SQ_CF_WORD1_CF_INST(0x0000001e) 238848b8605Smrg#define EG_V_SQ_CF_WORD1_SQ_CF_INST_HALT EG_S_SQ_CF_WORD1_CF_INST(0x0000001f) 239848b8605Smrg 240848b8605Smrg/* cayman extras */ 241848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_END EG_S_SQ_CF_WORD1_CF_INST(0x00000020) 242848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_LDS_DEALLOC EG_S_SQ_CF_WORD1_CF_INST(0x00000021) 243848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_PUSH_WQM EG_S_SQ_CF_WORD1_CF_INST(0x00000022) 244848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_POP_WQM EG_S_SQ_CF_WORD1_CF_INST(0x00000023) 245848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_ELSE_WQM EG_S_SQ_CF_WORD1_CF_INST(0x00000024) 246848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_JUMP_ANY EG_S_SQ_CF_WORD1_CF_INST(0x00000025) 247848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_REACTIVATE EG_S_SQ_CF_WORD1_CF_INST(0x00000026) 248848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_REACTIVATE_WQM EG_S_SQ_CF_WORD1_CF_INST(0x00000027) 249848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_INTERRUPT EG_S_SQ_CF_WORD1_CF_INST(0x00000028) 250848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_INTERRUPT_AND_SLEEP EG_S_SQ_CF_WORD1_CF_INST(0x00000029) 251848b8605Smrg#define CM_V_SQ_CF_WORD1_SQ_CF_INST_SET_PRIORITY EG_S_SQ_CF_WORD1_CF_INST(0x00000030) 252848b8605Smrg 253848b8605Smrg#define EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU EG_S_SQ_CF_ALU_WORD1_CF_INST(0x00000008) 254848b8605Smrg#define EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE EG_S_SQ_CF_ALU_WORD1_CF_INST(0x00000009) 255848b8605Smrg#define EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER EG_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000A) 256848b8605Smrg#define EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER EG_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000B) 257848b8605Smrg#define EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_EXTENDED EG_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000C) 258848b8605Smrg#define EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_CONTINUE EG_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000D) /* different on CAYMAN */ 259848b8605Smrg#define EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_BREAK EG_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000E) /* different on CAYMAN */ 260848b8605Smrg#define EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_ELSE_AFTER EG_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000F) 261848b8605Smrg 262848b8605Smrg#define CM_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_REACTIVATE_BEFORE EG_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000D) 263848b8605Smrg#define CM_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_VALID_PIXEL_MODE EG_S_SQ_CF_ALU_WORD1_CF_INST(0x0000000E) 264848b8605Smrg 265848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD 0x00000000 266848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL 0x00000001 267848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE 0x00000002 268848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX 0x00000003 269848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN 0x00000004 270848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_DX10 0x00000005 271848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_DX10 0x00000006 272848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE 0x00000008 273848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT 0x00000009 274848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE 0x0000000A 275848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE 0x0000000B 276848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_DX10 0x0000000C 277848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_DX10 0x0000000D 278848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_DX10 0x0000000E 279848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_DX10 0x0000000F 280848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT 0x00000010 281848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC 0x00000011 282848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL 0x00000012 283848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE 0x00000013 284848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR 0x00000014 285848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT 0x00000015 286848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT 0x00000016 287848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT 0x00000017 288848b8605Smrg/* same again from here */ 289848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV 0x00000019 290848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP 0x0000001A 291848b8605Smrg/* same */ 292848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT 0x0000001E 293848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT 0x0000001F 294848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE 0x00000020 295848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT 0x00000021 296848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE 0x00000022 297848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE 0x00000023 298848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV 0x00000024 299848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP 0x00000025 300848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR 0x00000026 301848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE 0x00000027 302848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH 0x00000028 303848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH 0x00000029 304848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH 0x0000002A 305848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH 0x0000002B 306848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE 0x0000002C 307848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT 0x0000002D 308848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE 0x0000002E 309848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE 0x0000002F 310848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT 0x00000030 311848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT 0x00000031 312848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT 0x00000032 313848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT 0x00000033 314848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT 0x00000034 315848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT 0x00000035 316848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT 0x00000036 317848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT 0x00000037 318848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT 0x00000038 319848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT 0x00000039 320848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT 0x0000003A 321848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT 0x0000003B 322848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT 0x0000003C 323848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT 0x0000003D 324848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT 0x0000003E 325848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT 0x0000003F 326848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT 0x00000040 327848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT 0x00000041 328848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT 0x00000042 329848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT 0x00000043 330848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT 0x00000044 331848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT 0x00000045 332848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT 0x00000046 333848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT 0x00000047 334848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT 0x00000048 335848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT 0x00000049 336848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT 0x0000004A 337848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT 0x0000004B 338848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT 0x0000004C 339848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT 0x0000004D 340848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT 0x0000004E 341848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT 0x0000004F 342848b8605Smrg/* same up to here */ 343848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT 0x00000050 344848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_BFREV_INT 0x00000051 345848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADDC_UINT 0x00000052 346848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUBB_UINT 0x00000053 347848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_GROUP_BARRIER 0x00000054 348848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_GROUP_SEQ_BEGIN 0x00000055 /* not on CAYMAN */ 349848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_GROUP_SEQ_END 0x00000056 /* not on CAYMAN */ 350848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SET_MODE 0x00000057 351848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SET_CF_IDX0 0x00000058 /* not on CAYMAN */ 352848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SET_CF_IDX1 0x00000059 /* not on CAYMAN */ 353848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SET_LDS_SIZE 0x0000005A 354848b8605Smrg 355848b8605Smrg#define CM_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_INT24 0x0000005B /* not on evergreen*/ 356848b8605Smrg#define CM_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT24 0x0000005C /* not on evergreen*/ 357848b8605Smrg#define CM_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_TRUNC 0x0000005D /* not on evergreen*/ 358848b8605Smrg 359848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE 0x00000081 360848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED 0x00000082 361848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE 0x00000083 362848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED 0x00000084 363848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_FF 0x00000085 364848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE 0x00000086 365848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED 0x00000087 366848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_FF 0x00000088 367848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE 0x00000089 368848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_IEEE 0x0000008A 369848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN 0x0000008D 370848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS 0x0000008E 371848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT 0x0000008F 372848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT 0x00000090 373848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT 0x00000091 374848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT 0x00000092 375848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT 0x00000093 /* not on CAYMAN */ 376848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT 0x00000094 /* not on CAYMAN */ 377848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_64 0x00000095 378848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED_64 0x00000096 379848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_64 0x00000097 380848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED_64 0x00000098 381848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_64 0x00000099 382848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT 0x0000009A 383848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT 0x0000009B 384848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT 0x0000009C 385848b8605Smrg 386848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_BFM_INT 0x000000A0 387848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT32_TO_FLT16 0x000000A2 388848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT16_TO_FLT32 0x000000A3 389848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UBYTE0_FLT 0x000000A4 390848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UBYTE1_FLT 0x000000A5 391848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UBYTE2_FLT 0x000000A6 392848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UBYTE3_FLT 0x000000A7 393848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_BCNT_INT 0x000000AA 394848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FFBH_UINT 0x000000AB 395848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FFBL_INT 0x000000AC 396848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FFBH_INT 0x000000AD 397848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT4 0x000000AE 398848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT_IEEE 0x000000AF 399848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_RPI 0x000000B0 400848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR 0x000000B1 401848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT24 0x000000B2 402848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MBCNT_32HI_INT 0x000000B3 403848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OFFSET_TO_FLT 0x000000B4 404848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_UINT24 0x000000B5 405848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_BCNT_ACCUM_PREV_INT 0x000000B6 406848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MBCNT_32LO_ACCUM_PREV_INT 0x000000B7 407848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_64 0x000000B8 408848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_64 0x000000B9 409848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_64 0x000000BA 410848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_64 0x000000BB 411848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_64 0x000000BC 412848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_64 0x000000BD 413848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 0x000000BE 414848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE 0x000000BF 415848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE 0x000000C0 416848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4 0x000000C1 417848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FREXP_64 0x000000C4 418848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDEXP_64 0x000000C5 419848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT_64 0x000000C6 420848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_64 0x000000C7 421848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_64 0x000000C8 422848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_64 0x000000C9 423848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_64 0x000000CA 424848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_64 0x000000CB 425848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT 0x000000CC 426848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT64_TO_FLT32 0x000000CD 427848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT32_TO_FLT64 0x000000CE 428848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SAD_ACCUM_PREV_UINT 0x000000CF 429848b8605Smrg 430848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT 0x000000D0 431848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_PREV 0x000000D1 432848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE_PREV 0x000000D2 433848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_PREV 0x000000D3 434848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULADD_PREV 0x000000D4 435848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULADD_IEEE_PREV 0x000000D5 436848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_XY 0x000000D6 437848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_ZW 0x000000D7 438848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_X 0x000000D8 439848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_Z 0x000000D9 440848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_STORE_FLAGS 0x000000DA 441848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOAD_STORE_FLAGS 0x000000DB 442848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDS_1A 0x000000DC 443848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDS_1A1D 0x000000DD 444848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LDS_2A 0x000000DF 445848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P0 0x000000E0 446848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P10 0x000000E1 447848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INTERP_LOAD_P20 0x000000E2 448848b8605Smrg 449848b8605Smrg/* OP3 */ 450848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_BFE_UINT 0x00000004 451848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_BFE_INT 0x00000005 452848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_BFI_INT 0x00000006 453848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_FMA 0x00000007 454848b8605Smrg#define CM_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_INT24 0x00000008 /* not on evergreen*/ 455848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDNE_64 0x00000009 456848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_FMA_64 0x0000000A 457848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_LERP_UINT 0x0000000B 458848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_BIT_ALIGN_INT 0x0000000C 459848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_BYTE_ALIGN_INT 0x0000000D 460848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_SAD_ACCUM_UINT 0x0000000E 461848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_SAD_ACCUM_HI_UINT 0x0000000F 462848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_UINT24 0x00000010 463848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_LDS_IDX_OP 0x00000011 464848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD 0x00000014 465848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M2 0x00000015 466848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M4 0x00000016 467848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_D2 0x00000017 468848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE 0x00000018 469848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE 0x00000019 470848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT 0x0000001A 471848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE 0x0000001B 472848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT 0x0000001C 473848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT_INT 0x0000001D 474848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT 0x0000001E 475848b8605Smrg#define EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT 0x0000001F 476848b8605Smrg 477848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF0 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000040) 478848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF1 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000041) 479848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF2 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000042) 480848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0_BUF3 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000043) 481848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF0 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000044) 482848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF1 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000045) 483848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF2 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000046) 484848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1_BUF3 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000047) 485848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF0 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000048) 486848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF1 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000049) 487848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF2 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x0000004A) 488848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2_BUF3 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x0000004B) 489848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF0 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x0000004C) 490848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF1 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x0000004D) 491848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF2 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x0000004E) 492848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3_BUF3 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x0000004F) 493848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_SCRATCH EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000050) 494848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RING EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000052) 495848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000053) 496848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000054) 497848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_EXPORT EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000055) 498848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RAT EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000056) 499848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RAT_CACHELESS EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000057) 500848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RING1 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000058) 501848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RING2 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x00000059) 502848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RING3 EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x0000005A) 503848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_EXPORT_COMBINED EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x0000005B) 504848b8605Smrg#define EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RAT_COMBINED_CACHELESS EG_S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(0x0000005C) 505848b8605Smrg 506848b8605Smrg#define BC_INST(bc, x) ((bc)->chip_class >= EVERGREEN ? EG_##x : x) 507848b8605Smrg 508848b8605Smrg#define CTX_INST(x) (ctx->bc->chip_class >= EVERGREEN ? EG_##x : x) 509848b8605Smrg 510848b8605Smrg#endif 511