1b8e80941Smrg/*
2b8e80941Smrg * Copyright 2015 Advanced Micro Devices, Inc.
3b8e80941Smrg *
4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5b8e80941Smrg * copy of this software and associated documentation files (the "Software"),
6b8e80941Smrg * to deal in the Software without restriction, including without limitation
7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the
9b8e80941Smrg * Software is furnished to do so, subject to the following conditions:
10b8e80941Smrg *
11b8e80941Smrg * The above copyright notice and this permission notice (including the next
12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the
13b8e80941Smrg * Software.
14b8e80941Smrg *
15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20b8e80941Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21b8e80941Smrg * SOFTWARE.
22b8e80941Smrg *
23b8e80941Smrg * Authors:
24b8e80941Smrg *  Nicolai Hähnle <nicolai.haehnle@amd.com>
25b8e80941Smrg *
26b8e80941Smrg */
27b8e80941Smrg
28b8e80941Smrg#ifndef R600_QUERY_H
29b8e80941Smrg#define R600_QUERY_H
30b8e80941Smrg
31b8e80941Smrg#include "util/u_threaded_context.h"
32b8e80941Smrg
33b8e80941Smrgstruct pipe_context;
34b8e80941Smrgstruct pipe_query;
35b8e80941Smrgstruct pipe_resource;
36b8e80941Smrg
37b8e80941Smrgstruct r600_common_context;
38b8e80941Smrgstruct r600_common_screen;
39b8e80941Smrgstruct r600_query;
40b8e80941Smrgstruct r600_query_hw;
41b8e80941Smrgstruct r600_resource;
42b8e80941Smrg
43b8e80941Smrgenum {
44b8e80941Smrg	R600_QUERY_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,
45b8e80941Smrg	R600_QUERY_DECOMPRESS_CALLS,
46b8e80941Smrg	R600_QUERY_MRT_DRAW_CALLS,
47b8e80941Smrg	R600_QUERY_PRIM_RESTART_CALLS,
48b8e80941Smrg	R600_QUERY_SPILL_DRAW_CALLS,
49b8e80941Smrg	R600_QUERY_COMPUTE_CALLS,
50b8e80941Smrg	R600_QUERY_SPILL_COMPUTE_CALLS,
51b8e80941Smrg	R600_QUERY_DMA_CALLS,
52b8e80941Smrg	R600_QUERY_CP_DMA_CALLS,
53b8e80941Smrg	R600_QUERY_NUM_VS_FLUSHES,
54b8e80941Smrg	R600_QUERY_NUM_PS_FLUSHES,
55b8e80941Smrg	R600_QUERY_NUM_CS_FLUSHES,
56b8e80941Smrg	R600_QUERY_NUM_CB_CACHE_FLUSHES,
57b8e80941Smrg	R600_QUERY_NUM_DB_CACHE_FLUSHES,
58b8e80941Smrg	R600_QUERY_NUM_RESIDENT_HANDLES,
59b8e80941Smrg	R600_QUERY_TC_OFFLOADED_SLOTS,
60b8e80941Smrg	R600_QUERY_TC_DIRECT_SLOTS,
61b8e80941Smrg	R600_QUERY_TC_NUM_SYNCS,
62b8e80941Smrg	R600_QUERY_CS_THREAD_BUSY,
63b8e80941Smrg	R600_QUERY_GALLIUM_THREAD_BUSY,
64b8e80941Smrg	R600_QUERY_REQUESTED_VRAM,
65b8e80941Smrg	R600_QUERY_REQUESTED_GTT,
66b8e80941Smrg	R600_QUERY_MAPPED_VRAM,
67b8e80941Smrg	R600_QUERY_MAPPED_GTT,
68b8e80941Smrg	R600_QUERY_BUFFER_WAIT_TIME,
69b8e80941Smrg	R600_QUERY_NUM_MAPPED_BUFFERS,
70b8e80941Smrg	R600_QUERY_NUM_GFX_IBS,
71b8e80941Smrg	R600_QUERY_NUM_SDMA_IBS,
72b8e80941Smrg	R600_QUERY_GFX_BO_LIST_SIZE,
73b8e80941Smrg	R600_QUERY_NUM_BYTES_MOVED,
74b8e80941Smrg	R600_QUERY_NUM_EVICTIONS,
75b8e80941Smrg	R600_QUERY_NUM_VRAM_CPU_PAGE_FAULTS,
76b8e80941Smrg	R600_QUERY_VRAM_USAGE,
77b8e80941Smrg	R600_QUERY_VRAM_VIS_USAGE,
78b8e80941Smrg	R600_QUERY_GTT_USAGE,
79b8e80941Smrg	R600_QUERY_GPU_TEMPERATURE,
80b8e80941Smrg	R600_QUERY_CURRENT_GPU_SCLK,
81b8e80941Smrg	R600_QUERY_CURRENT_GPU_MCLK,
82b8e80941Smrg	R600_QUERY_GPU_LOAD,
83b8e80941Smrg	R600_QUERY_GPU_SHADERS_BUSY,
84b8e80941Smrg	R600_QUERY_GPU_TA_BUSY,
85b8e80941Smrg	R600_QUERY_GPU_GDS_BUSY,
86b8e80941Smrg	R600_QUERY_GPU_VGT_BUSY,
87b8e80941Smrg	R600_QUERY_GPU_IA_BUSY,
88b8e80941Smrg	R600_QUERY_GPU_SX_BUSY,
89b8e80941Smrg	R600_QUERY_GPU_WD_BUSY,
90b8e80941Smrg	R600_QUERY_GPU_BCI_BUSY,
91b8e80941Smrg	R600_QUERY_GPU_SC_BUSY,
92b8e80941Smrg	R600_QUERY_GPU_PA_BUSY,
93b8e80941Smrg	R600_QUERY_GPU_DB_BUSY,
94b8e80941Smrg	R600_QUERY_GPU_CP_BUSY,
95b8e80941Smrg	R600_QUERY_GPU_CB_BUSY,
96b8e80941Smrg	R600_QUERY_GPU_SDMA_BUSY,
97b8e80941Smrg	R600_QUERY_GPU_PFP_BUSY,
98b8e80941Smrg	R600_QUERY_GPU_MEQ_BUSY,
99b8e80941Smrg	R600_QUERY_GPU_ME_BUSY,
100b8e80941Smrg	R600_QUERY_GPU_SURF_SYNC_BUSY,
101b8e80941Smrg	R600_QUERY_GPU_CP_DMA_BUSY,
102b8e80941Smrg	R600_QUERY_GPU_SCRATCH_RAM_BUSY,
103b8e80941Smrg	R600_QUERY_NUM_COMPILATIONS,
104b8e80941Smrg	R600_QUERY_NUM_SHADERS_CREATED,
105b8e80941Smrg	R600_QUERY_NUM_SHADER_CACHE_HITS,
106b8e80941Smrg	R600_QUERY_GPIN_ASIC_ID,
107b8e80941Smrg	R600_QUERY_GPIN_NUM_SIMD,
108b8e80941Smrg	R600_QUERY_GPIN_NUM_RB,
109b8e80941Smrg	R600_QUERY_GPIN_NUM_SPI,
110b8e80941Smrg	R600_QUERY_GPIN_NUM_SE,
111b8e80941Smrg
112b8e80941Smrg	R600_QUERY_FIRST_PERFCOUNTER = PIPE_QUERY_DRIVER_SPECIFIC + 100,
113b8e80941Smrg};
114b8e80941Smrg
115b8e80941Smrgenum {
116b8e80941Smrg	R600_QUERY_GROUP_GPIN = 0,
117b8e80941Smrg	R600_NUM_SW_QUERY_GROUPS
118b8e80941Smrg};
119b8e80941Smrg
120b8e80941Smrgstruct r600_query_ops {
121b8e80941Smrg	void (*destroy)(struct r600_common_screen *, struct r600_query *);
122b8e80941Smrg	bool (*begin)(struct r600_common_context *, struct r600_query *);
123b8e80941Smrg	bool (*end)(struct r600_common_context *, struct r600_query *);
124b8e80941Smrg	bool (*get_result)(struct r600_common_context *,
125b8e80941Smrg			   struct r600_query *, bool wait,
126b8e80941Smrg			   union pipe_query_result *result);
127b8e80941Smrg	void (*get_result_resource)(struct r600_common_context *,
128b8e80941Smrg				    struct r600_query *, bool wait,
129b8e80941Smrg				    enum pipe_query_value_type result_type,
130b8e80941Smrg				    int index,
131b8e80941Smrg				    struct pipe_resource *resource,
132b8e80941Smrg				    unsigned offset);
133b8e80941Smrg};
134b8e80941Smrg
135b8e80941Smrgstruct r600_query {
136b8e80941Smrg	struct threaded_query b;
137b8e80941Smrg	struct r600_query_ops *ops;
138b8e80941Smrg
139b8e80941Smrg	/* The type of query */
140b8e80941Smrg	unsigned type;
141b8e80941Smrg};
142b8e80941Smrg
143b8e80941Smrgenum {
144b8e80941Smrg	R600_QUERY_HW_FLAG_NO_START = (1 << 0),
145b8e80941Smrg	/* gap */
146b8e80941Smrg	/* whether begin_query doesn't clear the result */
147b8e80941Smrg	R600_QUERY_HW_FLAG_BEGIN_RESUMES = (1 << 2),
148b8e80941Smrg};
149b8e80941Smrg
150b8e80941Smrgstruct r600_query_hw_ops {
151b8e80941Smrg	bool (*prepare_buffer)(struct r600_common_screen *,
152b8e80941Smrg			       struct r600_query_hw *,
153b8e80941Smrg			       struct r600_resource *);
154b8e80941Smrg	void (*emit_start)(struct r600_common_context *,
155b8e80941Smrg			   struct r600_query_hw *,
156b8e80941Smrg			   struct r600_resource *buffer, uint64_t va);
157b8e80941Smrg	void (*emit_stop)(struct r600_common_context *,
158b8e80941Smrg			  struct r600_query_hw *,
159b8e80941Smrg			  struct r600_resource *buffer, uint64_t va);
160b8e80941Smrg	void (*clear_result)(struct r600_query_hw *, union pipe_query_result *);
161b8e80941Smrg	void (*add_result)(struct r600_common_screen *screen,
162b8e80941Smrg			   struct r600_query_hw *, void *buffer,
163b8e80941Smrg			   union pipe_query_result *result);
164b8e80941Smrg};
165b8e80941Smrg
166b8e80941Smrgstruct r600_query_buffer {
167b8e80941Smrg	/* The buffer where query results are stored. */
168b8e80941Smrg	struct r600_resource		*buf;
169b8e80941Smrg	/* Offset of the next free result after current query data */
170b8e80941Smrg	unsigned			results_end;
171b8e80941Smrg	/* If a query buffer is full, a new buffer is created and the old one
172b8e80941Smrg	 * is put in here. When we calculate the result, we sum up the samples
173b8e80941Smrg	 * from all buffers. */
174b8e80941Smrg	struct r600_query_buffer	*previous;
175b8e80941Smrg};
176b8e80941Smrg
177b8e80941Smrgstruct r600_query_hw {
178b8e80941Smrg	struct r600_query b;
179b8e80941Smrg	struct r600_query_hw_ops *ops;
180b8e80941Smrg	unsigned flags;
181b8e80941Smrg
182b8e80941Smrg	/* The query buffer and how many results are in it. */
183b8e80941Smrg	struct r600_query_buffer buffer;
184b8e80941Smrg	/* Size of the result in memory for both begin_query and end_query,
185b8e80941Smrg	 * this can be one or two numbers, or it could even be a size of a structure. */
186b8e80941Smrg	unsigned result_size;
187b8e80941Smrg	/* The number of dwords for begin_query or end_query. */
188b8e80941Smrg	unsigned num_cs_dw_begin;
189b8e80941Smrg	unsigned num_cs_dw_end;
190b8e80941Smrg	/* Linked list of queries */
191b8e80941Smrg	struct list_head list;
192b8e80941Smrg	/* For transform feedback: which stream the query is for */
193b8e80941Smrg	unsigned stream;
194b8e80941Smrg};
195b8e80941Smrg
196b8e80941Smrgbool r600_query_hw_init(struct r600_common_screen *rscreen,
197b8e80941Smrg			struct r600_query_hw *query);
198b8e80941Smrgvoid r600_query_hw_destroy(struct r600_common_screen *rscreen,
199b8e80941Smrg			   struct r600_query *rquery);
200b8e80941Smrgbool r600_query_hw_begin(struct r600_common_context *rctx,
201b8e80941Smrg			 struct r600_query *rquery);
202b8e80941Smrgbool r600_query_hw_end(struct r600_common_context *rctx,
203b8e80941Smrg		       struct r600_query *rquery);
204b8e80941Smrgbool r600_query_hw_get_result(struct r600_common_context *rctx,
205b8e80941Smrg			      struct r600_query *rquery,
206b8e80941Smrg			      bool wait,
207b8e80941Smrg			      union pipe_query_result *result);
208b8e80941Smrg
209b8e80941Smrg/* Performance counters */
210b8e80941Smrgenum {
211b8e80941Smrg	/* This block is part of the shader engine */
212b8e80941Smrg	R600_PC_BLOCK_SE = (1 << 0),
213b8e80941Smrg
214b8e80941Smrg	/* Expose per-instance groups instead of summing all instances (within
215b8e80941Smrg	 * an SE). */
216b8e80941Smrg	R600_PC_BLOCK_INSTANCE_GROUPS = (1 << 1),
217b8e80941Smrg
218b8e80941Smrg	/* Expose per-SE groups instead of summing instances across SEs. */
219b8e80941Smrg	R600_PC_BLOCK_SE_GROUPS = (1 << 2),
220b8e80941Smrg
221b8e80941Smrg	/* Shader block */
222b8e80941Smrg	R600_PC_BLOCK_SHADER = (1 << 3),
223b8e80941Smrg
224b8e80941Smrg	/* Non-shader block with perfcounters windowed by shaders. */
225b8e80941Smrg	R600_PC_BLOCK_SHADER_WINDOWED = (1 << 4),
226b8e80941Smrg};
227b8e80941Smrg
228b8e80941Smrg/* Describes a hardware block with performance counters. Multiple instances of
229b8e80941Smrg * each block, possibly per-SE, may exist on the chip. Depending on the block
230b8e80941Smrg * and on the user's configuration, we either
231b8e80941Smrg *  (a) expose every instance as a performance counter group,
232b8e80941Smrg *  (b) expose a single performance counter group that reports the sum over all
233b8e80941Smrg *      instances, or
234b8e80941Smrg *  (c) expose one performance counter group per instance, but summed over all
235b8e80941Smrg *      shader engines.
236b8e80941Smrg */
237b8e80941Smrgstruct r600_perfcounter_block {
238b8e80941Smrg	const char *basename;
239b8e80941Smrg	unsigned flags;
240b8e80941Smrg	unsigned num_counters;
241b8e80941Smrg	unsigned num_selectors;
242b8e80941Smrg	unsigned num_instances;
243b8e80941Smrg
244b8e80941Smrg	unsigned num_groups;
245b8e80941Smrg	char *group_names;
246b8e80941Smrg	unsigned group_name_stride;
247b8e80941Smrg
248b8e80941Smrg	char *selector_names;
249b8e80941Smrg	unsigned selector_name_stride;
250b8e80941Smrg
251b8e80941Smrg	void *data;
252b8e80941Smrg};
253b8e80941Smrg
254b8e80941Smrgstruct r600_perfcounters {
255b8e80941Smrg	unsigned num_groups;
256b8e80941Smrg	unsigned num_blocks;
257b8e80941Smrg	struct r600_perfcounter_block *blocks;
258b8e80941Smrg
259b8e80941Smrg	unsigned num_start_cs_dwords;
260b8e80941Smrg	unsigned num_stop_cs_dwords;
261b8e80941Smrg	unsigned num_instance_cs_dwords;
262b8e80941Smrg	unsigned num_shaders_cs_dwords;
263b8e80941Smrg
264b8e80941Smrg	unsigned num_shader_types;
265b8e80941Smrg	const char * const *shader_type_suffixes;
266b8e80941Smrg	const unsigned *shader_type_bits;
267b8e80941Smrg
268b8e80941Smrg	void (*get_size)(struct r600_perfcounter_block *,
269b8e80941Smrg			 unsigned count, unsigned *selectors,
270b8e80941Smrg			 unsigned *num_select_dw, unsigned *num_read_dw);
271b8e80941Smrg
272b8e80941Smrg	void (*emit_instance)(struct r600_common_context *,
273b8e80941Smrg			      int se, int instance);
274b8e80941Smrg	void (*emit_shaders)(struct r600_common_context *, unsigned shaders);
275b8e80941Smrg	void (*emit_select)(struct r600_common_context *,
276b8e80941Smrg			    struct r600_perfcounter_block *,
277b8e80941Smrg			    unsigned count, unsigned *selectors);
278b8e80941Smrg	void (*emit_start)(struct r600_common_context *,
279b8e80941Smrg			  struct r600_resource *buffer, uint64_t va);
280b8e80941Smrg	void (*emit_stop)(struct r600_common_context *,
281b8e80941Smrg			  struct r600_resource *buffer, uint64_t va);
282b8e80941Smrg	void (*emit_read)(struct r600_common_context *,
283b8e80941Smrg			  struct r600_perfcounter_block *,
284b8e80941Smrg			  unsigned count, unsigned *selectors,
285b8e80941Smrg			  struct r600_resource *buffer, uint64_t va);
286b8e80941Smrg
287b8e80941Smrg	void (*cleanup)(struct r600_common_screen *);
288b8e80941Smrg
289b8e80941Smrg	bool separate_se;
290b8e80941Smrg	bool separate_instance;
291b8e80941Smrg};
292b8e80941Smrg
293b8e80941Smrgstruct pipe_query *r600_create_batch_query(struct pipe_context *ctx,
294b8e80941Smrg					   unsigned num_queries,
295b8e80941Smrg					   unsigned *query_types);
296b8e80941Smrg
297b8e80941Smrgint r600_get_perfcounter_info(struct r600_common_screen *,
298b8e80941Smrg			      unsigned index,
299b8e80941Smrg			      struct pipe_driver_query_info *info);
300b8e80941Smrgint r600_get_perfcounter_group_info(struct r600_common_screen *,
301b8e80941Smrg				    unsigned index,
302b8e80941Smrg				    struct pipe_driver_query_group_info *info);
303b8e80941Smrg
304b8e80941Smrgbool r600_perfcounters_init(struct r600_perfcounters *, unsigned num_blocks);
305b8e80941Smrgvoid r600_perfcounters_add_block(struct r600_common_screen *,
306b8e80941Smrg				 struct r600_perfcounters *,
307b8e80941Smrg				 const char *name, unsigned flags,
308b8e80941Smrg				 unsigned counters, unsigned selectors,
309b8e80941Smrg				 unsigned instances, void *data);
310b8e80941Smrgvoid r600_perfcounters_do_destroy(struct r600_perfcounters *);
311b8e80941Smrgvoid r600_query_hw_reset_buffers(struct r600_common_context *rctx,
312b8e80941Smrg				 struct r600_query_hw *query);
313b8e80941Smrg
314b8e80941Smrgstruct r600_qbo_state {
315b8e80941Smrg	void *saved_compute;
316b8e80941Smrg	struct pipe_constant_buffer saved_const0;
317b8e80941Smrg	struct pipe_shader_buffer saved_ssbo[3];
318b8e80941Smrg};
319b8e80941Smrg
320b8e80941Smrg#endif /* R600_QUERY_H */
321