1/************************************************************************** 2 * 3 * Copyright 2011 Advanced Micro Devices, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28#include <sys/types.h> 29#include <assert.h> 30#include <errno.h> 31#include <unistd.h> 32#include <stdio.h> 33 34#include "pipe/p_video_codec.h" 35 36#include "util/u_memory.h" 37#include "util/u_video.h" 38 39#include "vl/vl_defines.h" 40#include "vl/vl_mpeg12_decoder.h" 41 42#include "radeonsi/si_pipe.h" 43#include "radeon_video.h" 44#include "radeon_uvd.h" 45 46#define NUM_BUFFERS 4 47 48#define NUM_MPEG2_REFS 6 49#define NUM_H264_REFS 17 50#define NUM_VC1_REFS 5 51 52#define FB_BUFFER_OFFSET 0x1000 53#define FB_BUFFER_SIZE 2048 54#define FB_BUFFER_SIZE_TONGA (2048 * 64) 55#define IT_SCALING_TABLE_SIZE 992 56#define UVD_SESSION_CONTEXT_SIZE (128 * 1024) 57 58/* UVD decoder representation */ 59struct ruvd_decoder { 60 struct pipe_video_codec base; 61 62 ruvd_set_dtb set_dtb; 63 64 unsigned stream_handle; 65 unsigned stream_type; 66 unsigned frame_number; 67 68 struct pipe_screen *screen; 69 struct radeon_winsys* ws; 70 struct radeon_cmdbuf* cs; 71 72 unsigned cur_buffer; 73 74 struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS]; 75 struct ruvd_msg *msg; 76 uint32_t *fb; 77 unsigned fb_size; 78 uint8_t *it; 79 80 struct rvid_buffer bs_buffers[NUM_BUFFERS]; 81 void* bs_ptr; 82 unsigned bs_size; 83 84 struct rvid_buffer dpb; 85 bool use_legacy; 86 struct rvid_buffer ctx; 87 struct rvid_buffer sessionctx; 88 struct { 89 unsigned data0; 90 unsigned data1; 91 unsigned cmd; 92 unsigned cntl; 93 } reg; 94 95 void *render_pic_list[16]; 96}; 97 98/* flush IB to the hardware */ 99static int flush(struct ruvd_decoder *dec, unsigned flags) 100{ 101 return dec->ws->cs_flush(dec->cs, flags, NULL); 102} 103 104/* add a new set register command to the IB */ 105static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val) 106{ 107 radeon_emit(dec->cs, RUVD_PKT0(reg >> 2, 0)); 108 radeon_emit(dec->cs, val); 109} 110 111/* send a command to the VCPU through the GPCOM registers */ 112static void send_cmd(struct ruvd_decoder *dec, unsigned cmd, 113 struct pb_buffer* buf, uint32_t off, 114 enum radeon_bo_usage usage, enum radeon_bo_domain domain) 115{ 116 int reloc_idx; 117 118 reloc_idx = dec->ws->cs_add_buffer(dec->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED, 119 domain, 0); 120 if (!dec->use_legacy) { 121 uint64_t addr; 122 addr = dec->ws->buffer_get_virtual_address(buf); 123 addr = addr + off; 124 set_reg(dec, dec->reg.data0, addr); 125 set_reg(dec, dec->reg.data1, addr >> 32); 126 } else { 127 off += dec->ws->buffer_get_reloc_offset(buf); 128 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off); 129 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4); 130 } 131 set_reg(dec, dec->reg.cmd, cmd << 1); 132} 133 134/* do the codec needs an IT buffer ?*/ 135static bool have_it(struct ruvd_decoder *dec) 136{ 137 return dec->stream_type == RUVD_CODEC_H264_PERF || 138 dec->stream_type == RUVD_CODEC_H265; 139} 140 141/* map the next available message/feedback/itscaling buffer */ 142static void map_msg_fb_it_buf(struct ruvd_decoder *dec) 143{ 144 struct rvid_buffer* buf; 145 uint8_t *ptr; 146 147 /* grab the current message/feedback buffer */ 148 buf = &dec->msg_fb_it_buffers[dec->cur_buffer]; 149 150 /* and map it for CPU access */ 151 ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, 152 PIPE_TRANSFER_WRITE | RADEON_TRANSFER_TEMPORARY); 153 154 /* calc buffer offsets */ 155 dec->msg = (struct ruvd_msg *)ptr; 156 memset(dec->msg, 0, sizeof(*dec->msg)); 157 158 dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET); 159 if (have_it(dec)) 160 dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + dec->fb_size); 161} 162 163/* unmap and send a message command to the VCPU */ 164static void send_msg_buf(struct ruvd_decoder *dec) 165{ 166 struct rvid_buffer* buf; 167 168 /* ignore the request if message/feedback buffer isn't mapped */ 169 if (!dec->msg || !dec->fb) 170 return; 171 172 /* grab the current message buffer */ 173 buf = &dec->msg_fb_it_buffers[dec->cur_buffer]; 174 175 /* unmap the buffer */ 176 dec->ws->buffer_unmap(buf->res->buf); 177 dec->msg = NULL; 178 dec->fb = NULL; 179 dec->it = NULL; 180 181 182 if (dec->sessionctx.res) 183 send_cmd(dec, RUVD_CMD_SESSION_CONTEXT_BUFFER, 184 dec->sessionctx.res->buf, 0, RADEON_USAGE_READWRITE, 185 RADEON_DOMAIN_VRAM); 186 187 /* and send it to the hardware */ 188 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0, 189 RADEON_USAGE_READ, RADEON_DOMAIN_GTT); 190} 191 192/* cycle to the next set of buffers */ 193static void next_buffer(struct ruvd_decoder *dec) 194{ 195 ++dec->cur_buffer; 196 dec->cur_buffer %= NUM_BUFFERS; 197} 198 199/* convert the profile into something UVD understands */ 200static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family) 201{ 202 switch (u_reduce_video_profile(dec->base.profile)) { 203 case PIPE_VIDEO_FORMAT_MPEG4_AVC: 204 return (family >= CHIP_TONGA) ? 205 RUVD_CODEC_H264_PERF : RUVD_CODEC_H264; 206 207 case PIPE_VIDEO_FORMAT_VC1: 208 return RUVD_CODEC_VC1; 209 210 case PIPE_VIDEO_FORMAT_MPEG12: 211 return RUVD_CODEC_MPEG2; 212 213 case PIPE_VIDEO_FORMAT_MPEG4: 214 return RUVD_CODEC_MPEG4; 215 216 case PIPE_VIDEO_FORMAT_HEVC: 217 return RUVD_CODEC_H265; 218 219 case PIPE_VIDEO_FORMAT_JPEG: 220 return RUVD_CODEC_MJPEG; 221 222 default: 223 assert(0); 224 return 0; 225 } 226} 227 228static unsigned calc_ctx_size_h264_perf(struct ruvd_decoder *dec) 229{ 230 unsigned width_in_mb, height_in_mb, ctx_size; 231 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH); 232 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT); 233 234 unsigned max_references = dec->base.max_references + 1; 235 236 // picture width & height in 16 pixel units 237 width_in_mb = width / VL_MACROBLOCK_WIDTH; 238 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2); 239 240 if (!dec->use_legacy) { 241 unsigned fs_in_mb = width_in_mb * height_in_mb; 242 unsigned num_dpb_buffer; 243 switch(dec->base.level) { 244 case 30: 245 num_dpb_buffer = 8100 / fs_in_mb; 246 break; 247 case 31: 248 num_dpb_buffer = 18000 / fs_in_mb; 249 break; 250 case 32: 251 num_dpb_buffer = 20480 / fs_in_mb; 252 break; 253 case 41: 254 num_dpb_buffer = 32768 / fs_in_mb; 255 break; 256 case 42: 257 num_dpb_buffer = 34816 / fs_in_mb; 258 break; 259 case 50: 260 num_dpb_buffer = 110400 / fs_in_mb; 261 break; 262 case 51: 263 num_dpb_buffer = 184320 / fs_in_mb; 264 break; 265 default: 266 num_dpb_buffer = 184320 / fs_in_mb; 267 break; 268 } 269 num_dpb_buffer++; 270 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references); 271 ctx_size = max_references * align(width_in_mb * height_in_mb * 192, 256); 272 } else { 273 // the firmware seems to always assume a minimum of ref frames 274 max_references = MAX2(NUM_H264_REFS, max_references); 275 // macroblock context buffer 276 ctx_size = align(width_in_mb * height_in_mb * max_references * 192, 256); 277 } 278 279 return ctx_size; 280} 281 282static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec) 283{ 284 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH); 285 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT); 286 287 unsigned max_references = dec->base.max_references + 1; 288 289 if (dec->base.width * dec->base.height >= 4096*2000) 290 max_references = MAX2(max_references, 8); 291 else 292 max_references = MAX2(max_references, 17); 293 294 width = align (width, 16); 295 height = align (height, 16); 296 return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024; 297} 298 299static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic) 300{ 301 unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb; 302 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size; 303 unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4); 304 305 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH); 306 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT); 307 unsigned coeff_10bit = (pic->pps->sps->bit_depth_luma_minus8 || pic->pps->sps->bit_depth_chroma_minus8) ? 2 : 1; 308 309 unsigned max_references = dec->base.max_references + 1; 310 311 if (dec->base.width * dec->base.height >= 4096*2000) 312 max_references = MAX2(max_references, 8); 313 else 314 max_references = MAX2(max_references, 17); 315 316 log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 + 317 pic->pps->sps->log2_diff_max_min_luma_coding_block_size; 318 319 width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size; 320 height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size; 321 322 num_16x16_block_per_ctb = ((1 << log2_ctb_size) >> 4) * ((1 << log2_ctb_size) >> 4); 323 context_buffer_size_per_ctb_row = align(width_in_ctb * num_16x16_block_per_ctb * 16, 256); 324 max_mb_address = (unsigned) ceil(height * 8 / 2048.0); 325 326 cm_buffer_size = max_references * context_buffer_size_per_ctb_row * height_in_ctb; 327 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024); 328 329 return cm_buffer_size + db_left_tile_ctx_size + db_left_tile_pxl_size; 330} 331 332static unsigned get_db_pitch_alignment(struct ruvd_decoder *dec) 333{ 334 if (((struct si_screen*)dec->screen)->info.family < CHIP_VEGA10) 335 return 16; 336 else 337 return 32; 338} 339 340/* calculate size of reference picture buffer */ 341static unsigned calc_dpb_size(struct ruvd_decoder *dec) 342{ 343 unsigned width_in_mb, height_in_mb, image_size, dpb_size; 344 345 // always align them to MB size for dpb calculation 346 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH); 347 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT); 348 349 // always one more for currently decoded picture 350 unsigned max_references = dec->base.max_references + 1; 351 352 // aligned size of a single frame 353 image_size = align(width, get_db_pitch_alignment(dec)) * height; 354 image_size += image_size / 2; 355 image_size = align(image_size, 1024); 356 357 // picture width & height in 16 pixel units 358 width_in_mb = width / VL_MACROBLOCK_WIDTH; 359 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2); 360 361 switch (u_reduce_video_profile(dec->base.profile)) { 362 case PIPE_VIDEO_FORMAT_MPEG4_AVC: { 363 if (!dec->use_legacy) { 364 unsigned fs_in_mb = width_in_mb * height_in_mb; 365 unsigned alignment = 64, num_dpb_buffer; 366 367 if (dec->stream_type == RUVD_CODEC_H264_PERF) 368 alignment = 256; 369 switch(dec->base.level) { 370 case 30: 371 num_dpb_buffer = 8100 / fs_in_mb; 372 break; 373 case 31: 374 num_dpb_buffer = 18000 / fs_in_mb; 375 break; 376 case 32: 377 num_dpb_buffer = 20480 / fs_in_mb; 378 break; 379 case 41: 380 num_dpb_buffer = 32768 / fs_in_mb; 381 break; 382 case 42: 383 num_dpb_buffer = 34816 / fs_in_mb; 384 break; 385 case 50: 386 num_dpb_buffer = 110400 / fs_in_mb; 387 break; 388 case 51: 389 num_dpb_buffer = 184320 / fs_in_mb; 390 break; 391 default: 392 num_dpb_buffer = 184320 / fs_in_mb; 393 break; 394 } 395 num_dpb_buffer++; 396 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references); 397 dpb_size = image_size * max_references; 398 if ((dec->stream_type != RUVD_CODEC_H264_PERF) || 399 (((struct si_screen*)dec->screen)->info.family < CHIP_POLARIS10)) { 400 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment); 401 dpb_size += align(width_in_mb * height_in_mb * 32, alignment); 402 } 403 } else { 404 // the firmware seems to allways assume a minimum of ref frames 405 max_references = MAX2(NUM_H264_REFS, max_references); 406 // reference picture buffer 407 dpb_size = image_size * max_references; 408 if ((dec->stream_type != RUVD_CODEC_H264_PERF) || 409 (((struct si_screen*)dec->screen)->info.family < CHIP_POLARIS10)) { 410 // macroblock context buffer 411 dpb_size += width_in_mb * height_in_mb * max_references * 192; 412 // IT surface buffer 413 dpb_size += width_in_mb * height_in_mb * 32; 414 } 415 } 416 break; 417 } 418 419 case PIPE_VIDEO_FORMAT_HEVC: 420 if (dec->base.width * dec->base.height >= 4096*2000) 421 max_references = MAX2(max_references, 8); 422 else 423 max_references = MAX2(max_references, 17); 424 425 width = align (width, 16); 426 height = align (height, 16); 427 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) 428 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 9) / 4, 256) * max_references; 429 else 430 dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 3) / 2, 256) * max_references; 431 break; 432 433 case PIPE_VIDEO_FORMAT_VC1: 434 // the firmware seems to allways assume a minimum of ref frames 435 max_references = MAX2(NUM_VC1_REFS, max_references); 436 437 // reference picture buffer 438 dpb_size = image_size * max_references; 439 440 // CONTEXT_BUFFER 441 dpb_size += width_in_mb * height_in_mb * 128; 442 443 // IT surface buffer 444 dpb_size += width_in_mb * 64; 445 446 // DB surface buffer 447 dpb_size += width_in_mb * 128; 448 449 // BP 450 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64); 451 break; 452 453 case PIPE_VIDEO_FORMAT_MPEG12: 454 // reference picture buffer, must be big enough for all frames 455 dpb_size = image_size * NUM_MPEG2_REFS; 456 break; 457 458 case PIPE_VIDEO_FORMAT_MPEG4: 459 // reference picture buffer 460 dpb_size = image_size * max_references; 461 462 // CM 463 dpb_size += width_in_mb * height_in_mb * 64; 464 465 // IT surface buffer 466 dpb_size += align(width_in_mb * height_in_mb * 32, 64); 467 468 dpb_size = MAX2(dpb_size, 30 * 1024 * 1024); 469 break; 470 471 case PIPE_VIDEO_FORMAT_JPEG: 472 dpb_size = 0; 473 break; 474 475 default: 476 // something is missing here 477 assert(0); 478 479 // at least use a sane default value 480 dpb_size = 32 * 1024 * 1024; 481 break; 482 } 483 return dpb_size; 484} 485 486/* free associated data in the video buffer callback */ 487static void ruvd_destroy_associated_data(void *data) 488{ 489 /* NOOP, since we only use an intptr */ 490} 491 492/* get h264 specific message bits */ 493static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic) 494{ 495 struct ruvd_h264 result; 496 497 memset(&result, 0, sizeof(result)); 498 switch (pic->base.profile) { 499 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE: 500 case PIPE_VIDEO_PROFILE_MPEG4_AVC_CONSTRAINED_BASELINE: 501 result.profile = RUVD_H264_PROFILE_BASELINE; 502 break; 503 504 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN: 505 result.profile = RUVD_H264_PROFILE_MAIN; 506 break; 507 508 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH: 509 result.profile = RUVD_H264_PROFILE_HIGH; 510 break; 511 512 default: 513 assert(0); 514 break; 515 } 516 517 result.level = dec->base.level; 518 519 result.sps_info_flags = 0; 520 result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0; 521 result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1; 522 result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2; 523 result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3; 524 525 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8; 526 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8; 527 result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4; 528 result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type; 529 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4; 530 531 switch (dec->base.chroma_format) { 532 case PIPE_VIDEO_CHROMA_FORMAT_NONE: 533 /* TODO: assert? */ 534 break; 535 case PIPE_VIDEO_CHROMA_FORMAT_400: 536 result.chroma_format = 0; 537 break; 538 case PIPE_VIDEO_CHROMA_FORMAT_420: 539 result.chroma_format = 1; 540 break; 541 case PIPE_VIDEO_CHROMA_FORMAT_422: 542 result.chroma_format = 2; 543 break; 544 case PIPE_VIDEO_CHROMA_FORMAT_444: 545 result.chroma_format = 3; 546 break; 547 } 548 549 result.pps_info_flags = 0; 550 result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0; 551 result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1; 552 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2; 553 result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3; 554 result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4; 555 result.pps_info_flags |= pic->pps->weighted_pred_flag << 6; 556 result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7; 557 result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8; 558 559 result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1; 560 result.slice_group_map_type = pic->pps->slice_group_map_type; 561 result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1; 562 result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26; 563 result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset; 564 result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset; 565 566 memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6*16); 567 memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2*64); 568 569 if (dec->stream_type == RUVD_CODEC_H264_PERF) { 570 memcpy(dec->it, result.scaling_list_4x4, 6*16); 571 memcpy((dec->it + 96), result.scaling_list_8x8, 2*64); 572 } 573 574 result.num_ref_frames = pic->num_ref_frames; 575 576 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1; 577 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1; 578 579 result.frame_num = pic->frame_num; 580 memcpy(result.frame_num_list, pic->frame_num_list, 4*16); 581 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0]; 582 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1]; 583 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4*16*2); 584 585 result.decoded_pic_idx = pic->frame_num; 586 587 return result; 588} 589 590/* get h265 specific message bits */ 591static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target, 592 struct pipe_h265_picture_desc *pic) 593{ 594 struct ruvd_h265 result; 595 unsigned i, j; 596 597 memset(&result, 0, sizeof(result)); 598 599 result.sps_info_flags = 0; 600 result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0; 601 result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1; 602 result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2; 603 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3; 604 result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4; 605 result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5; 606 result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6; 607 result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7; 608 result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8; 609 if (((struct si_screen*)dec->screen)->info.family == CHIP_CARRIZO) 610 result.sps_info_flags |= 1 << 9; 611 if (pic->UseRefPicList == true) 612 result.sps_info_flags |= 1 << 10; 613 614 result.chroma_format = pic->pps->sps->chroma_format_idc; 615 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8; 616 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8; 617 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4; 618 result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1; 619 result.log2_min_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_luma_coding_block_size_minus3; 620 result.log2_diff_max_min_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_luma_coding_block_size; 621 result.log2_min_transform_block_size_minus2 = pic->pps->sps->log2_min_transform_block_size_minus2; 622 result.log2_diff_max_min_transform_block_size = pic->pps->sps->log2_diff_max_min_transform_block_size; 623 result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter; 624 result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra; 625 result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1; 626 result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1; 627 result.log2_min_pcm_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3; 628 result.log2_diff_max_min_pcm_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size; 629 result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets; 630 631 result.pps_info_flags = 0; 632 result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0; 633 result.pps_info_flags |= pic->pps->output_flag_present_flag << 1; 634 result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2; 635 result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3; 636 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4; 637 result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5; 638 result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6; 639 result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7; 640 result.pps_info_flags |= pic->pps->weighted_pred_flag << 8; 641 result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9; 642 result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10; 643 result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11; 644 result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12; 645 result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13; 646 result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14; 647 result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15; 648 result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16; 649 result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17; 650 result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18; 651 result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19; 652 //result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ??? 653 654 result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits; 655 result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps; 656 result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1; 657 result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1; 658 result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset; 659 result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset; 660 result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2; 661 result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2; 662 result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth; 663 result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1; 664 result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1; 665 result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2; 666 result.init_qp_minus26 = pic->pps->init_qp_minus26; 667 668 for (i = 0; i < 19; ++i) 669 result.column_width_minus1[i] = pic->pps->column_width_minus1[i]; 670 671 for (i = 0; i < 21; ++i) 672 result.row_height_minus1[i] = pic->pps->row_height_minus1[i]; 673 674 result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx; 675 result.curr_poc = pic->CurrPicOrderCntVal; 676 677 for (i = 0 ; i < 16 ; i++) { 678 for (j = 0; (pic->ref[j] != NULL) && (j < 16) ; j++) { 679 if (dec->render_pic_list[i] == pic->ref[j]) 680 break; 681 if (j == 15) 682 dec->render_pic_list[i] = NULL; 683 else if (pic->ref[j+1] == NULL) 684 dec->render_pic_list[i] = NULL; 685 } 686 } 687 for (i = 0 ; i < 16 ; i++) { 688 if (dec->render_pic_list[i] == NULL) { 689 dec->render_pic_list[i] = target; 690 result.curr_idx = i; 691 break; 692 } 693 } 694 695 vl_video_buffer_set_associated_data(target, &dec->base, 696 (void *)(uintptr_t)result.curr_idx, 697 &ruvd_destroy_associated_data); 698 699 for (i = 0; i < 16; ++i) { 700 struct pipe_video_buffer *ref = pic->ref[i]; 701 uintptr_t ref_pic = 0; 702 703 result.poc_list[i] = pic->PicOrderCntVal[i]; 704 705 if (ref) 706 ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base); 707 else 708 ref_pic = 0x7F; 709 result.ref_pic_list[i] = ref_pic; 710 } 711 712 for (i = 0; i < 8; ++i) { 713 result.ref_pic_set_st_curr_before[i] = 0xFF; 714 result.ref_pic_set_st_curr_after[i] = 0xFF; 715 result.ref_pic_set_lt_curr[i] = 0xFF; 716 } 717 718 for (i = 0; i < pic->NumPocStCurrBefore; ++i) 719 result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i]; 720 721 for (i = 0; i < pic->NumPocStCurrAfter; ++i) 722 result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i]; 723 724 for (i = 0; i < pic->NumPocLtCurr; ++i) 725 result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i]; 726 727 for (i = 0; i < 6; ++i) 728 result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i]; 729 730 for (i = 0; i < 2; ++i) 731 result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i]; 732 733 memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16); 734 memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64); 735 memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64); 736 memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64); 737 738 for (i = 0 ; i < 2 ; i++) { 739 for (j = 0 ; j < 15 ; j++) 740 result.direct_reflist[i][j] = pic->RefPicList[i][j]; 741 } 742 743 if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) { 744 if (target->buffer_format == PIPE_FORMAT_P016) { 745 result.p010_mode = 1; 746 result.msb_mode = 1; 747 } else { 748 result.luma_10to8 = 5; 749 result.chroma_10to8 = 5; 750 result.sclr_luma10to8 = 4; 751 result.sclr_chroma10to8 = 4; 752 } 753 } 754 755 /* TODO 756 result.highestTid; 757 result.isNonRef; 758 759 IDRPicFlag; 760 RAPPicFlag; 761 NumPocTotalCurr; 762 NumShortTermPictureSliceHeaderBits; 763 NumLongTermPictureSliceHeaderBits; 764 765 IsLongTerm[16]; 766 */ 767 768 return result; 769} 770 771/* get vc1 specific message bits */ 772static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic) 773{ 774 struct ruvd_vc1 result; 775 776 memset(&result, 0, sizeof(result)); 777 778 switch(pic->base.profile) { 779 case PIPE_VIDEO_PROFILE_VC1_SIMPLE: 780 result.profile = RUVD_VC1_PROFILE_SIMPLE; 781 result.level = 1; 782 break; 783 784 case PIPE_VIDEO_PROFILE_VC1_MAIN: 785 result.profile = RUVD_VC1_PROFILE_MAIN; 786 result.level = 2; 787 break; 788 789 case PIPE_VIDEO_PROFILE_VC1_ADVANCED: 790 result.profile = RUVD_VC1_PROFILE_ADVANCED; 791 result.level = 4; 792 break; 793 794 default: 795 assert(0); 796 } 797 798 /* fields common for all profiles */ 799 result.sps_info_flags |= pic->postprocflag << 7; 800 result.sps_info_flags |= pic->pulldown << 6; 801 result.sps_info_flags |= pic->interlace << 5; 802 result.sps_info_flags |= pic->tfcntrflag << 4; 803 result.sps_info_flags |= pic->finterpflag << 3; 804 result.sps_info_flags |= pic->psf << 1; 805 806 result.pps_info_flags |= pic->range_mapy_flag << 31; 807 result.pps_info_flags |= pic->range_mapy << 28; 808 result.pps_info_flags |= pic->range_mapuv_flag << 27; 809 result.pps_info_flags |= pic->range_mapuv << 24; 810 result.pps_info_flags |= pic->multires << 21; 811 result.pps_info_flags |= pic->maxbframes << 16; 812 result.pps_info_flags |= pic->overlap << 11; 813 result.pps_info_flags |= pic->quantizer << 9; 814 result.pps_info_flags |= pic->panscan_flag << 7; 815 result.pps_info_flags |= pic->refdist_flag << 6; 816 result.pps_info_flags |= pic->vstransform << 0; 817 818 /* some fields only apply to main/advanced profile */ 819 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) { 820 result.pps_info_flags |= pic->syncmarker << 20; 821 result.pps_info_flags |= pic->rangered << 19; 822 result.pps_info_flags |= pic->loopfilter << 5; 823 result.pps_info_flags |= pic->fastuvmc << 4; 824 result.pps_info_flags |= pic->extended_mv << 3; 825 result.pps_info_flags |= pic->extended_dmv << 8; 826 result.pps_info_flags |= pic->dquant << 1; 827 } 828 829 result.chroma_format = 1; 830 831#if 0 832//(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT) 833uint32_t slice_count 834uint8_t picture_type 835uint8_t frame_coding_mode 836uint8_t deblockEnable 837uint8_t pquant 838#endif 839 840 return result; 841} 842 843/* extract the frame number from a referenced video buffer */ 844static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref) 845{ 846 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS; 847 uint32_t max = MAX2(dec->frame_number, 1) - 1; 848 uintptr_t frame; 849 850 /* seems to be the most sane fallback */ 851 if (!ref) 852 return max; 853 854 /* get the frame number from the associated data */ 855 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base); 856 857 /* limit the frame number to a valid range */ 858 return MAX2(MIN2(frame, max), min); 859} 860 861/* get mpeg2 specific msg bits */ 862static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec, 863 struct pipe_mpeg12_picture_desc *pic) 864{ 865 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal; 866 struct ruvd_mpeg2 result; 867 unsigned i; 868 869 memset(&result, 0, sizeof(result)); 870 result.decoded_pic_idx = dec->frame_number; 871 for (i = 0; i < 2; ++i) 872 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]); 873 874 if(pic->intra_matrix) { 875 result.load_intra_quantiser_matrix = 1; 876 for (i = 0; i < 64; ++i) { 877 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]]; 878 } 879 } 880 if(pic->non_intra_matrix) { 881 result.load_nonintra_quantiser_matrix = 1; 882 for (i = 0; i < 64; ++i) { 883 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]]; 884 } 885 } 886 887 result.profile_and_level_indication = 0; 888 result.chroma_format = 0x1; 889 890 result.picture_coding_type = pic->picture_coding_type; 891 result.f_code[0][0] = pic->f_code[0][0] + 1; 892 result.f_code[0][1] = pic->f_code[0][1] + 1; 893 result.f_code[1][0] = pic->f_code[1][0] + 1; 894 result.f_code[1][1] = pic->f_code[1][1] + 1; 895 result.intra_dc_precision = pic->intra_dc_precision; 896 result.pic_structure = pic->picture_structure; 897 result.top_field_first = pic->top_field_first; 898 result.frame_pred_frame_dct = pic->frame_pred_frame_dct; 899 result.concealment_motion_vectors = pic->concealment_motion_vectors; 900 result.q_scale_type = pic->q_scale_type; 901 result.intra_vlc_format = pic->intra_vlc_format; 902 result.alternate_scan = pic->alternate_scan; 903 904 return result; 905} 906 907/* get mpeg4 specific msg bits */ 908static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec, 909 struct pipe_mpeg4_picture_desc *pic) 910{ 911 struct ruvd_mpeg4 result; 912 unsigned i; 913 914 memset(&result, 0, sizeof(result)); 915 result.decoded_pic_idx = dec->frame_number; 916 for (i = 0; i < 2; ++i) 917 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]); 918 919 result.variant_type = 0; 920 result.profile_and_level_indication = 0xF0; // ASP Level0 921 922 result.video_object_layer_verid = 0x5; // advanced simple 923 result.video_object_layer_shape = 0x0; // rectangular 924 925 result.video_object_layer_width = dec->base.width; 926 result.video_object_layer_height = dec->base.height; 927 928 result.vop_time_increment_resolution = pic->vop_time_increment_resolution; 929 930 result.flags |= pic->short_video_header << 0; 931 //result.flags |= obmc_disable << 1; 932 result.flags |= pic->interlaced << 2; 933 result.flags |= 1 << 3; // load_intra_quant_mat 934 result.flags |= 1 << 4; // load_nonintra_quant_mat 935 result.flags |= pic->quarter_sample << 5; 936 result.flags |= 1 << 6; // complexity_estimation_disable 937 result.flags |= pic->resync_marker_disable << 7; 938 //result.flags |= data_partitioned << 8; 939 //result.flags |= reversible_vlc << 9; 940 result.flags |= 0 << 10; // newpred_enable 941 result.flags |= 0 << 11; // reduced_resolution_vop_enable 942 //result.flags |= scalability << 12; 943 //result.flags |= is_object_layer_identifier << 13; 944 //result.flags |= fixed_vop_rate << 14; 945 //result.flags |= newpred_segment_type << 15; 946 947 result.quant_type = pic->quant_type; 948 949 for (i = 0; i < 64; ++i) { 950 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]]; 951 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]]; 952 } 953 954 /* 955 int32_t trd [2] 956 int32_t trb [2] 957 uint8_t vop_coding_type 958 uint8_t vop_fcode_forward 959 uint8_t vop_fcode_backward 960 uint8_t rounding_control 961 uint8_t alternate_vertical_scan_flag 962 uint8_t top_field_first 963 */ 964 965 return result; 966} 967 968/** 969 * destroy this video decoder 970 */ 971static void ruvd_destroy(struct pipe_video_codec *decoder) 972{ 973 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder; 974 unsigned i; 975 976 assert(decoder); 977 978 map_msg_fb_it_buf(dec); 979 dec->msg->size = sizeof(*dec->msg); 980 dec->msg->msg_type = RUVD_MSG_DESTROY; 981 dec->msg->stream_handle = dec->stream_handle; 982 send_msg_buf(dec); 983 984 flush(dec, 0); 985 986 dec->ws->cs_destroy(dec->cs); 987 988 for (i = 0; i < NUM_BUFFERS; ++i) { 989 si_vid_destroy_buffer(&dec->msg_fb_it_buffers[i]); 990 si_vid_destroy_buffer(&dec->bs_buffers[i]); 991 } 992 993 si_vid_destroy_buffer(&dec->dpb); 994 si_vid_destroy_buffer(&dec->ctx); 995 si_vid_destroy_buffer(&dec->sessionctx); 996 997 FREE(dec); 998} 999 1000/** 1001 * start decoding of a new frame 1002 */ 1003static void ruvd_begin_frame(struct pipe_video_codec *decoder, 1004 struct pipe_video_buffer *target, 1005 struct pipe_picture_desc *picture) 1006{ 1007 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder; 1008 uintptr_t frame; 1009 1010 assert(decoder); 1011 1012 frame = ++dec->frame_number; 1013 vl_video_buffer_set_associated_data(target, decoder, (void *)frame, 1014 &ruvd_destroy_associated_data); 1015 1016 dec->bs_size = 0; 1017 dec->bs_ptr = dec->ws->buffer_map( 1018 dec->bs_buffers[dec->cur_buffer].res->buf, 1019 dec->cs, PIPE_TRANSFER_WRITE | RADEON_TRANSFER_TEMPORARY); 1020} 1021 1022/** 1023 * decode a macroblock 1024 */ 1025static void ruvd_decode_macroblock(struct pipe_video_codec *decoder, 1026 struct pipe_video_buffer *target, 1027 struct pipe_picture_desc *picture, 1028 const struct pipe_macroblock *macroblocks, 1029 unsigned num_macroblocks) 1030{ 1031 /* not supported (yet) */ 1032 assert(0); 1033} 1034 1035/** 1036 * decode a bitstream 1037 */ 1038static void ruvd_decode_bitstream(struct pipe_video_codec *decoder, 1039 struct pipe_video_buffer *target, 1040 struct pipe_picture_desc *picture, 1041 unsigned num_buffers, 1042 const void * const *buffers, 1043 const unsigned *sizes) 1044{ 1045 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder; 1046 unsigned i; 1047 1048 assert(decoder); 1049 1050 if (!dec->bs_ptr) 1051 return; 1052 1053 for (i = 0; i < num_buffers; ++i) { 1054 struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer]; 1055 unsigned new_size = dec->bs_size + sizes[i]; 1056 1057 if (new_size > buf->res->buf->size) { 1058 dec->ws->buffer_unmap(buf->res->buf); 1059 if (!si_vid_resize_buffer(dec->screen, dec->cs, buf, new_size)) { 1060 RVID_ERR("Can't resize bitstream buffer!"); 1061 return; 1062 } 1063 1064 dec->bs_ptr = dec->ws->buffer_map( 1065 buf->res->buf, dec->cs, 1066 PIPE_TRANSFER_WRITE | RADEON_TRANSFER_TEMPORARY); 1067 if (!dec->bs_ptr) 1068 return; 1069 1070 dec->bs_ptr += dec->bs_size; 1071 } 1072 1073 memcpy(dec->bs_ptr, buffers[i], sizes[i]); 1074 dec->bs_size += sizes[i]; 1075 dec->bs_ptr += sizes[i]; 1076 } 1077} 1078 1079/** 1080 * end decoding of the current frame 1081 */ 1082static void ruvd_end_frame(struct pipe_video_codec *decoder, 1083 struct pipe_video_buffer *target, 1084 struct pipe_picture_desc *picture) 1085{ 1086 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder; 1087 struct pb_buffer *dt; 1088 struct rvid_buffer *msg_fb_it_buf, *bs_buf; 1089 unsigned bs_size; 1090 1091 assert(decoder); 1092 1093 if (!dec->bs_ptr) 1094 return; 1095 1096 msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer]; 1097 bs_buf = &dec->bs_buffers[dec->cur_buffer]; 1098 1099 bs_size = align(dec->bs_size, 128); 1100 memset(dec->bs_ptr, 0, bs_size - dec->bs_size); 1101 dec->ws->buffer_unmap(bs_buf->res->buf); 1102 1103 map_msg_fb_it_buf(dec); 1104 dec->msg->size = sizeof(*dec->msg); 1105 dec->msg->msg_type = RUVD_MSG_DECODE; 1106 dec->msg->stream_handle = dec->stream_handle; 1107 dec->msg->status_report_feedback_number = dec->frame_number; 1108 1109 dec->msg->body.decode.stream_type = dec->stream_type; 1110 dec->msg->body.decode.decode_flags = 0x1; 1111 dec->msg->body.decode.width_in_samples = dec->base.width; 1112 dec->msg->body.decode.height_in_samples = dec->base.height; 1113 1114 if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) || 1115 (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) { 1116 dec->msg->body.decode.width_in_samples = align(dec->msg->body.decode.width_in_samples, 16) / 16; 1117 dec->msg->body.decode.height_in_samples = align(dec->msg->body.decode.height_in_samples, 16) / 16; 1118 } 1119 1120 if (dec->dpb.res) 1121 dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size; 1122 dec->msg->body.decode.bsd_size = bs_size; 1123 dec->msg->body.decode.db_pitch = align(dec->base.width, get_db_pitch_alignment(dec)); 1124 1125 if (dec->stream_type == RUVD_CODEC_H264_PERF && 1126 ((struct si_screen*)dec->screen)->info.family >= CHIP_POLARIS10) 1127 dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size; 1128 1129 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target); 1130 if (((struct si_screen*)dec->screen)->info.family >= CHIP_STONEY) 1131 dec->msg->body.decode.dt_wa_chroma_top_offset = dec->msg->body.decode.dt_pitch / 2; 1132 1133 switch (u_reduce_video_profile(picture->profile)) { 1134 case PIPE_VIDEO_FORMAT_MPEG4_AVC: 1135 dec->msg->body.decode.codec.h264 = get_h264_msg(dec, (struct pipe_h264_picture_desc*)picture); 1136 break; 1137 1138 case PIPE_VIDEO_FORMAT_HEVC: 1139 dec->msg->body.decode.codec.h265 = get_h265_msg(dec, target, (struct pipe_h265_picture_desc*)picture); 1140 if (dec->ctx.res == NULL) { 1141 unsigned ctx_size; 1142 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) 1143 ctx_size = calc_ctx_size_h265_main10(dec, (struct pipe_h265_picture_desc*)picture); 1144 else 1145 ctx_size = calc_ctx_size_h265_main(dec); 1146 if (!si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) { 1147 RVID_ERR("Can't allocated context buffer.\n"); 1148 } 1149 si_vid_clear_buffer(decoder->context, &dec->ctx); 1150 } 1151 1152 if (dec->ctx.res) 1153 dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size; 1154 break; 1155 1156 case PIPE_VIDEO_FORMAT_VC1: 1157 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc*)picture); 1158 break; 1159 1160 case PIPE_VIDEO_FORMAT_MPEG12: 1161 dec->msg->body.decode.codec.mpeg2 = get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc*)picture); 1162 break; 1163 1164 case PIPE_VIDEO_FORMAT_MPEG4: 1165 dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture); 1166 break; 1167 1168 case PIPE_VIDEO_FORMAT_JPEG: 1169 break; 1170 1171 default: 1172 assert(0); 1173 return; 1174 } 1175 1176 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config; 1177 dec->msg->body.decode.extension_support = 0x1; 1178 1179 /* set at least the feedback buffer size */ 1180 dec->fb[0] = dec->fb_size; 1181 1182 send_msg_buf(dec); 1183 1184 if (dec->dpb.res) 1185 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0, 1186 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM); 1187 1188 if (dec->ctx.res) 1189 send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0, 1190 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM); 1191 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf, 1192 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT); 1193 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0, 1194 RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM); 1195 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->buf, 1196 FB_BUFFER_OFFSET, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT); 1197 if (have_it(dec)) 1198 send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->buf, 1199 FB_BUFFER_OFFSET + dec->fb_size, RADEON_USAGE_READ, RADEON_DOMAIN_GTT); 1200 set_reg(dec, dec->reg.cntl, 1); 1201 1202 flush(dec, PIPE_FLUSH_ASYNC); 1203 next_buffer(dec); 1204} 1205 1206/** 1207 * flush any outstanding command buffers to the hardware 1208 */ 1209static void ruvd_flush(struct pipe_video_codec *decoder) 1210{ 1211} 1212 1213/** 1214 * create and UVD decoder 1215 */ 1216struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *context, 1217 const struct pipe_video_codec *templ, 1218 ruvd_set_dtb set_dtb) 1219{ 1220 struct si_context *sctx = (struct si_context*)context; 1221 struct radeon_winsys *ws = sctx->ws; 1222 unsigned dpb_size; 1223 unsigned width = templ->width, height = templ->height; 1224 unsigned bs_buf_size; 1225 struct ruvd_decoder *dec; 1226 int r, i; 1227 1228 switch(u_reduce_video_profile(templ->profile)) { 1229 case PIPE_VIDEO_FORMAT_MPEG12: 1230 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM) 1231 return vl_create_mpeg12_decoder(context, templ); 1232 1233 /* fall through */ 1234 case PIPE_VIDEO_FORMAT_MPEG4: 1235 width = align(width, VL_MACROBLOCK_WIDTH); 1236 height = align(height, VL_MACROBLOCK_HEIGHT); 1237 break; 1238 case PIPE_VIDEO_FORMAT_MPEG4_AVC: 1239 width = align(width, VL_MACROBLOCK_WIDTH); 1240 height = align(height, VL_MACROBLOCK_HEIGHT); 1241 break; 1242 1243 default: 1244 break; 1245 } 1246 1247 1248 dec = CALLOC_STRUCT(ruvd_decoder); 1249 1250 if (!dec) 1251 return NULL; 1252 1253 if (sctx->screen->info.drm_major < 3) 1254 dec->use_legacy = true; 1255 1256 dec->base = *templ; 1257 dec->base.context = context; 1258 dec->base.width = width; 1259 dec->base.height = height; 1260 1261 dec->base.destroy = ruvd_destroy; 1262 dec->base.begin_frame = ruvd_begin_frame; 1263 dec->base.decode_macroblock = ruvd_decode_macroblock; 1264 dec->base.decode_bitstream = ruvd_decode_bitstream; 1265 dec->base.end_frame = ruvd_end_frame; 1266 dec->base.flush = ruvd_flush; 1267 1268 dec->stream_type = profile2stream_type(dec, sctx->family); 1269 dec->set_dtb = set_dtb; 1270 dec->stream_handle = si_vid_alloc_stream_handle(); 1271 dec->screen = context->screen; 1272 dec->ws = ws; 1273 dec->cs = ws->cs_create(sctx->ctx, RING_UVD, NULL, NULL, false); 1274 if (!dec->cs) { 1275 RVID_ERR("Can't get command submission context.\n"); 1276 goto error; 1277 } 1278 1279 for (i = 0; i < 16; i++) 1280 dec->render_pic_list[i] = NULL; 1281 dec->fb_size = (sctx->family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA : 1282 FB_BUFFER_SIZE; 1283 bs_buf_size = width * height * (512 / (16 * 16)); 1284 for (i = 0; i < NUM_BUFFERS; ++i) { 1285 unsigned msg_fb_it_size = FB_BUFFER_OFFSET + dec->fb_size; 1286 STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET); 1287 if (have_it(dec)) 1288 msg_fb_it_size += IT_SCALING_TABLE_SIZE; 1289 if (!si_vid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i], 1290 msg_fb_it_size, PIPE_USAGE_STAGING)) { 1291 RVID_ERR("Can't allocated message buffers.\n"); 1292 goto error; 1293 } 1294 1295 if (!si_vid_create_buffer(dec->screen, &dec->bs_buffers[i], 1296 bs_buf_size, PIPE_USAGE_STAGING)) { 1297 RVID_ERR("Can't allocated bitstream buffers.\n"); 1298 goto error; 1299 } 1300 1301 si_vid_clear_buffer(context, &dec->msg_fb_it_buffers[i]); 1302 si_vid_clear_buffer(context, &dec->bs_buffers[i]); 1303 } 1304 1305 dpb_size = calc_dpb_size(dec); 1306 if (dpb_size) { 1307 if (!si_vid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) { 1308 RVID_ERR("Can't allocated dpb.\n"); 1309 goto error; 1310 } 1311 si_vid_clear_buffer(context, &dec->dpb); 1312 } 1313 1314 if (dec->stream_type == RUVD_CODEC_H264_PERF && sctx->family >= CHIP_POLARIS10) { 1315 unsigned ctx_size = calc_ctx_size_h264_perf(dec); 1316 if (!si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) { 1317 RVID_ERR("Can't allocated context buffer.\n"); 1318 goto error; 1319 } 1320 si_vid_clear_buffer(context, &dec->ctx); 1321 } 1322 1323 if (sctx->family >= CHIP_POLARIS10 && sctx->screen->info.drm_minor >= 3) { 1324 if (!si_vid_create_buffer(dec->screen, &dec->sessionctx, 1325 UVD_SESSION_CONTEXT_SIZE, 1326 PIPE_USAGE_DEFAULT)) { 1327 RVID_ERR("Can't allocated session ctx.\n"); 1328 goto error; 1329 } 1330 si_vid_clear_buffer(context, &dec->sessionctx); 1331 } 1332 1333 if (sctx->family >= CHIP_VEGA10) { 1334 dec->reg.data0 = RUVD_GPCOM_VCPU_DATA0_SOC15; 1335 dec->reg.data1 = RUVD_GPCOM_VCPU_DATA1_SOC15; 1336 dec->reg.cmd = RUVD_GPCOM_VCPU_CMD_SOC15; 1337 dec->reg.cntl = RUVD_ENGINE_CNTL_SOC15; 1338 } else { 1339 dec->reg.data0 = RUVD_GPCOM_VCPU_DATA0; 1340 dec->reg.data1 = RUVD_GPCOM_VCPU_DATA1; 1341 dec->reg.cmd = RUVD_GPCOM_VCPU_CMD; 1342 dec->reg.cntl = RUVD_ENGINE_CNTL; 1343 } 1344 1345 map_msg_fb_it_buf(dec); 1346 dec->msg->size = sizeof(*dec->msg); 1347 dec->msg->msg_type = RUVD_MSG_CREATE; 1348 dec->msg->stream_handle = dec->stream_handle; 1349 dec->msg->body.create.stream_type = dec->stream_type; 1350 dec->msg->body.create.width_in_samples = dec->base.width; 1351 dec->msg->body.create.height_in_samples = dec->base.height; 1352 dec->msg->body.create.dpb_size = dpb_size; 1353 send_msg_buf(dec); 1354 r = flush(dec, 0); 1355 if (r) 1356 goto error; 1357 1358 next_buffer(dec); 1359 1360 return &dec->base; 1361 1362error: 1363 if (dec->cs) dec->ws->cs_destroy(dec->cs); 1364 1365 for (i = 0; i < NUM_BUFFERS; ++i) { 1366 si_vid_destroy_buffer(&dec->msg_fb_it_buffers[i]); 1367 si_vid_destroy_buffer(&dec->bs_buffers[i]); 1368 } 1369 1370 si_vid_destroy_buffer(&dec->dpb); 1371 si_vid_destroy_buffer(&dec->ctx); 1372 si_vid_destroy_buffer(&dec->sessionctx); 1373 1374 FREE(dec); 1375 1376 return NULL; 1377} 1378 1379/* calculate top/bottom offset */ 1380static unsigned texture_offset(struct radeon_surf *surface, unsigned layer, 1381 enum ruvd_surface_type type) 1382{ 1383 switch (type) { 1384 default: 1385 case RUVD_SURFACE_TYPE_LEGACY: 1386 return surface->u.legacy.level[0].offset + 1387 layer * (uint64_t)surface->u.legacy.level[0].slice_size_dw * 4; 1388 break; 1389 case RUVD_SURFACE_TYPE_GFX9: 1390 return surface->u.gfx9.surf_offset + 1391 layer * surface->u.gfx9.surf_slice_size; 1392 break; 1393 } 1394} 1395 1396/* hw encode the aspect of macro tiles */ 1397static unsigned macro_tile_aspect(unsigned macro_tile_aspect) 1398{ 1399 switch (macro_tile_aspect) { 1400 default: 1401 case 1: macro_tile_aspect = 0; break; 1402 case 2: macro_tile_aspect = 1; break; 1403 case 4: macro_tile_aspect = 2; break; 1404 case 8: macro_tile_aspect = 3; break; 1405 } 1406 return macro_tile_aspect; 1407} 1408 1409/* hw encode the bank width and height */ 1410static unsigned bank_wh(unsigned bankwh) 1411{ 1412 switch (bankwh) { 1413 default: 1414 case 1: bankwh = 0; break; 1415 case 2: bankwh = 1; break; 1416 case 4: bankwh = 2; break; 1417 case 8: bankwh = 3; break; 1418 } 1419 return bankwh; 1420} 1421 1422/** 1423 * fill decoding target field from the luma and chroma surfaces 1424 */ 1425void si_uvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma, 1426 struct radeon_surf *chroma, enum ruvd_surface_type type) 1427{ 1428 switch (type) { 1429 default: 1430 case RUVD_SURFACE_TYPE_LEGACY: 1431 msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w; 1432 switch (luma->u.legacy.level[0].mode) { 1433 case RADEON_SURF_MODE_LINEAR_ALIGNED: 1434 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR; 1435 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR; 1436 break; 1437 case RADEON_SURF_MODE_1D: 1438 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8; 1439 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN; 1440 break; 1441 case RADEON_SURF_MODE_2D: 1442 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8; 1443 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN; 1444 break; 1445 default: 1446 assert(0); 1447 break; 1448 } 1449 1450 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0, type); 1451 if (chroma) 1452 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0, type); 1453 if (msg->body.decode.dt_field_mode) { 1454 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1, type); 1455 if (chroma) 1456 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1, type); 1457 } else { 1458 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset; 1459 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset; 1460 } 1461 1462 if (chroma) { 1463 assert(luma->u.legacy.bankw == chroma->u.legacy.bankw); 1464 assert(luma->u.legacy.bankh == chroma->u.legacy.bankh); 1465 assert(luma->u.legacy.mtilea == chroma->u.legacy.mtilea); 1466 } 1467 1468 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->u.legacy.bankw)); 1469 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh)); 1470 msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->u.legacy.mtilea)); 1471 break; 1472 case RUVD_SURFACE_TYPE_GFX9: 1473 msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->blk_w; 1474 /* SWIZZLE LINEAR MODE */ 1475 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR; 1476 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR; 1477 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0, type); 1478 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0, type); 1479 if (msg->body.decode.dt_field_mode) { 1480 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1, type); 1481 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1, type); 1482 } else { 1483 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset; 1484 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset; 1485 } 1486 msg->body.decode.dt_surf_tile_config = 0; 1487 break; 1488 } 1489} 1490