1/**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "si_pipe.h"
29#include "radeon/radeon_video.h"
30#include "radeon/radeon_uvd.h"
31#include "radeon/radeon_vce.h"
32#include "radeon/radeon_vcn_dec.h"
33#include "radeon/radeon_vcn_enc.h"
34#include "radeon/radeon_uvd_enc.h"
35#include "util/u_video.h"
36
37/**
38 * creates an video buffer with an UVD compatible memory layout
39 */
40struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
41						 const struct pipe_video_buffer *tmpl)
42{
43	struct si_context *ctx = (struct si_context *)pipe;
44	struct si_texture *resources[VL_NUM_COMPONENTS] = {};
45	struct radeon_surf *surfaces[VL_NUM_COMPONENTS] = {};
46	struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
47	const enum pipe_format *resource_formats;
48	struct pipe_video_buffer vidtemplate;
49	struct pipe_resource templ;
50	unsigned i, array_size;
51
52	assert(pipe);
53
54	/* first create the needed resources as "normal" textures */
55	resource_formats = vl_video_buffer_formats(pipe->screen, tmpl->buffer_format);
56	if (!resource_formats)
57		return NULL;
58
59	array_size = tmpl->interlaced ? 2 : 1;
60	vidtemplate = *tmpl;
61	vidtemplate.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
62	vidtemplate.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
63
64	assert(resource_formats[0] != PIPE_FORMAT_NONE);
65
66	for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
67		if (resource_formats[i] != PIPE_FORMAT_NONE) {
68			vl_video_buffer_template(&templ, &vidtemplate,
69			                         resource_formats[i], 1,
70			                         array_size, PIPE_USAGE_DEFAULT, i);
71			/* Set PIPE_BIND_SHARED to avoid reallocation in si_texture_get_handle,
72			 * which can't handle joined surfaces. */
73			/* TODO: get tiling working */
74			templ.bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED;
75			resources[i] = (struct si_texture *)
76			                pipe->screen->resource_create(pipe->screen, &templ);
77			if (!resources[i])
78				goto error;
79		}
80	}
81
82	for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
83		if (!resources[i])
84			continue;
85
86		surfaces[i] = & resources[i]->surface;
87		pbs[i] = &resources[i]->buffer.buf;
88	}
89
90	si_vid_join_surfaces(ctx, pbs, surfaces);
91
92	for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
93		if (!resources[i])
94			continue;
95
96		/* reset the address */
97		resources[i]->buffer.gpu_address = ctx->ws->buffer_get_virtual_address(
98			resources[i]->buffer.buf);
99	}
100
101	vidtemplate.height *= array_size;
102	return vl_video_buffer_create_ex2(pipe, &vidtemplate, (struct pipe_resource **)resources);
103
104error:
105	for (i = 0; i < VL_NUM_COMPONENTS; ++i)
106		si_texture_reference(&resources[i], NULL);
107
108	return NULL;
109}
110
111/* set the decoding target buffer offsets */
112static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
113{
114	struct si_screen *sscreen = (struct si_screen*)buf->base.context->screen;
115	struct si_texture *luma = (struct si_texture *)buf->resources[0];
116	struct si_texture *chroma = (struct si_texture *)buf->resources[1];
117	enum ruvd_surface_type type =  (sscreen->info.chip_class >= GFX9) ?
118					RUVD_SURFACE_TYPE_GFX9 :
119					RUVD_SURFACE_TYPE_LEGACY;
120
121	msg->body.decode.dt_field_mode = buf->base.interlaced;
122
123	si_uvd_set_dt_surfaces(msg, &luma->surface, (chroma) ? &chroma->surface : NULL, type);
124
125	return luma->buffer.buf;
126}
127
128/* get the radeon resources for VCE */
129static void si_vce_get_buffer(struct pipe_resource *resource,
130			      struct pb_buffer **handle,
131			      struct radeon_surf **surface)
132{
133	struct si_texture *res = (struct si_texture *)resource;
134
135	if (handle)
136		*handle = res->buffer.buf;
137
138	if (surface)
139		*surface = &res->surface;
140}
141
142/**
143 * creates an UVD compatible decoder
144 */
145struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
146					       const struct pipe_video_codec *templ)
147{
148	struct si_context *ctx = (struct si_context *)context;
149	bool vcn = ctx->family == CHIP_RAVEN ||
150		   ctx->family == CHIP_RAVEN2;
151
152	if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
153		if (vcn) {
154			return radeon_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
155		} else {
156			if (u_reduce_video_profile(templ->profile) == PIPE_VIDEO_FORMAT_HEVC)
157				return radeon_uvd_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
158			else
159				return si_vce_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
160		}
161	}
162
163	return (vcn) ? 	radeon_create_decoder(context, templ) :
164		si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);
165}
166