1/********************************************************** 2 * Copyright 2007-2015 VMware, Inc. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person 5 * obtaining a copy of this software and associated documentation 6 * files (the "Software"), to deal in the Software without 7 * restriction, including without limitation the rights to use, copy, 8 * modify, merge, publish, distribute, sublicense, and/or sell copies 9 * of the Software, and to permit persons to whom the Software is 10 * furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be 13 * included in all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 * 24 **********************************************************/ 25 26/* 27 * VGPU10ShaderTokens.h -- 28 * 29 * VGPU10 shader token definitions. 30 * 31 */ 32 33#ifndef VGPU10SHADERTOKENS_H 34#define VGPU10SHADERTOKENS_H 35 36/* Shader limits */ 37#define VGPU10_MAX_VS_INPUTS 16 38#define VGPU10_MAX_VS_OUTPUTS 16 39#define VGPU10_MAX_GS_INPUTS 16 40#define VGPU10_MAX_GS_OUTPUTS 32 41#define VGPU10_MAX_FS_INPUTS 32 42#define VGPU10_MAX_FS_OUTPUTS 8 43#define VGPU10_MAX_TEMPS 4096 44#define VGPU10_MAX_CONSTANT_BUFFERS 14 45#define VGPU10_MAX_CONSTANT_BUFFER_ELEMENT_COUNT 4096 46#define VGPU10_MAX_IMMEDIATE_CONSTANT_BUFFER_ELEMENT_COUNT 4096 47#define VGPU10_MAX_SAMPLERS 16 48#define VGPU10_MAX_RESOURCES 128 49#define VGPU10_MIN_TEXEL_FETCH_OFFSET -8 50#define VGPU10_MAX_TEXEL_FETCH_OFFSET 7 51 52typedef enum { 53 VGPU10_PIXEL_SHADER = 0, 54 VGPU10_VERTEX_SHADER = 1, 55 VGPU10_GEOMETRY_SHADER = 2 56} VGPU10_PROGRAM_TYPE; 57 58typedef union { 59 struct { 60 unsigned int minorVersion : 4; 61 unsigned int majorVersion : 4; 62 unsigned int : 8; 63 unsigned int programType : 16; /* VGPU10_PROGRAM_TYPE */ 64 }; 65 uint32 value; 66} VGPU10ProgramToken; 67 68 69typedef enum { 70 VGPU10_OPCODE_ADD = 0, 71 VGPU10_OPCODE_AND = 1, 72 VGPU10_OPCODE_BREAK = 2, 73 VGPU10_OPCODE_BREAKC = 3, 74 VGPU10_OPCODE_CALL = 4, 75 VGPU10_OPCODE_CALLC = 5, 76 VGPU10_OPCODE_CASE = 6, 77 VGPU10_OPCODE_CONTINUE = 7, 78 VGPU10_OPCODE_CONTINUEC = 8, 79 VGPU10_OPCODE_CUT = 9, 80 VGPU10_OPCODE_DEFAULT = 10, 81 VGPU10_OPCODE_DERIV_RTX = 11, 82 VGPU10_OPCODE_DERIV_RTY = 12, 83 VGPU10_OPCODE_DISCARD = 13, 84 VGPU10_OPCODE_DIV = 14, 85 VGPU10_OPCODE_DP2 = 15, 86 VGPU10_OPCODE_DP3 = 16, 87 VGPU10_OPCODE_DP4 = 17, 88 VGPU10_OPCODE_ELSE = 18, 89 VGPU10_OPCODE_EMIT = 19, 90 VGPU10_OPCODE_EMITTHENCUT = 20, 91 VGPU10_OPCODE_ENDIF = 21, 92 VGPU10_OPCODE_ENDLOOP = 22, 93 VGPU10_OPCODE_ENDSWITCH = 23, 94 VGPU10_OPCODE_EQ = 24, 95 VGPU10_OPCODE_EXP = 25, 96 VGPU10_OPCODE_FRC = 26, 97 VGPU10_OPCODE_FTOI = 27, 98 VGPU10_OPCODE_FTOU = 28, 99 VGPU10_OPCODE_GE = 29, 100 VGPU10_OPCODE_IADD = 30, 101 VGPU10_OPCODE_IF = 31, 102 VGPU10_OPCODE_IEQ = 32, 103 VGPU10_OPCODE_IGE = 33, 104 VGPU10_OPCODE_ILT = 34, 105 VGPU10_OPCODE_IMAD = 35, 106 VGPU10_OPCODE_IMAX = 36, 107 VGPU10_OPCODE_IMIN = 37, 108 VGPU10_OPCODE_IMUL = 38, 109 VGPU10_OPCODE_INE = 39, 110 VGPU10_OPCODE_INEG = 40, 111 VGPU10_OPCODE_ISHL = 41, 112 VGPU10_OPCODE_ISHR = 42, 113 VGPU10_OPCODE_ITOF = 43, 114 VGPU10_OPCODE_LABEL = 44, 115 VGPU10_OPCODE_LD = 45, 116 VGPU10_OPCODE_LD_MS = 46, 117 VGPU10_OPCODE_LOG = 47, 118 VGPU10_OPCODE_LOOP = 48, 119 VGPU10_OPCODE_LT = 49, 120 VGPU10_OPCODE_MAD = 50, 121 VGPU10_OPCODE_MIN = 51, 122 VGPU10_OPCODE_MAX = 52, 123 VGPU10_OPCODE_CUSTOMDATA = 53, 124 VGPU10_OPCODE_MOV = 54, 125 VGPU10_OPCODE_MOVC = 55, 126 VGPU10_OPCODE_MUL = 56, 127 VGPU10_OPCODE_NE = 57, 128 VGPU10_OPCODE_NOP = 58, 129 VGPU10_OPCODE_NOT = 59, 130 VGPU10_OPCODE_OR = 60, 131 VGPU10_OPCODE_RESINFO = 61, 132 VGPU10_OPCODE_RET = 62, 133 VGPU10_OPCODE_RETC = 63, 134 VGPU10_OPCODE_ROUND_NE = 64, 135 VGPU10_OPCODE_ROUND_NI = 65, 136 VGPU10_OPCODE_ROUND_PI = 66, 137 VGPU10_OPCODE_ROUND_Z = 67, 138 VGPU10_OPCODE_RSQ = 68, 139 VGPU10_OPCODE_SAMPLE = 69, 140 VGPU10_OPCODE_SAMPLE_C = 70, 141 VGPU10_OPCODE_SAMPLE_C_LZ = 71, 142 VGPU10_OPCODE_SAMPLE_L = 72, 143 VGPU10_OPCODE_SAMPLE_D = 73, 144 VGPU10_OPCODE_SAMPLE_B = 74, 145 VGPU10_OPCODE_SQRT = 75, 146 VGPU10_OPCODE_SWITCH = 76, 147 VGPU10_OPCODE_SINCOS = 77, 148 VGPU10_OPCODE_UDIV = 78, 149 VGPU10_OPCODE_ULT = 79, 150 VGPU10_OPCODE_UGE = 80, 151 VGPU10_OPCODE_UMUL = 81, 152 VGPU10_OPCODE_UMAD = 82, 153 VGPU10_OPCODE_UMAX = 83, 154 VGPU10_OPCODE_UMIN = 84, 155 VGPU10_OPCODE_USHR = 85, 156 VGPU10_OPCODE_UTOF = 86, 157 VGPU10_OPCODE_XOR = 87, 158 VGPU10_OPCODE_DCL_RESOURCE = 88, 159 VGPU10_OPCODE_DCL_CONSTANT_BUFFER = 89, 160 VGPU10_OPCODE_DCL_SAMPLER = 90, 161 VGPU10_OPCODE_DCL_INDEX_RANGE = 91, 162 VGPU10_OPCODE_DCL_GS_OUTPUT_PRIMITIVE_TOPOLOGY = 92, 163 VGPU10_OPCODE_DCL_GS_INPUT_PRIMITIVE = 93, 164 VGPU10_OPCODE_DCL_MAX_OUTPUT_VERTEX_COUNT = 94, 165 VGPU10_OPCODE_DCL_INPUT = 95, 166 VGPU10_OPCODE_DCL_INPUT_SGV = 96, 167 VGPU10_OPCODE_DCL_INPUT_SIV = 97, 168 VGPU10_OPCODE_DCL_INPUT_PS = 98, 169 VGPU10_OPCODE_DCL_INPUT_PS_SGV = 99, 170 VGPU10_OPCODE_DCL_INPUT_PS_SIV = 100, 171 VGPU10_OPCODE_DCL_OUTPUT = 101, 172 VGPU10_OPCODE_DCL_OUTPUT_SGV = 102, 173 VGPU10_OPCODE_DCL_OUTPUT_SIV = 103, 174 VGPU10_OPCODE_DCL_TEMPS = 104, 175 VGPU10_OPCODE_DCL_INDEXABLE_TEMP = 105, 176 VGPU10_OPCODE_DCL_GLOBAL_FLAGS = 106, 177 VGPU10_OPCODE_IDIV = 107, 178 VGPU10_OPCODE_LOD = 108, 179 VGPU10_OPCODE_GATHER4 = 109, 180 VGPU10_OPCODE_SAMPLE_POS = 110, 181 VGPU10_OPCODE_SAMPLE_INFO = 111, 182 VGPU10_NUM_OPCODES /* Should be the last entry. */ 183} VGPU10_OPCODE_TYPE; 184 185typedef enum { 186 VGPU10_INTERPOLATION_UNDEFINED = 0, 187 VGPU10_INTERPOLATION_CONSTANT = 1, 188 VGPU10_INTERPOLATION_LINEAR = 2, 189 VGPU10_INTERPOLATION_LINEAR_CENTROID = 3, 190 VGPU10_INTERPOLATION_LINEAR_NOPERSPECTIVE = 4, 191 VGPU10_INTERPOLATION_LINEAR_NOPERSPECTIVE_CENTROID = 5, 192 VGPU10_INTERPOLATION_LINEAR_SAMPLE = 6, /* DX10.1 */ 193 VGPU10_INTERPOLATION_LINEAR_NOPERSPECTIVE_SAMPLE = 7 /* DX10.1 */ 194} VGPU10_INTERPOLATION_MODE; 195 196typedef enum { 197 VGPU10_RESOURCE_DIMENSION_UNKNOWN = 0, 198 VGPU10_RESOURCE_DIMENSION_BUFFER = 1, 199 VGPU10_RESOURCE_DIMENSION_TEXTURE1D = 2, 200 VGPU10_RESOURCE_DIMENSION_TEXTURE2D = 3, 201 VGPU10_RESOURCE_DIMENSION_TEXTURE2DMS = 4, 202 VGPU10_RESOURCE_DIMENSION_TEXTURE3D = 5, 203 VGPU10_RESOURCE_DIMENSION_TEXTURECUBE = 6, 204 VGPU10_RESOURCE_DIMENSION_TEXTURE1DARRAY = 7, 205 VGPU10_RESOURCE_DIMENSION_TEXTURE2DARRAY = 8, 206 VGPU10_RESOURCE_DIMENSION_TEXTURE2DMSARRAY = 9, 207 VGPU10_RESOURCE_DIMENSION_TEXTURECUBEARRAY = 10 208} VGPU10_RESOURCE_DIMENSION; 209 210typedef enum { 211 VGPU10_SAMPLER_MODE_DEFAULT = 0, 212 VGPU10_SAMPLER_MODE_COMPARISON = 1, 213 VGPU10_SAMPLER_MODE_MONO = 2 214} VGPU10_SAMPLER_MODE; 215 216typedef enum { 217 VGPU10_INSTRUCTION_TEST_ZERO = 0, 218 VGPU10_INSTRUCTION_TEST_NONZERO = 1 219} VGPU10_INSTRUCTION_TEST_BOOLEAN; 220 221typedef enum { 222 VGPU10_CB_IMMEDIATE_INDEXED = 0, 223 VGPU10_CB_DYNAMIC_INDEXED = 1 224} VGPU10_CB_ACCESS_PATTERN; 225 226typedef enum { 227 VGPU10_PRIMITIVE_UNDEFINED = 0, 228 VGPU10_PRIMITIVE_POINT = 1, 229 VGPU10_PRIMITIVE_LINE = 2, 230 VGPU10_PRIMITIVE_TRIANGLE = 3, 231 VGPU10_PRIMITIVE_LINE_ADJ = 6, 232 VGPU10_PRIMITIVE_TRIANGLE_ADJ = 7 233} VGPU10_PRIMITIVE; 234 235typedef enum { 236 VGPU10_PRIMITIVE_TOPOLOGY_UNDEFINED = 0, 237 VGPU10_PRIMITIVE_TOPOLOGY_POINTLIST = 1, 238 VGPU10_PRIMITIVE_TOPOLOGY_LINELIST = 2, 239 VGPU10_PRIMITIVE_TOPOLOGY_LINESTRIP = 3, 240 VGPU10_PRIMITIVE_TOPOLOGY_TRIANGLELIST = 4, 241 VGPU10_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP = 5, 242 VGPU10_PRIMITIVE_TOPOLOGY_LINELIST_ADJ = 10, 243 VGPU10_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ = 11, 244 VGPU10_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ = 12, 245 VGPU10_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ = 13 246} VGPU10_PRIMITIVE_TOPOLOGY; 247 248typedef enum { 249 VGPU10_CUSTOMDATA_COMMENT = 0, 250 VGPU10_CUSTOMDATA_DEBUGINFO = 1, 251 VGPU10_CUSTOMDATA_OPAQUE = 2, 252 VGPU10_CUSTOMDATA_DCL_IMMEDIATE_CONSTANT_BUFFER = 3 253} VGPU10_CUSTOMDATA_CLASS; 254 255typedef enum { 256 VGPU10_RESINFO_RETURN_FLOAT = 0, 257 VGPU10_RESINFO_RETURN_RCPFLOAT = 1, 258 VGPU10_RESINFO_RETURN_UINT = 2 259} VGPU10_RESINFO_RETURN_TYPE; 260 261 262typedef enum { 263 VGPU10_INSTRUCTION_RETURN_FLOAT = 0, 264 VGPU10_INSTRUCTION_RETURN_UINT = 1 265} VGPU10_INSTRUCTION_RETURN_TYPE; 266 267typedef union { 268 struct { 269 unsigned int opcodeType : 11; /* VGPU10_OPCODE_TYPE */ 270 unsigned int interpolationMode : 4; /* VGPU10_INTERPOLATION_MODE */ 271 unsigned int : 3; 272 unsigned int testBoolean : 1; /* VGPU10_INSTRUCTION_TEST_BOOLEAN */ 273 unsigned int : 5; 274 unsigned int instructionLength : 7; 275 unsigned int extended : 1; 276 }; 277 struct { 278 unsigned int : 11; 279 unsigned int resourceDimension : 5; /* VGPU10_RESOURCE_DIMENSION */ 280 unsigned int sampleCount : 7; 281 }; 282 struct { 283 unsigned int : 11; 284 unsigned int samplerMode : 4; /* VGPU10_SAMPLER_MODE */ 285 }; 286 struct { 287 unsigned int : 11; 288 unsigned int accessPattern : 1; /* VGPU10_CB_ACCESS_PATTERN */ 289 }; 290 struct { 291 unsigned int : 11; 292 unsigned int primitive : 6; /* VGPU10_PRIMITIVE */ 293 }; 294 struct { 295 unsigned int : 11; 296 unsigned int primitiveTopology : 6; /* VGPU10_PRIMITIVE_TOPOLOGY */ 297 }; 298 struct { 299 unsigned int : 11; 300 unsigned int customDataClass : 21; /* VGPU10_CUSTOMDATA_CLASS */ 301 }; 302 struct { 303 unsigned int : 11; 304 unsigned int resinfoReturnType : 2; /* VGPU10_RESINFO_RETURN_TYPE */ 305 unsigned int saturate : 1; 306 }; 307 struct { 308 unsigned int : 11; 309 unsigned int refactoringAllowed : 1; 310 }; 311 struct { 312 unsigned int : 11; 313 unsigned int instReturnType : 2; /* VGPU10_INSTRUCTION_RETURN_TYPE */ 314 }; 315 uint32 value; 316} VGPU10OpcodeToken0; 317 318 319typedef enum { 320 VGPU10_EXTENDED_OPCODE_EMPTY = 0, 321 VGPU10_EXTENDED_OPCODE_SAMPLE_CONTROLS 322} VGPU10_EXTENDED_OPCODE_TYPE; 323 324typedef union { 325 struct { 326 unsigned int opcodeType : 6; /* VGPU10_EXTENDED_OPCODE_TYPE */ 327 unsigned int : 3; 328 unsigned int offsetU : 4; /* Two's complement. */ 329 unsigned int offsetV : 4; /* Two's complement. */ 330 unsigned int offsetW : 4; /* Two's complement. */ 331 unsigned int : 10; 332 unsigned int extended : 1; 333 }; 334 uint32 value; 335} VGPU10OpcodeToken1; 336 337 338typedef enum { 339 VGPU10_OPERAND_0_COMPONENT = 0, 340 VGPU10_OPERAND_1_COMPONENT = 1, 341 VGPU10_OPERAND_4_COMPONENT = 2, 342 VGPU10_OPERAND_N_COMPONENT = 3 /* Unused for now. */ 343} VGPU10_OPERAND_NUM_COMPONENTS; 344 345typedef enum { 346 VGPU10_OPERAND_4_COMPONENT_MASK_MODE = 0, 347 VGPU10_OPERAND_4_COMPONENT_SWIZZLE_MODE = 1, 348 VGPU10_OPERAND_4_COMPONENT_SELECT_1_MODE = 2 349} VGPU10_OPERAND_4_COMPONENT_SELECTION_MODE; 350 351#define VGPU10_OPERAND_4_COMPONENT_MASK_X 0x1 352#define VGPU10_OPERAND_4_COMPONENT_MASK_Y 0x2 353#define VGPU10_OPERAND_4_COMPONENT_MASK_Z 0x4 354#define VGPU10_OPERAND_4_COMPONENT_MASK_W 0x8 355 356#define VGPU10_OPERAND_4_COMPONENT_MASK_XY (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_4_COMPONENT_MASK_Y) 357#define VGPU10_OPERAND_4_COMPONENT_MASK_XZ (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_4_COMPONENT_MASK_Z) 358#define VGPU10_OPERAND_4_COMPONENT_MASK_XW (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_4_COMPONENT_MASK_W) 359#define VGPU10_OPERAND_4_COMPONENT_MASK_YZ (VGPU10_OPERAND_4_COMPONENT_MASK_Y | VGPU10_OPERAND_4_COMPONENT_MASK_Z) 360#define VGPU10_OPERAND_4_COMPONENT_MASK_YW (VGPU10_OPERAND_4_COMPONENT_MASK_Y | VGPU10_OPERAND_4_COMPONENT_MASK_W) 361#define VGPU10_OPERAND_4_COMPONENT_MASK_ZW (VGPU10_OPERAND_4_COMPONENT_MASK_Z | VGPU10_OPERAND_4_COMPONENT_MASK_W) 362#define VGPU10_OPERAND_4_COMPONENT_MASK_XYZ (VGPU10_OPERAND_4_COMPONENT_MASK_XY | VGPU10_OPERAND_4_COMPONENT_MASK_Z) 363#define VGPU10_OPERAND_4_COMPONENT_MASK_XYW (VGPU10_OPERAND_4_COMPONENT_MASK_XY | VGPU10_OPERAND_4_COMPONENT_MASK_W) 364#define VGPU10_OPERAND_4_COMPONENT_MASK_XZW (VGPU10_OPERAND_4_COMPONENT_MASK_XZ | VGPU10_OPERAND_4_COMPONENT_MASK_W) 365#define VGPU10_OPERAND_4_COMPONENT_MASK_YZW (VGPU10_OPERAND_4_COMPONENT_MASK_YZ | VGPU10_OPERAND_4_COMPONENT_MASK_W) 366#define VGPU10_OPERAND_4_COMPONENT_MASK_XYZW (VGPU10_OPERAND_4_COMPONENT_MASK_XYZ | VGPU10_OPERAND_4_COMPONENT_MASK_W) 367#define VGPU10_OPERAND_4_COMPONENT_MASK_ALL VGPU10_OPERAND_4_COMPONENT_MASK_XYZW 368 369#define VGPU10_REGISTER_INDEX_FROM_SEMANTIC 0xffffffff 370 371typedef enum { 372 VGPU10_COMPONENT_X = 0, 373 VGPU10_COMPONENT_Y = 1, 374 VGPU10_COMPONENT_Z = 2, 375 VGPU10_COMPONENT_W = 3 376} VGPU10_COMPONENT_NAME; 377 378typedef enum { 379 VGPU10_OPERAND_TYPE_TEMP = 0, 380 VGPU10_OPERAND_TYPE_INPUT = 1, 381 VGPU10_OPERAND_TYPE_OUTPUT = 2, 382 VGPU10_OPERAND_TYPE_INDEXABLE_TEMP = 3, 383 VGPU10_OPERAND_TYPE_IMMEDIATE32 = 4, 384 VGPU10_OPERAND_TYPE_IMMEDIATE64 = 5, 385 VGPU10_OPERAND_TYPE_SAMPLER = 6, 386 VGPU10_OPERAND_TYPE_RESOURCE = 7, 387 VGPU10_OPERAND_TYPE_CONSTANT_BUFFER = 8, 388 VGPU10_OPERAND_TYPE_IMMEDIATE_CONSTANT_BUFFER = 9, 389 VGPU10_OPERAND_TYPE_LABEL = 10, 390 VGPU10_OPERAND_TYPE_INPUT_PRIMITIVEID = 11, 391 VGPU10_OPERAND_TYPE_OUTPUT_DEPTH = 12, 392 VGPU10_OPERAND_TYPE_NULL = 13, 393 VGPU10_OPERAND_TYPE_RASTERIZER = 14, /* DX10.1 */ 394 VGPU10_OPERAND_TYPE_OUTPUT_COVERAGE_MASK = 15 /* DX10.1 */ 395} VGPU10_OPERAND_TYPE; 396 397typedef enum { 398 VGPU10_OPERAND_INDEX_0D = 0, 399 VGPU10_OPERAND_INDEX_1D = 1, 400 VGPU10_OPERAND_INDEX_2D = 2, 401 VGPU10_OPERAND_INDEX_3D = 3 402} VGPU10_OPERAND_INDEX_DIMENSION; 403 404typedef enum { 405 VGPU10_OPERAND_INDEX_IMMEDIATE32 = 0, 406 VGPU10_OPERAND_INDEX_IMMEDIATE64 = 1, 407 VGPU10_OPERAND_INDEX_RELATIVE = 2, 408 VGPU10_OPERAND_INDEX_IMMEDIATE32_PLUS_RELATIVE = 3, 409 VGPU10_OPERAND_INDEX_IMMEDIATE64_PLUS_RELATIVE = 4 410} VGPU10_OPERAND_INDEX_REPRESENTATION; 411 412typedef union { 413 struct { 414 unsigned int numComponents : 2; /* VGPU10_OPERAND_NUM_COMPONENTS */ 415 unsigned int selectionMode : 2; /* VGPU10_OPERAND_4_COMPONENT_SELECTION_MODE */ 416 unsigned int mask : 4; /* D3D10_SB_OPERAND_4_COMPONENT_MASK_* */ 417 unsigned int : 4; 418 unsigned int operandType : 8; /* VGPU10_OPERAND_TYPE */ 419 unsigned int indexDimension : 2; /* VGPU10_OPERAND_INDEX_DIMENSION */ 420 unsigned int index0Representation : 3; /* VGPU10_OPERAND_INDEX_REPRESENTATION */ 421 unsigned int index1Representation : 3; /* VGPU10_OPERAND_INDEX_REPRESENTATION */ 422 unsigned int : 3; 423 unsigned int extended : 1; 424 }; 425 struct { 426 unsigned int : 4; 427 unsigned int swizzleX : 2; /* VGPU10_COMPONENT_NAME */ 428 unsigned int swizzleY : 2; /* VGPU10_COMPONENT_NAME */ 429 unsigned int swizzleZ : 2; /* VGPU10_COMPONENT_NAME */ 430 unsigned int swizzleW : 2; /* VGPU10_COMPONENT_NAME */ 431 }; 432 struct { 433 unsigned int : 4; 434 unsigned int selectMask : 2; /* VGPU10_COMPONENT_NAME */ 435 }; 436 uint32 value; 437} VGPU10OperandToken0; 438 439 440typedef enum { 441 VGPU10_EXTENDED_OPERAND_EMPTY = 0, 442 VGPU10_EXTENDED_OPERAND_MODIFIER = 1 443} VGPU10_EXTENDED_OPERAND_TYPE; 444 445typedef enum { 446 VGPU10_OPERAND_MODIFIER_NONE = 0, 447 VGPU10_OPERAND_MODIFIER_NEG = 1, 448 VGPU10_OPERAND_MODIFIER_ABS = 2, 449 VGPU10_OPERAND_MODIFIER_ABSNEG = 3 450} VGPU10_OPERAND_MODIFIER; 451 452typedef union { 453 struct { 454 unsigned int extendedOperandType : 6; /* VGPU10_EXTENDED_OPERAND_TYPE */ 455 unsigned int operandModifier : 8; /* VGPU10_OPERAND_MODIFIER */ 456 unsigned int : 17; 457 unsigned int extended : 1; 458 }; 459 uint32 value; 460} VGPU10OperandToken1; 461 462 463typedef enum { 464 VGPU10_RETURN_TYPE_MIN = 1, 465 VGPU10_RETURN_TYPE_UNORM = 1, 466 VGPU10_RETURN_TYPE_SNORM = 2, 467 VGPU10_RETURN_TYPE_SINT = 3, 468 VGPU10_RETURN_TYPE_UINT = 4, 469 VGPU10_RETURN_TYPE_FLOAT = 5, 470 VGPU10_RETURN_TYPE_MIXED = 6, 471 VGPU10_RETURN_TYPE_MAX = 6 472} VGPU10_RESOURCE_RETURN_TYPE; 473 474typedef union { 475 struct { 476 unsigned int component0 : 4; /* VGPU10_RESOURCE_RETURN_TYPE */ 477 unsigned int component1 : 4; /* VGPU10_RESOURCE_RETURN_TYPE */ 478 unsigned int component2 : 4; /* VGPU10_RESOURCE_RETURN_TYPE */ 479 unsigned int component3 : 4; /* VGPU10_RESOURCE_RETURN_TYPE */ 480 }; 481 uint32 value; 482} VGPU10ResourceReturnTypeToken; 483 484 485typedef enum { 486 VGPU10_NAME_MIN = 0, 487 VGPU10_NAME_UNDEFINED = 0, 488 VGPU10_NAME_POSITION = 1, 489 VGPU10_NAME_CLIP_DISTANCE = 2, 490 VGPU10_NAME_CULL_DISTANCE = 3, 491 VGPU10_NAME_RENDER_TARGET_ARRAY_INDEX = 4, 492 VGPU10_NAME_VIEWPORT_ARRAY_INDEX = 5, 493 VGPU10_NAME_VERTEX_ID = 6, 494 VGPU10_NAME_PRIMITIVE_ID = 7, 495 VGPU10_NAME_INSTANCE_ID = 8, 496 VGPU10_NAME_IS_FRONT_FACE = 9, 497 VGPU10_NAME_SAMPLE_INDEX = 10, 498 VGPU10_NAME_MAX = 10 499} VGPU10_SYSTEM_NAME; 500 501typedef union { 502 struct { 503 unsigned int name : 16; /* VGPU10_SYSTEM_NAME */ 504 }; 505 uint32 value; 506} VGPU10NameToken; 507 508#endif 509