1/* 2 * Copyright © 2017 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#include "compiler/nir/nir_builder.h" 25 26static inline void 27blorp_nir_init_shader(nir_builder *b, 28 void *mem_ctx, 29 gl_shader_stage stage, 30 const char *name) 31{ 32 nir_builder_init_simple_shader(b, mem_ctx, stage, NULL); 33 if (name != NULL) 34 b->shader->info.name = ralloc_strdup(b->shader, name); 35 if (stage == MESA_SHADER_FRAGMENT) 36 b->shader->info.fs.origin_upper_left = true; 37} 38 39static inline nir_ssa_def * 40blorp_nir_frag_coord(nir_builder *b) 41{ 42 nir_variable *frag_coord = 43 nir_variable_create(b->shader, nir_var_shader_in, 44 glsl_vec4_type(), "gl_FragCoord"); 45 46 frag_coord->data.location = VARYING_SLOT_POS; 47 48 return nir_load_var(b, frag_coord); 49} 50 51static inline nir_ssa_def * 52blorp_nir_txf_ms_mcs(nir_builder *b, nir_ssa_def *xy_pos, nir_ssa_def *layer) 53{ 54 nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1); 55 tex->op = nir_texop_txf_ms_mcs; 56 tex->sampler_dim = GLSL_SAMPLER_DIM_MS; 57 tex->dest_type = nir_type_int; 58 59 nir_ssa_def *coord; 60 if (layer) { 61 tex->is_array = true; 62 tex->coord_components = 3; 63 coord = nir_vec3(b, nir_channel(b, xy_pos, 0), 64 nir_channel(b, xy_pos, 1), 65 layer); 66 } else { 67 tex->is_array = false; 68 tex->coord_components = 2; 69 coord = nir_channels(b, xy_pos, 0x3); 70 } 71 tex->src[0].src_type = nir_tex_src_coord; 72 tex->src[0].src = nir_src_for_ssa(coord); 73 74 /* Blorp only has one texture and it's bound at unit 0 */ 75 tex->texture_index = 0; 76 tex->sampler_index = 0; 77 78 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL); 79 nir_builder_instr_insert(b, &tex->instr); 80 81 return &tex->dest.ssa; 82} 83 84static inline nir_ssa_def * 85blorp_nir_mcs_is_clear_color(nir_builder *b, 86 nir_ssa_def *mcs, 87 uint32_t samples) 88{ 89 switch (samples) { 90 case 2: 91 /* Empirical evidence suggests that the value returned from the 92 * sampler is not always 0x3 for clear color so we need to mask it. 93 */ 94 return nir_ieq(b, nir_iand(b, nir_channel(b, mcs, 0), 95 nir_imm_int(b, 0x3)), 96 nir_imm_int(b, 0x3)); 97 98 case 4: 99 return nir_ieq(b, nir_channel(b, mcs, 0), nir_imm_int(b, 0xff)); 100 101 case 8: 102 return nir_ieq(b, nir_channel(b, mcs, 0), nir_imm_int(b, ~0)); 103 104 case 16: 105 /* For 16x MSAA, the MCS is actually an ivec2 */ 106 return nir_iand(b, nir_ieq(b, nir_channel(b, mcs, 0), 107 nir_imm_int(b, ~0)), 108 nir_ieq(b, nir_channel(b, mcs, 1), 109 nir_imm_int(b, ~0))); 110 111 default: 112 unreachable("Invalid sample count"); 113 } 114} 115