1b8e80941Smrg/* 2b8e80941Smrg * Copyright © 2017 Intel Corporation 3b8e80941Smrg * 4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a 5b8e80941Smrg * copy of this software and associated documentation files (the "Software"), 6b8e80941Smrg * to deal in the Software without restriction, including without limitation 7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the 9b8e80941Smrg * Software is furnished to do so, subject to the following conditions: 10b8e80941Smrg * 11b8e80941Smrg * The above copyright notice and this permission notice (including the next 12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the 13b8e80941Smrg * Software. 14b8e80941Smrg * 15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21b8e80941Smrg * IN THE SOFTWARE. 22b8e80941Smrg */ 23b8e80941Smrg 24b8e80941Smrg#include "common/gen_decoder.h" 25b8e80941Smrg#include "gen_disasm.h" 26b8e80941Smrg#include "util/macros.h" 27b8e80941Smrg#include "main/macros.h" /* Needed for ROUND_DOWN_TO */ 28b8e80941Smrg 29b8e80941Smrg#include <string.h> 30b8e80941Smrg 31b8e80941Smrgvoid 32b8e80941Smrggen_batch_decode_ctx_init(struct gen_batch_decode_ctx *ctx, 33b8e80941Smrg const struct gen_device_info *devinfo, 34b8e80941Smrg FILE *fp, enum gen_batch_decode_flags flags, 35b8e80941Smrg const char *xml_path, 36b8e80941Smrg struct gen_batch_decode_bo (*get_bo)(void *, 37b8e80941Smrg bool, 38b8e80941Smrg uint64_t), 39b8e80941Smrg unsigned (*get_state_size)(void *, uint32_t), 40b8e80941Smrg void *user_data) 41b8e80941Smrg{ 42b8e80941Smrg memset(ctx, 0, sizeof(*ctx)); 43b8e80941Smrg 44b8e80941Smrg ctx->get_bo = get_bo; 45b8e80941Smrg ctx->get_state_size = get_state_size; 46b8e80941Smrg ctx->user_data = user_data; 47b8e80941Smrg ctx->fp = fp; 48b8e80941Smrg ctx->flags = flags; 49b8e80941Smrg ctx->max_vbo_decoded_lines = -1; /* No limit! */ 50b8e80941Smrg ctx->engine = I915_ENGINE_CLASS_RENDER; 51b8e80941Smrg 52b8e80941Smrg if (xml_path == NULL) 53b8e80941Smrg ctx->spec = gen_spec_load(devinfo); 54b8e80941Smrg else 55b8e80941Smrg ctx->spec = gen_spec_load_from_path(devinfo, xml_path); 56b8e80941Smrg ctx->disasm = gen_disasm_create(devinfo); 57b8e80941Smrg} 58b8e80941Smrg 59b8e80941Smrgvoid 60b8e80941Smrggen_batch_decode_ctx_finish(struct gen_batch_decode_ctx *ctx) 61b8e80941Smrg{ 62b8e80941Smrg gen_spec_destroy(ctx->spec); 63b8e80941Smrg gen_disasm_destroy(ctx->disasm); 64b8e80941Smrg} 65b8e80941Smrg 66b8e80941Smrg#define CSI "\e[" 67b8e80941Smrg#define RED_COLOR CSI "31m" 68b8e80941Smrg#define BLUE_HEADER CSI "0;44m" 69b8e80941Smrg#define GREEN_HEADER CSI "1;42m" 70b8e80941Smrg#define NORMAL CSI "0m" 71b8e80941Smrg 72b8e80941Smrgstatic void 73b8e80941Smrgctx_print_group(struct gen_batch_decode_ctx *ctx, 74b8e80941Smrg struct gen_group *group, 75b8e80941Smrg uint64_t address, const void *map) 76b8e80941Smrg{ 77b8e80941Smrg gen_print_group(ctx->fp, group, address, map, 0, 78b8e80941Smrg (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) != 0); 79b8e80941Smrg} 80b8e80941Smrg 81b8e80941Smrgstatic struct gen_batch_decode_bo 82b8e80941Smrgctx_get_bo(struct gen_batch_decode_ctx *ctx, bool ppgtt, uint64_t addr) 83b8e80941Smrg{ 84b8e80941Smrg if (gen_spec_get_gen(ctx->spec) >= gen_make_gen(8,0)) { 85b8e80941Smrg /* On Broadwell and above, we have 48-bit addresses which consume two 86b8e80941Smrg * dwords. Some packets require that these get stored in a "canonical 87b8e80941Smrg * form" which means that bit 47 is sign-extended through the upper 88b8e80941Smrg * bits. In order to correctly handle those aub dumps, we need to mask 89b8e80941Smrg * off the top 16 bits. 90b8e80941Smrg */ 91b8e80941Smrg addr &= (~0ull >> 16); 92b8e80941Smrg } 93b8e80941Smrg 94b8e80941Smrg struct gen_batch_decode_bo bo = ctx->get_bo(ctx->user_data, ppgtt, addr); 95b8e80941Smrg 96b8e80941Smrg if (gen_spec_get_gen(ctx->spec) >= gen_make_gen(8,0)) 97b8e80941Smrg bo.addr &= (~0ull >> 16); 98b8e80941Smrg 99b8e80941Smrg /* We may actually have an offset into the bo */ 100b8e80941Smrg if (bo.map != NULL) { 101b8e80941Smrg assert(bo.addr <= addr); 102b8e80941Smrg uint64_t offset = addr - bo.addr; 103b8e80941Smrg bo.map += offset; 104b8e80941Smrg bo.addr += offset; 105b8e80941Smrg bo.size -= offset; 106b8e80941Smrg } 107b8e80941Smrg 108b8e80941Smrg return bo; 109b8e80941Smrg} 110b8e80941Smrg 111b8e80941Smrgstatic int 112b8e80941Smrgupdate_count(struct gen_batch_decode_ctx *ctx, 113b8e80941Smrg uint32_t offset_from_dsba, 114b8e80941Smrg unsigned element_dwords, 115b8e80941Smrg unsigned guess) 116b8e80941Smrg{ 117b8e80941Smrg unsigned size = 0; 118b8e80941Smrg 119b8e80941Smrg if (ctx->get_state_size) 120b8e80941Smrg size = ctx->get_state_size(ctx->user_data, offset_from_dsba); 121b8e80941Smrg 122b8e80941Smrg if (size > 0) 123b8e80941Smrg return size / (sizeof(uint32_t) * element_dwords); 124b8e80941Smrg 125b8e80941Smrg /* In the absence of any information, just guess arbitrarily. */ 126b8e80941Smrg return guess; 127b8e80941Smrg} 128b8e80941Smrg 129b8e80941Smrgstatic void 130b8e80941Smrgctx_disassemble_program(struct gen_batch_decode_ctx *ctx, 131b8e80941Smrg uint32_t ksp, const char *type) 132b8e80941Smrg{ 133b8e80941Smrg uint64_t addr = ctx->instruction_base + ksp; 134b8e80941Smrg struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, addr); 135b8e80941Smrg if (!bo.map) 136b8e80941Smrg return; 137b8e80941Smrg 138b8e80941Smrg fprintf(ctx->fp, "\nReferenced %s:\n", type); 139b8e80941Smrg gen_disasm_disassemble(ctx->disasm, bo.map, 0, ctx->fp); 140b8e80941Smrg} 141b8e80941Smrg 142b8e80941Smrg/* Heuristic to determine whether a uint32_t is probably actually a float 143b8e80941Smrg * (http://stackoverflow.com/a/2953466) 144b8e80941Smrg */ 145b8e80941Smrg 146b8e80941Smrgstatic bool 147b8e80941Smrgprobably_float(uint32_t bits) 148b8e80941Smrg{ 149b8e80941Smrg int exp = ((bits & 0x7f800000U) >> 23) - 127; 150b8e80941Smrg uint32_t mant = bits & 0x007fffff; 151b8e80941Smrg 152b8e80941Smrg /* +- 0.0 */ 153b8e80941Smrg if (exp == -127 && mant == 0) 154b8e80941Smrg return true; 155b8e80941Smrg 156b8e80941Smrg /* +- 1 billionth to 1 billion */ 157b8e80941Smrg if (-30 <= exp && exp <= 30) 158b8e80941Smrg return true; 159b8e80941Smrg 160b8e80941Smrg /* some value with only a few binary digits */ 161b8e80941Smrg if ((mant & 0x0000ffff) == 0) 162b8e80941Smrg return true; 163b8e80941Smrg 164b8e80941Smrg return false; 165b8e80941Smrg} 166b8e80941Smrg 167b8e80941Smrgstatic void 168b8e80941Smrgctx_print_buffer(struct gen_batch_decode_ctx *ctx, 169b8e80941Smrg struct gen_batch_decode_bo bo, 170b8e80941Smrg uint32_t read_length, 171b8e80941Smrg uint32_t pitch, 172b8e80941Smrg int max_lines) 173b8e80941Smrg{ 174b8e80941Smrg const uint32_t *dw_end = 175b8e80941Smrg bo.map + ROUND_DOWN_TO(MIN2(bo.size, read_length), 4); 176b8e80941Smrg 177b8e80941Smrg int column_count = 0, line_count = -1; 178b8e80941Smrg for (const uint32_t *dw = bo.map; dw < dw_end; dw++) { 179b8e80941Smrg if (column_count * 4 == pitch || column_count == 8) { 180b8e80941Smrg fprintf(ctx->fp, "\n"); 181b8e80941Smrg column_count = 0; 182b8e80941Smrg line_count++; 183b8e80941Smrg 184b8e80941Smrg if (max_lines >= 0 && line_count >= max_lines) 185b8e80941Smrg break; 186b8e80941Smrg } 187b8e80941Smrg fprintf(ctx->fp, column_count == 0 ? " " : " "); 188b8e80941Smrg 189b8e80941Smrg if ((ctx->flags & GEN_BATCH_DECODE_FLOATS) && probably_float(*dw)) 190b8e80941Smrg fprintf(ctx->fp, " %8.2f", *(float *) dw); 191b8e80941Smrg else 192b8e80941Smrg fprintf(ctx->fp, " 0x%08x", *dw); 193b8e80941Smrg 194b8e80941Smrg column_count++; 195b8e80941Smrg } 196b8e80941Smrg fprintf(ctx->fp, "\n"); 197b8e80941Smrg} 198b8e80941Smrg 199b8e80941Smrgstatic struct gen_group * 200b8e80941Smrggen_ctx_find_instruction(struct gen_batch_decode_ctx *ctx, const uint32_t *p) 201b8e80941Smrg{ 202b8e80941Smrg return gen_spec_find_instruction(ctx->spec, ctx->engine, p); 203b8e80941Smrg} 204b8e80941Smrg 205b8e80941Smrgstatic void 206b8e80941Smrghandle_state_base_address(struct gen_batch_decode_ctx *ctx, const uint32_t *p) 207b8e80941Smrg{ 208b8e80941Smrg struct gen_group *inst = gen_ctx_find_instruction(ctx, p); 209b8e80941Smrg 210b8e80941Smrg struct gen_field_iterator iter; 211b8e80941Smrg gen_field_iterator_init(&iter, inst, p, 0, false); 212b8e80941Smrg 213b8e80941Smrg uint64_t surface_base = 0, dynamic_base = 0, instruction_base = 0; 214b8e80941Smrg bool surface_modify = 0, dynamic_modify = 0, instruction_modify = 0; 215b8e80941Smrg 216b8e80941Smrg while (gen_field_iterator_next(&iter)) { 217b8e80941Smrg if (strcmp(iter.name, "Surface State Base Address") == 0) { 218b8e80941Smrg surface_base = iter.raw_value; 219b8e80941Smrg } else if (strcmp(iter.name, "Dynamic State Base Address") == 0) { 220b8e80941Smrg dynamic_base = iter.raw_value; 221b8e80941Smrg } else if (strcmp(iter.name, "Instruction Base Address") == 0) { 222b8e80941Smrg instruction_base = iter.raw_value; 223b8e80941Smrg } else if (strcmp(iter.name, "Surface State Base Address Modify Enable") == 0) { 224b8e80941Smrg surface_modify = iter.raw_value; 225b8e80941Smrg } else if (strcmp(iter.name, "Dynamic State Base Address Modify Enable") == 0) { 226b8e80941Smrg dynamic_modify = iter.raw_value; 227b8e80941Smrg } else if (strcmp(iter.name, "Instruction Base Address Modify Enable") == 0) { 228b8e80941Smrg instruction_modify = iter.raw_value; 229b8e80941Smrg } 230b8e80941Smrg } 231b8e80941Smrg 232b8e80941Smrg if (dynamic_modify) 233b8e80941Smrg ctx->dynamic_base = dynamic_base; 234b8e80941Smrg 235b8e80941Smrg if (surface_modify) 236b8e80941Smrg ctx->surface_base = surface_base; 237b8e80941Smrg 238b8e80941Smrg if (instruction_modify) 239b8e80941Smrg ctx->instruction_base = instruction_base; 240b8e80941Smrg} 241b8e80941Smrg 242b8e80941Smrgstatic void 243b8e80941Smrgdump_binding_table(struct gen_batch_decode_ctx *ctx, uint32_t offset, int count) 244b8e80941Smrg{ 245b8e80941Smrg struct gen_group *strct = 246b8e80941Smrg gen_spec_find_struct(ctx->spec, "RENDER_SURFACE_STATE"); 247b8e80941Smrg if (strct == NULL) { 248b8e80941Smrg fprintf(ctx->fp, "did not find RENDER_SURFACE_STATE info\n"); 249b8e80941Smrg return; 250b8e80941Smrg } 251b8e80941Smrg 252b8e80941Smrg if (count < 0) 253b8e80941Smrg count = update_count(ctx, offset, 1, 8); 254b8e80941Smrg 255b8e80941Smrg if (offset % 32 != 0 || offset >= UINT16_MAX) { 256b8e80941Smrg fprintf(ctx->fp, " invalid binding table pointer\n"); 257b8e80941Smrg return; 258b8e80941Smrg } 259b8e80941Smrg 260b8e80941Smrg struct gen_batch_decode_bo bind_bo = 261b8e80941Smrg ctx_get_bo(ctx, true, ctx->surface_base + offset); 262b8e80941Smrg 263b8e80941Smrg if (bind_bo.map == NULL) { 264b8e80941Smrg fprintf(ctx->fp, " binding table unavailable\n"); 265b8e80941Smrg return; 266b8e80941Smrg } 267b8e80941Smrg 268b8e80941Smrg const uint32_t *pointers = bind_bo.map; 269b8e80941Smrg for (int i = 0; i < count; i++) { 270b8e80941Smrg if (pointers[i] == 0) 271b8e80941Smrg continue; 272b8e80941Smrg 273b8e80941Smrg uint64_t addr = ctx->surface_base + pointers[i]; 274b8e80941Smrg struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, addr); 275b8e80941Smrg uint32_t size = strct->dw_length * 4; 276b8e80941Smrg 277b8e80941Smrg if (pointers[i] % 32 != 0 || 278b8e80941Smrg addr < bo.addr || addr + size >= bo.addr + bo.size) { 279b8e80941Smrg fprintf(ctx->fp, "pointer %u: 0x%08x <not valid>\n", i, pointers[i]); 280b8e80941Smrg continue; 281b8e80941Smrg } 282b8e80941Smrg 283b8e80941Smrg fprintf(ctx->fp, "pointer %u: 0x%08x\n", i, pointers[i]); 284b8e80941Smrg ctx_print_group(ctx, strct, addr, bo.map + (addr - bo.addr)); 285b8e80941Smrg } 286b8e80941Smrg} 287b8e80941Smrg 288b8e80941Smrgstatic void 289b8e80941Smrgdump_samplers(struct gen_batch_decode_ctx *ctx, uint32_t offset, int count) 290b8e80941Smrg{ 291b8e80941Smrg struct gen_group *strct = gen_spec_find_struct(ctx->spec, "SAMPLER_STATE"); 292b8e80941Smrg 293b8e80941Smrg if (count < 0) 294b8e80941Smrg count = update_count(ctx, offset, strct->dw_length, 4); 295b8e80941Smrg 296b8e80941Smrg uint64_t state_addr = ctx->dynamic_base + offset; 297b8e80941Smrg struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, state_addr); 298b8e80941Smrg const void *state_map = bo.map; 299b8e80941Smrg 300b8e80941Smrg if (state_map == NULL) { 301b8e80941Smrg fprintf(ctx->fp, " samplers unavailable\n"); 302b8e80941Smrg return; 303b8e80941Smrg } 304b8e80941Smrg 305b8e80941Smrg if (offset % 32 != 0 || state_addr - bo.addr >= bo.size) { 306b8e80941Smrg fprintf(ctx->fp, " invalid sampler state pointer\n"); 307b8e80941Smrg return; 308b8e80941Smrg } 309b8e80941Smrg 310b8e80941Smrg for (int i = 0; i < count; i++) { 311b8e80941Smrg fprintf(ctx->fp, "sampler state %d\n", i); 312b8e80941Smrg ctx_print_group(ctx, strct, state_addr, state_map); 313b8e80941Smrg state_addr += 16; 314b8e80941Smrg state_map += 16; 315b8e80941Smrg } 316b8e80941Smrg} 317b8e80941Smrg 318b8e80941Smrgstatic void 319b8e80941Smrghandle_media_interface_descriptor_load(struct gen_batch_decode_ctx *ctx, 320b8e80941Smrg const uint32_t *p) 321b8e80941Smrg{ 322b8e80941Smrg struct gen_group *inst = gen_ctx_find_instruction(ctx, p); 323b8e80941Smrg struct gen_group *desc = 324b8e80941Smrg gen_spec_find_struct(ctx->spec, "INTERFACE_DESCRIPTOR_DATA"); 325b8e80941Smrg 326b8e80941Smrg struct gen_field_iterator iter; 327b8e80941Smrg gen_field_iterator_init(&iter, inst, p, 0, false); 328b8e80941Smrg uint32_t descriptor_offset = 0; 329b8e80941Smrg int descriptor_count = 0; 330b8e80941Smrg while (gen_field_iterator_next(&iter)) { 331b8e80941Smrg if (strcmp(iter.name, "Interface Descriptor Data Start Address") == 0) { 332b8e80941Smrg descriptor_offset = strtol(iter.value, NULL, 16); 333b8e80941Smrg } else if (strcmp(iter.name, "Interface Descriptor Total Length") == 0) { 334b8e80941Smrg descriptor_count = 335b8e80941Smrg strtol(iter.value, NULL, 16) / (desc->dw_length * 4); 336b8e80941Smrg } 337b8e80941Smrg } 338b8e80941Smrg 339b8e80941Smrg uint64_t desc_addr = ctx->dynamic_base + descriptor_offset; 340b8e80941Smrg struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, desc_addr); 341b8e80941Smrg const void *desc_map = bo.map; 342b8e80941Smrg 343b8e80941Smrg if (desc_map == NULL) { 344b8e80941Smrg fprintf(ctx->fp, " interface descriptors unavailable\n"); 345b8e80941Smrg return; 346b8e80941Smrg } 347b8e80941Smrg 348b8e80941Smrg for (int i = 0; i < descriptor_count; i++) { 349b8e80941Smrg fprintf(ctx->fp, "descriptor %d: %08x\n", i, descriptor_offset); 350b8e80941Smrg 351b8e80941Smrg ctx_print_group(ctx, desc, desc_addr, desc_map); 352b8e80941Smrg 353b8e80941Smrg gen_field_iterator_init(&iter, desc, desc_map, 0, false); 354b8e80941Smrg uint64_t ksp = 0; 355b8e80941Smrg uint32_t sampler_offset = 0, sampler_count = 0; 356b8e80941Smrg uint32_t binding_table_offset = 0, binding_entry_count = 0; 357b8e80941Smrg while (gen_field_iterator_next(&iter)) { 358b8e80941Smrg if (strcmp(iter.name, "Kernel Start Pointer") == 0) { 359b8e80941Smrg ksp = strtoll(iter.value, NULL, 16); 360b8e80941Smrg } else if (strcmp(iter.name, "Sampler State Pointer") == 0) { 361b8e80941Smrg sampler_offset = strtol(iter.value, NULL, 16); 362b8e80941Smrg } else if (strcmp(iter.name, "Sampler Count") == 0) { 363b8e80941Smrg sampler_count = strtol(iter.value, NULL, 10); 364b8e80941Smrg } else if (strcmp(iter.name, "Binding Table Pointer") == 0) { 365b8e80941Smrg binding_table_offset = strtol(iter.value, NULL, 16); 366b8e80941Smrg } else if (strcmp(iter.name, "Binding Table Entry Count") == 0) { 367b8e80941Smrg binding_entry_count = strtol(iter.value, NULL, 10); 368b8e80941Smrg } 369b8e80941Smrg } 370b8e80941Smrg 371b8e80941Smrg ctx_disassemble_program(ctx, ksp, "compute shader"); 372b8e80941Smrg printf("\n"); 373b8e80941Smrg 374b8e80941Smrg dump_samplers(ctx, sampler_offset, sampler_count); 375b8e80941Smrg dump_binding_table(ctx, binding_table_offset, binding_entry_count); 376b8e80941Smrg 377b8e80941Smrg desc_map += desc->dw_length; 378b8e80941Smrg desc_addr += desc->dw_length * 4; 379b8e80941Smrg } 380b8e80941Smrg} 381b8e80941Smrg 382b8e80941Smrgstatic void 383b8e80941Smrghandle_3dstate_vertex_buffers(struct gen_batch_decode_ctx *ctx, 384b8e80941Smrg const uint32_t *p) 385b8e80941Smrg{ 386b8e80941Smrg struct gen_group *inst = gen_ctx_find_instruction(ctx, p); 387b8e80941Smrg struct gen_group *vbs = gen_spec_find_struct(ctx->spec, "VERTEX_BUFFER_STATE"); 388b8e80941Smrg 389b8e80941Smrg struct gen_batch_decode_bo vb = {}; 390b8e80941Smrg uint32_t vb_size = 0; 391b8e80941Smrg int index = -1; 392b8e80941Smrg int pitch = -1; 393b8e80941Smrg bool ready = false; 394b8e80941Smrg 395b8e80941Smrg struct gen_field_iterator iter; 396b8e80941Smrg gen_field_iterator_init(&iter, inst, p, 0, false); 397b8e80941Smrg while (gen_field_iterator_next(&iter)) { 398b8e80941Smrg if (iter.struct_desc != vbs) 399b8e80941Smrg continue; 400b8e80941Smrg 401b8e80941Smrg struct gen_field_iterator vbs_iter; 402b8e80941Smrg gen_field_iterator_init(&vbs_iter, vbs, &iter.p[iter.start_bit / 32], 0, false); 403b8e80941Smrg while (gen_field_iterator_next(&vbs_iter)) { 404b8e80941Smrg if (strcmp(vbs_iter.name, "Vertex Buffer Index") == 0) { 405b8e80941Smrg index = vbs_iter.raw_value; 406b8e80941Smrg } else if (strcmp(vbs_iter.name, "Buffer Pitch") == 0) { 407b8e80941Smrg pitch = vbs_iter.raw_value; 408b8e80941Smrg } else if (strcmp(vbs_iter.name, "Buffer Starting Address") == 0) { 409b8e80941Smrg vb = ctx_get_bo(ctx, true, vbs_iter.raw_value); 410b8e80941Smrg } else if (strcmp(vbs_iter.name, "Buffer Size") == 0) { 411b8e80941Smrg vb_size = vbs_iter.raw_value; 412b8e80941Smrg ready = true; 413b8e80941Smrg } else if (strcmp(vbs_iter.name, "End Address") == 0) { 414b8e80941Smrg if (vb.map && vbs_iter.raw_value >= vb.addr) 415b8e80941Smrg vb_size = (vbs_iter.raw_value + 1) - vb.addr; 416b8e80941Smrg else 417b8e80941Smrg vb_size = 0; 418b8e80941Smrg ready = true; 419b8e80941Smrg } 420b8e80941Smrg 421b8e80941Smrg if (!ready) 422b8e80941Smrg continue; 423b8e80941Smrg 424b8e80941Smrg fprintf(ctx->fp, "vertex buffer %d, size %d\n", index, vb_size); 425b8e80941Smrg 426b8e80941Smrg if (vb.map == NULL) { 427b8e80941Smrg fprintf(ctx->fp, " buffer contents unavailable\n"); 428b8e80941Smrg continue; 429b8e80941Smrg } 430b8e80941Smrg 431b8e80941Smrg if (vb.map == 0 || vb_size == 0) 432b8e80941Smrg continue; 433b8e80941Smrg 434b8e80941Smrg ctx_print_buffer(ctx, vb, vb_size, pitch, ctx->max_vbo_decoded_lines); 435b8e80941Smrg 436b8e80941Smrg vb.map = NULL; 437b8e80941Smrg vb_size = 0; 438b8e80941Smrg index = -1; 439b8e80941Smrg pitch = -1; 440b8e80941Smrg ready = false; 441b8e80941Smrg } 442b8e80941Smrg } 443b8e80941Smrg} 444b8e80941Smrg 445b8e80941Smrgstatic void 446b8e80941Smrghandle_3dstate_index_buffer(struct gen_batch_decode_ctx *ctx, 447b8e80941Smrg const uint32_t *p) 448b8e80941Smrg{ 449b8e80941Smrg struct gen_group *inst = gen_ctx_find_instruction(ctx, p); 450b8e80941Smrg 451b8e80941Smrg struct gen_batch_decode_bo ib = {}; 452b8e80941Smrg uint32_t ib_size = 0; 453b8e80941Smrg uint32_t format = 0; 454b8e80941Smrg 455b8e80941Smrg struct gen_field_iterator iter; 456b8e80941Smrg gen_field_iterator_init(&iter, inst, p, 0, false); 457b8e80941Smrg while (gen_field_iterator_next(&iter)) { 458b8e80941Smrg if (strcmp(iter.name, "Index Format") == 0) { 459b8e80941Smrg format = iter.raw_value; 460b8e80941Smrg } else if (strcmp(iter.name, "Buffer Starting Address") == 0) { 461b8e80941Smrg ib = ctx_get_bo(ctx, true, iter.raw_value); 462b8e80941Smrg } else if (strcmp(iter.name, "Buffer Size") == 0) { 463b8e80941Smrg ib_size = iter.raw_value; 464b8e80941Smrg } 465b8e80941Smrg } 466b8e80941Smrg 467b8e80941Smrg if (ib.map == NULL) { 468b8e80941Smrg fprintf(ctx->fp, " buffer contents unavailable\n"); 469b8e80941Smrg return; 470b8e80941Smrg } 471b8e80941Smrg 472b8e80941Smrg const void *m = ib.map; 473b8e80941Smrg const void *ib_end = ib.map + MIN2(ib.size, ib_size); 474b8e80941Smrg for (int i = 0; m < ib_end && i < 10; i++) { 475b8e80941Smrg switch (format) { 476b8e80941Smrg case 0: 477b8e80941Smrg fprintf(ctx->fp, "%3d ", *(uint8_t *)m); 478b8e80941Smrg m += 1; 479b8e80941Smrg break; 480b8e80941Smrg case 1: 481b8e80941Smrg fprintf(ctx->fp, "%3d ", *(uint16_t *)m); 482b8e80941Smrg m += 2; 483b8e80941Smrg break; 484b8e80941Smrg case 2: 485b8e80941Smrg fprintf(ctx->fp, "%3d ", *(uint32_t *)m); 486b8e80941Smrg m += 4; 487b8e80941Smrg break; 488b8e80941Smrg } 489b8e80941Smrg } 490b8e80941Smrg 491b8e80941Smrg if (m < ib_end) 492b8e80941Smrg fprintf(ctx->fp, "..."); 493b8e80941Smrg fprintf(ctx->fp, "\n"); 494b8e80941Smrg} 495b8e80941Smrg 496b8e80941Smrgstatic void 497b8e80941Smrgdecode_single_ksp(struct gen_batch_decode_ctx *ctx, const uint32_t *p) 498b8e80941Smrg{ 499b8e80941Smrg struct gen_group *inst = gen_ctx_find_instruction(ctx, p); 500b8e80941Smrg 501b8e80941Smrg uint64_t ksp = 0; 502b8e80941Smrg bool is_simd8 = false; /* vertex shaders on Gen8+ only */ 503b8e80941Smrg bool is_enabled = true; 504b8e80941Smrg 505b8e80941Smrg struct gen_field_iterator iter; 506b8e80941Smrg gen_field_iterator_init(&iter, inst, p, 0, false); 507b8e80941Smrg while (gen_field_iterator_next(&iter)) { 508b8e80941Smrg if (strcmp(iter.name, "Kernel Start Pointer") == 0) { 509b8e80941Smrg ksp = iter.raw_value; 510b8e80941Smrg } else if (strcmp(iter.name, "SIMD8 Dispatch Enable") == 0) { 511b8e80941Smrg is_simd8 = iter.raw_value; 512b8e80941Smrg } else if (strcmp(iter.name, "Dispatch Mode") == 0) { 513b8e80941Smrg is_simd8 = strcmp(iter.value, "SIMD8") == 0; 514b8e80941Smrg } else if (strcmp(iter.name, "Dispatch Enable") == 0) { 515b8e80941Smrg is_simd8 = strcmp(iter.value, "SIMD8") == 0; 516b8e80941Smrg } else if (strcmp(iter.name, "Enable") == 0) { 517b8e80941Smrg is_enabled = iter.raw_value; 518b8e80941Smrg } 519b8e80941Smrg } 520b8e80941Smrg 521b8e80941Smrg const char *type = 522b8e80941Smrg strcmp(inst->name, "VS_STATE") == 0 ? "vertex shader" : 523b8e80941Smrg strcmp(inst->name, "GS_STATE") == 0 ? "geometry shader" : 524b8e80941Smrg strcmp(inst->name, "SF_STATE") == 0 ? "strips and fans shader" : 525b8e80941Smrg strcmp(inst->name, "CLIP_STATE") == 0 ? "clip shader" : 526b8e80941Smrg strcmp(inst->name, "3DSTATE_DS") == 0 ? "tessellation evaluation shader" : 527b8e80941Smrg strcmp(inst->name, "3DSTATE_HS") == 0 ? "tessellation control shader" : 528b8e80941Smrg strcmp(inst->name, "3DSTATE_VS") == 0 ? (is_simd8 ? "SIMD8 vertex shader" : "vec4 vertex shader") : 529b8e80941Smrg strcmp(inst->name, "3DSTATE_GS") == 0 ? (is_simd8 ? "SIMD8 geometry shader" : "vec4 geometry shader") : 530b8e80941Smrg NULL; 531b8e80941Smrg 532b8e80941Smrg if (is_enabled) { 533b8e80941Smrg ctx_disassemble_program(ctx, ksp, type); 534b8e80941Smrg printf("\n"); 535b8e80941Smrg } 536b8e80941Smrg} 537b8e80941Smrg 538b8e80941Smrgstatic void 539b8e80941Smrgdecode_ps_kernels(struct gen_batch_decode_ctx *ctx, const uint32_t *p) 540b8e80941Smrg{ 541b8e80941Smrg struct gen_group *inst = gen_ctx_find_instruction(ctx, p); 542b8e80941Smrg 543b8e80941Smrg uint64_t ksp[3] = {0, 0, 0}; 544b8e80941Smrg bool enabled[3] = {false, false, false}; 545b8e80941Smrg 546b8e80941Smrg struct gen_field_iterator iter; 547b8e80941Smrg gen_field_iterator_init(&iter, inst, p, 0, false); 548b8e80941Smrg while (gen_field_iterator_next(&iter)) { 549b8e80941Smrg if (strncmp(iter.name, "Kernel Start Pointer ", 550b8e80941Smrg strlen("Kernel Start Pointer ")) == 0) { 551b8e80941Smrg int idx = iter.name[strlen("Kernel Start Pointer ")] - '0'; 552b8e80941Smrg ksp[idx] = strtol(iter.value, NULL, 16); 553b8e80941Smrg } else if (strcmp(iter.name, "8 Pixel Dispatch Enable") == 0) { 554b8e80941Smrg enabled[0] = strcmp(iter.value, "true") == 0; 555b8e80941Smrg } else if (strcmp(iter.name, "16 Pixel Dispatch Enable") == 0) { 556b8e80941Smrg enabled[1] = strcmp(iter.value, "true") == 0; 557b8e80941Smrg } else if (strcmp(iter.name, "32 Pixel Dispatch Enable") == 0) { 558b8e80941Smrg enabled[2] = strcmp(iter.value, "true") == 0; 559b8e80941Smrg } 560b8e80941Smrg } 561b8e80941Smrg 562b8e80941Smrg /* Reorder KSPs to be [8, 16, 32] instead of the hardware order. */ 563b8e80941Smrg if (enabled[0] + enabled[1] + enabled[2] == 1) { 564b8e80941Smrg if (enabled[1]) { 565b8e80941Smrg ksp[1] = ksp[0]; 566b8e80941Smrg ksp[0] = 0; 567b8e80941Smrg } else if (enabled[2]) { 568b8e80941Smrg ksp[2] = ksp[0]; 569b8e80941Smrg ksp[0] = 0; 570b8e80941Smrg } 571b8e80941Smrg } else { 572b8e80941Smrg uint64_t tmp = ksp[1]; 573b8e80941Smrg ksp[1] = ksp[2]; 574b8e80941Smrg ksp[2] = tmp; 575b8e80941Smrg } 576b8e80941Smrg 577b8e80941Smrg if (enabled[0]) 578b8e80941Smrg ctx_disassemble_program(ctx, ksp[0], "SIMD8 fragment shader"); 579b8e80941Smrg if (enabled[1]) 580b8e80941Smrg ctx_disassemble_program(ctx, ksp[1], "SIMD16 fragment shader"); 581b8e80941Smrg if (enabled[2]) 582b8e80941Smrg ctx_disassemble_program(ctx, ksp[2], "SIMD32 fragment shader"); 583b8e80941Smrg fprintf(ctx->fp, "\n"); 584b8e80941Smrg} 585b8e80941Smrg 586b8e80941Smrgstatic void 587b8e80941Smrgdecode_3dstate_constant(struct gen_batch_decode_ctx *ctx, const uint32_t *p) 588b8e80941Smrg{ 589b8e80941Smrg struct gen_group *inst = gen_ctx_find_instruction(ctx, p); 590b8e80941Smrg struct gen_group *body = 591b8e80941Smrg gen_spec_find_struct(ctx->spec, "3DSTATE_CONSTANT_BODY"); 592b8e80941Smrg 593b8e80941Smrg uint32_t read_length[4] = {0}; 594b8e80941Smrg uint64_t read_addr[4]; 595b8e80941Smrg 596b8e80941Smrg struct gen_field_iterator outer; 597b8e80941Smrg gen_field_iterator_init(&outer, inst, p, 0, false); 598b8e80941Smrg while (gen_field_iterator_next(&outer)) { 599b8e80941Smrg if (outer.struct_desc != body) 600b8e80941Smrg continue; 601b8e80941Smrg 602b8e80941Smrg struct gen_field_iterator iter; 603b8e80941Smrg gen_field_iterator_init(&iter, body, &outer.p[outer.start_bit / 32], 604b8e80941Smrg 0, false); 605b8e80941Smrg 606b8e80941Smrg while (gen_field_iterator_next(&iter)) { 607b8e80941Smrg int idx; 608b8e80941Smrg if (sscanf(iter.name, "Read Length[%d]", &idx) == 1) { 609b8e80941Smrg read_length[idx] = iter.raw_value; 610b8e80941Smrg } else if (sscanf(iter.name, "Buffer[%d]", &idx) == 1) { 611b8e80941Smrg read_addr[idx] = iter.raw_value; 612b8e80941Smrg } 613b8e80941Smrg } 614b8e80941Smrg 615b8e80941Smrg for (int i = 0; i < 4; i++) { 616b8e80941Smrg if (read_length[i] == 0) 617b8e80941Smrg continue; 618b8e80941Smrg 619b8e80941Smrg struct gen_batch_decode_bo buffer = ctx_get_bo(ctx, true, read_addr[i]); 620b8e80941Smrg if (!buffer.map) { 621b8e80941Smrg fprintf(ctx->fp, "constant buffer %d unavailable\n", i); 622b8e80941Smrg continue; 623b8e80941Smrg } 624b8e80941Smrg 625b8e80941Smrg unsigned size = read_length[i] * 32; 626b8e80941Smrg fprintf(ctx->fp, "constant buffer %d, size %u\n", i, size); 627b8e80941Smrg 628b8e80941Smrg ctx_print_buffer(ctx, buffer, size, 0, -1); 629b8e80941Smrg } 630b8e80941Smrg } 631b8e80941Smrg} 632b8e80941Smrg 633b8e80941Smrgstatic void 634b8e80941Smrgdecode_3dstate_binding_table_pointers(struct gen_batch_decode_ctx *ctx, 635b8e80941Smrg const uint32_t *p) 636b8e80941Smrg{ 637b8e80941Smrg dump_binding_table(ctx, p[1], -1); 638b8e80941Smrg} 639b8e80941Smrg 640b8e80941Smrgstatic void 641b8e80941Smrgdecode_3dstate_sampler_state_pointers(struct gen_batch_decode_ctx *ctx, 642b8e80941Smrg const uint32_t *p) 643b8e80941Smrg{ 644b8e80941Smrg dump_samplers(ctx, p[1], -1); 645b8e80941Smrg} 646b8e80941Smrg 647b8e80941Smrgstatic void 648b8e80941Smrgdecode_3dstate_sampler_state_pointers_gen6(struct gen_batch_decode_ctx *ctx, 649b8e80941Smrg const uint32_t *p) 650b8e80941Smrg{ 651b8e80941Smrg dump_samplers(ctx, p[1], -1); 652b8e80941Smrg dump_samplers(ctx, p[2], -1); 653b8e80941Smrg dump_samplers(ctx, p[3], -1); 654b8e80941Smrg} 655b8e80941Smrg 656b8e80941Smrgstatic bool 657b8e80941Smrgstr_ends_with(const char *str, const char *end) 658b8e80941Smrg{ 659b8e80941Smrg int offset = strlen(str) - strlen(end); 660b8e80941Smrg if (offset < 0) 661b8e80941Smrg return false; 662b8e80941Smrg 663b8e80941Smrg return strcmp(str + offset, end) == 0; 664b8e80941Smrg} 665b8e80941Smrg 666b8e80941Smrgstatic void 667b8e80941Smrgdecode_dynamic_state_pointers(struct gen_batch_decode_ctx *ctx, 668b8e80941Smrg const char *struct_type, const uint32_t *p, 669b8e80941Smrg int count) 670b8e80941Smrg{ 671b8e80941Smrg struct gen_group *inst = gen_ctx_find_instruction(ctx, p); 672b8e80941Smrg 673b8e80941Smrg uint32_t state_offset = 0; 674b8e80941Smrg 675b8e80941Smrg struct gen_field_iterator iter; 676b8e80941Smrg gen_field_iterator_init(&iter, inst, p, 0, false); 677b8e80941Smrg while (gen_field_iterator_next(&iter)) { 678b8e80941Smrg if (str_ends_with(iter.name, "Pointer")) { 679b8e80941Smrg state_offset = iter.raw_value; 680b8e80941Smrg break; 681b8e80941Smrg } 682b8e80941Smrg } 683b8e80941Smrg 684b8e80941Smrg uint64_t state_addr = ctx->dynamic_base + state_offset; 685b8e80941Smrg struct gen_batch_decode_bo bo = ctx_get_bo(ctx, true, state_addr); 686b8e80941Smrg const void *state_map = bo.map; 687b8e80941Smrg 688b8e80941Smrg if (state_map == NULL) { 689b8e80941Smrg fprintf(ctx->fp, " dynamic %s state unavailable\n", struct_type); 690b8e80941Smrg return; 691b8e80941Smrg } 692b8e80941Smrg 693b8e80941Smrg struct gen_group *state = gen_spec_find_struct(ctx->spec, struct_type); 694b8e80941Smrg if (strcmp(struct_type, "BLEND_STATE") == 0) { 695b8e80941Smrg /* Blend states are different from the others because they have a header 696b8e80941Smrg * struct called BLEND_STATE which is followed by a variable number of 697b8e80941Smrg * BLEND_STATE_ENTRY structs. 698b8e80941Smrg */ 699b8e80941Smrg fprintf(ctx->fp, "%s\n", struct_type); 700b8e80941Smrg ctx_print_group(ctx, state, state_addr, state_map); 701b8e80941Smrg 702b8e80941Smrg state_addr += state->dw_length * 4; 703b8e80941Smrg state_map += state->dw_length * 4; 704b8e80941Smrg 705b8e80941Smrg struct_type = "BLEND_STATE_ENTRY"; 706b8e80941Smrg state = gen_spec_find_struct(ctx->spec, struct_type); 707b8e80941Smrg } 708b8e80941Smrg 709b8e80941Smrg for (int i = 0; i < count; i++) { 710b8e80941Smrg fprintf(ctx->fp, "%s %d\n", struct_type, i); 711b8e80941Smrg ctx_print_group(ctx, state, state_addr, state_map); 712b8e80941Smrg 713b8e80941Smrg state_addr += state->dw_length * 4; 714b8e80941Smrg state_map += state->dw_length * 4; 715b8e80941Smrg } 716b8e80941Smrg} 717b8e80941Smrg 718b8e80941Smrgstatic void 719b8e80941Smrgdecode_3dstate_viewport_state_pointers_cc(struct gen_batch_decode_ctx *ctx, 720b8e80941Smrg const uint32_t *p) 721b8e80941Smrg{ 722b8e80941Smrg decode_dynamic_state_pointers(ctx, "CC_VIEWPORT", p, 4); 723b8e80941Smrg} 724b8e80941Smrg 725b8e80941Smrgstatic void 726b8e80941Smrgdecode_3dstate_viewport_state_pointers_sf_clip(struct gen_batch_decode_ctx *ctx, 727b8e80941Smrg const uint32_t *p) 728b8e80941Smrg{ 729b8e80941Smrg decode_dynamic_state_pointers(ctx, "SF_CLIP_VIEWPORT", p, 4); 730b8e80941Smrg} 731b8e80941Smrg 732b8e80941Smrgstatic void 733b8e80941Smrgdecode_3dstate_blend_state_pointers(struct gen_batch_decode_ctx *ctx, 734b8e80941Smrg const uint32_t *p) 735b8e80941Smrg{ 736b8e80941Smrg decode_dynamic_state_pointers(ctx, "BLEND_STATE", p, 1); 737b8e80941Smrg} 738b8e80941Smrg 739b8e80941Smrgstatic void 740b8e80941Smrgdecode_3dstate_cc_state_pointers(struct gen_batch_decode_ctx *ctx, 741b8e80941Smrg const uint32_t *p) 742b8e80941Smrg{ 743b8e80941Smrg decode_dynamic_state_pointers(ctx, "COLOR_CALC_STATE", p, 1); 744b8e80941Smrg} 745b8e80941Smrg 746b8e80941Smrgstatic void 747b8e80941Smrgdecode_3dstate_scissor_state_pointers(struct gen_batch_decode_ctx *ctx, 748b8e80941Smrg const uint32_t *p) 749b8e80941Smrg{ 750b8e80941Smrg decode_dynamic_state_pointers(ctx, "SCISSOR_RECT", p, 1); 751b8e80941Smrg} 752b8e80941Smrg 753b8e80941Smrgstatic void 754b8e80941Smrgdecode_load_register_imm(struct gen_batch_decode_ctx *ctx, const uint32_t *p) 755b8e80941Smrg{ 756b8e80941Smrg struct gen_group *reg = gen_spec_find_register(ctx->spec, p[1]); 757b8e80941Smrg 758b8e80941Smrg if (reg != NULL) { 759b8e80941Smrg fprintf(ctx->fp, "register %s (0x%x): 0x%x\n", 760b8e80941Smrg reg->name, reg->register_offset, p[2]); 761b8e80941Smrg ctx_print_group(ctx, reg, reg->register_offset, &p[2]); 762b8e80941Smrg } 763b8e80941Smrg} 764b8e80941Smrg 765b8e80941Smrgstruct custom_decoder { 766b8e80941Smrg const char *cmd_name; 767b8e80941Smrg void (*decode)(struct gen_batch_decode_ctx *ctx, const uint32_t *p); 768b8e80941Smrg} custom_decoders[] = { 769b8e80941Smrg { "STATE_BASE_ADDRESS", handle_state_base_address }, 770b8e80941Smrg { "MEDIA_INTERFACE_DESCRIPTOR_LOAD", handle_media_interface_descriptor_load }, 771b8e80941Smrg { "3DSTATE_VERTEX_BUFFERS", handle_3dstate_vertex_buffers }, 772b8e80941Smrg { "3DSTATE_INDEX_BUFFER", handle_3dstate_index_buffer }, 773b8e80941Smrg { "3DSTATE_VS", decode_single_ksp }, 774b8e80941Smrg { "3DSTATE_GS", decode_single_ksp }, 775b8e80941Smrg { "3DSTATE_DS", decode_single_ksp }, 776b8e80941Smrg { "3DSTATE_HS", decode_single_ksp }, 777b8e80941Smrg { "3DSTATE_PS", decode_ps_kernels }, 778b8e80941Smrg { "3DSTATE_CONSTANT_VS", decode_3dstate_constant }, 779b8e80941Smrg { "3DSTATE_CONSTANT_GS", decode_3dstate_constant }, 780b8e80941Smrg { "3DSTATE_CONSTANT_PS", decode_3dstate_constant }, 781b8e80941Smrg { "3DSTATE_CONSTANT_HS", decode_3dstate_constant }, 782b8e80941Smrg { "3DSTATE_CONSTANT_DS", decode_3dstate_constant }, 783b8e80941Smrg 784b8e80941Smrg { "3DSTATE_BINDING_TABLE_POINTERS_VS", decode_3dstate_binding_table_pointers }, 785b8e80941Smrg { "3DSTATE_BINDING_TABLE_POINTERS_HS", decode_3dstate_binding_table_pointers }, 786b8e80941Smrg { "3DSTATE_BINDING_TABLE_POINTERS_DS", decode_3dstate_binding_table_pointers }, 787b8e80941Smrg { "3DSTATE_BINDING_TABLE_POINTERS_GS", decode_3dstate_binding_table_pointers }, 788b8e80941Smrg { "3DSTATE_BINDING_TABLE_POINTERS_PS", decode_3dstate_binding_table_pointers }, 789b8e80941Smrg 790b8e80941Smrg { "3DSTATE_SAMPLER_STATE_POINTERS_VS", decode_3dstate_sampler_state_pointers }, 791b8e80941Smrg { "3DSTATE_SAMPLER_STATE_POINTERS_HS", decode_3dstate_sampler_state_pointers }, 792b8e80941Smrg { "3DSTATE_SAMPLER_STATE_POINTERS_DS", decode_3dstate_sampler_state_pointers }, 793b8e80941Smrg { "3DSTATE_SAMPLER_STATE_POINTERS_GS", decode_3dstate_sampler_state_pointers }, 794b8e80941Smrg { "3DSTATE_SAMPLER_STATE_POINTERS_PS", decode_3dstate_sampler_state_pointers }, 795b8e80941Smrg { "3DSTATE_SAMPLER_STATE_POINTERS", decode_3dstate_sampler_state_pointers_gen6 }, 796b8e80941Smrg 797b8e80941Smrg { "3DSTATE_VIEWPORT_STATE_POINTERS_CC", decode_3dstate_viewport_state_pointers_cc }, 798b8e80941Smrg { "3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP", decode_3dstate_viewport_state_pointers_sf_clip }, 799b8e80941Smrg { "3DSTATE_BLEND_STATE_POINTERS", decode_3dstate_blend_state_pointers }, 800b8e80941Smrg { "3DSTATE_CC_STATE_POINTERS", decode_3dstate_cc_state_pointers }, 801b8e80941Smrg { "3DSTATE_SCISSOR_STATE_POINTERS", decode_3dstate_scissor_state_pointers }, 802b8e80941Smrg { "MI_LOAD_REGISTER_IMM", decode_load_register_imm } 803b8e80941Smrg}; 804b8e80941Smrg 805b8e80941Smrgvoid 806b8e80941Smrggen_print_batch(struct gen_batch_decode_ctx *ctx, 807b8e80941Smrg const uint32_t *batch, uint32_t batch_size, 808b8e80941Smrg uint64_t batch_addr, bool from_ring) 809b8e80941Smrg{ 810b8e80941Smrg const uint32_t *p, *end = batch + batch_size / sizeof(uint32_t); 811b8e80941Smrg int length; 812b8e80941Smrg struct gen_group *inst; 813b8e80941Smrg const char *reset_color = ctx->flags & GEN_BATCH_DECODE_IN_COLOR ? NORMAL : ""; 814b8e80941Smrg 815b8e80941Smrg if (ctx->n_batch_buffer_start >= 100) { 816b8e80941Smrg fprintf(ctx->fp, "%s0x%08"PRIx64": Max batch buffer jumps exceeded%s\n", 817b8e80941Smrg (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) ? RED_COLOR : "", 818b8e80941Smrg (ctx->flags & GEN_BATCH_DECODE_OFFSETS) ? batch_addr : 0, 819b8e80941Smrg reset_color); 820b8e80941Smrg return; 821b8e80941Smrg } 822b8e80941Smrg 823b8e80941Smrg ctx->n_batch_buffer_start++; 824b8e80941Smrg 825b8e80941Smrg for (p = batch; p < end; p += length) { 826b8e80941Smrg inst = gen_ctx_find_instruction(ctx, p); 827b8e80941Smrg length = gen_group_get_length(inst, p); 828b8e80941Smrg assert(inst == NULL || length > 0); 829b8e80941Smrg length = MAX2(1, length); 830b8e80941Smrg 831b8e80941Smrg uint64_t offset; 832b8e80941Smrg if (ctx->flags & GEN_BATCH_DECODE_OFFSETS) 833b8e80941Smrg offset = batch_addr + ((char *)p - (char *)batch); 834b8e80941Smrg else 835b8e80941Smrg offset = 0; 836b8e80941Smrg 837b8e80941Smrg if (inst == NULL) { 838b8e80941Smrg fprintf(ctx->fp, "%s0x%08"PRIx64": unknown instruction %08x%s\n", 839b8e80941Smrg (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) ? RED_COLOR : "", 840b8e80941Smrg offset, p[0], reset_color); 841b8e80941Smrg continue; 842b8e80941Smrg } 843b8e80941Smrg 844b8e80941Smrg const char *color; 845b8e80941Smrg const char *inst_name = gen_group_get_name(inst); 846b8e80941Smrg if (ctx->flags & GEN_BATCH_DECODE_IN_COLOR) { 847b8e80941Smrg reset_color = NORMAL; 848b8e80941Smrg if (ctx->flags & GEN_BATCH_DECODE_FULL) { 849b8e80941Smrg if (strcmp(inst_name, "MI_BATCH_BUFFER_START") == 0 || 850b8e80941Smrg strcmp(inst_name, "MI_BATCH_BUFFER_END") == 0) 851b8e80941Smrg color = GREEN_HEADER; 852b8e80941Smrg else 853b8e80941Smrg color = BLUE_HEADER; 854b8e80941Smrg } else { 855b8e80941Smrg color = NORMAL; 856b8e80941Smrg } 857b8e80941Smrg } else { 858b8e80941Smrg color = ""; 859b8e80941Smrg reset_color = ""; 860b8e80941Smrg } 861b8e80941Smrg 862b8e80941Smrg fprintf(ctx->fp, "%s0x%08"PRIx64": 0x%08x: %-80s%s\n", 863b8e80941Smrg color, offset, p[0], inst_name, reset_color); 864b8e80941Smrg 865b8e80941Smrg if (ctx->flags & GEN_BATCH_DECODE_FULL) { 866b8e80941Smrg ctx_print_group(ctx, inst, offset, p); 867b8e80941Smrg 868b8e80941Smrg for (int i = 0; i < ARRAY_SIZE(custom_decoders); i++) { 869b8e80941Smrg if (strcmp(inst_name, custom_decoders[i].cmd_name) == 0) { 870b8e80941Smrg custom_decoders[i].decode(ctx, p); 871b8e80941Smrg break; 872b8e80941Smrg } 873b8e80941Smrg } 874b8e80941Smrg } 875b8e80941Smrg 876b8e80941Smrg if (strcmp(inst_name, "MI_BATCH_BUFFER_START") == 0) { 877b8e80941Smrg uint64_t next_batch_addr = 0; 878b8e80941Smrg bool ppgtt = false; 879b8e80941Smrg bool second_level = false; 880b8e80941Smrg struct gen_field_iterator iter; 881b8e80941Smrg gen_field_iterator_init(&iter, inst, p, 0, false); 882b8e80941Smrg while (gen_field_iterator_next(&iter)) { 883b8e80941Smrg if (strcmp(iter.name, "Batch Buffer Start Address") == 0) { 884b8e80941Smrg next_batch_addr = iter.raw_value; 885b8e80941Smrg } else if (strcmp(iter.name, "Second Level Batch Buffer") == 0) { 886b8e80941Smrg second_level = iter.raw_value; 887b8e80941Smrg } else if (strcmp(iter.name, "Address Space Indicator") == 0) { 888b8e80941Smrg ppgtt = iter.raw_value; 889b8e80941Smrg } 890b8e80941Smrg } 891b8e80941Smrg 892b8e80941Smrg struct gen_batch_decode_bo next_batch = ctx_get_bo(ctx, ppgtt, next_batch_addr); 893b8e80941Smrg 894b8e80941Smrg if (next_batch.map == NULL) { 895b8e80941Smrg fprintf(ctx->fp, "Secondary batch at 0x%08"PRIx64" unavailable\n", 896b8e80941Smrg next_batch_addr); 897b8e80941Smrg } else { 898b8e80941Smrg gen_print_batch(ctx, next_batch.map, next_batch.size, 899b8e80941Smrg next_batch.addr, false); 900b8e80941Smrg } 901b8e80941Smrg if (second_level) { 902b8e80941Smrg /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" set acts 903b8e80941Smrg * like a subroutine call. Commands that come afterwards get 904b8e80941Smrg * processed once the 2nd level batch buffer returns with 905b8e80941Smrg * MI_BATCH_BUFFER_END. 906b8e80941Smrg */ 907b8e80941Smrg continue; 908b8e80941Smrg } else if (!from_ring) { 909b8e80941Smrg /* MI_BATCH_BUFFER_START with "2nd Level Batch Buffer" unset acts 910b8e80941Smrg * like a goto. Nothing after it will ever get processed. In 911b8e80941Smrg * order to prevent the recursion from growing, we just reset the 912b8e80941Smrg * loop and continue; 913b8e80941Smrg */ 914b8e80941Smrg break; 915b8e80941Smrg } 916b8e80941Smrg } else if (strcmp(inst_name, "MI_BATCH_BUFFER_END") == 0) { 917b8e80941Smrg break; 918b8e80941Smrg } 919b8e80941Smrg } 920b8e80941Smrg 921b8e80941Smrg ctx->n_batch_buffer_start--; 922b8e80941Smrg} 923