1b8e80941Smrg/*
2b8e80941Smrg * Copyright © 2014 Intel Corporation
3b8e80941Smrg *
4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5b8e80941Smrg * copy of this software and associated documentation files (the "Software"),
6b8e80941Smrg * to deal in the Software without restriction, including without limitation
7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the
9b8e80941Smrg * Software is furnished to do so, subject to the following conditions:
10b8e80941Smrg *
11b8e80941Smrg * The above copyright notice and this permission notice (including the next
12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the
13b8e80941Smrg * Software.
14b8e80941Smrg *
15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21b8e80941Smrg * IN THE SOFTWARE.
22b8e80941Smrg */
23b8e80941Smrg
24b8e80941Smrg#include <stdlib.h>
25b8e80941Smrg
26b8e80941Smrg#include "compiler/brw_inst.h"
27b8e80941Smrg#include "compiler/brw_eu.h"
28b8e80941Smrg
29b8e80941Smrg#include "gen_disasm.h"
30b8e80941Smrg
31b8e80941Smrgstruct gen_disasm {
32b8e80941Smrg    struct gen_device_info devinfo;
33b8e80941Smrg};
34b8e80941Smrg
35b8e80941Smrgstatic bool
36b8e80941Smrgis_send(uint32_t opcode)
37b8e80941Smrg{
38b8e80941Smrg   return (opcode == BRW_OPCODE_SEND  ||
39b8e80941Smrg           opcode == BRW_OPCODE_SENDC ||
40b8e80941Smrg           opcode == BRW_OPCODE_SENDS ||
41b8e80941Smrg           opcode == BRW_OPCODE_SENDSC );
42b8e80941Smrg}
43b8e80941Smrg
44b8e80941Smrgstatic int
45b8e80941Smrggen_disasm_find_end(struct gen_disasm *disasm,
46b8e80941Smrg                    const void *assembly, int start)
47b8e80941Smrg{
48b8e80941Smrg   struct gen_device_info *devinfo = &disasm->devinfo;
49b8e80941Smrg   int offset = start;
50b8e80941Smrg
51b8e80941Smrg   /* This loop exits when send-with-EOT or when opcode is 0 */
52b8e80941Smrg   while (true) {
53b8e80941Smrg      const brw_inst *insn = assembly + offset;
54b8e80941Smrg
55b8e80941Smrg      if (brw_inst_cmpt_control(devinfo, insn)) {
56b8e80941Smrg         offset += 8;
57b8e80941Smrg      } else {
58b8e80941Smrg         offset += 16;
59b8e80941Smrg      }
60b8e80941Smrg
61b8e80941Smrg      /* Simplistic, but efficient way to terminate disasm */
62b8e80941Smrg      uint32_t opcode = brw_inst_opcode(devinfo, insn);
63b8e80941Smrg      if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) {
64b8e80941Smrg         break;
65b8e80941Smrg      }
66b8e80941Smrg   }
67b8e80941Smrg
68b8e80941Smrg   return offset;
69b8e80941Smrg}
70b8e80941Smrg
71b8e80941Smrgvoid
72b8e80941Smrggen_disasm_disassemble(struct gen_disasm *disasm, const void *assembly,
73b8e80941Smrg                       int start, FILE *out)
74b8e80941Smrg{
75b8e80941Smrg   struct gen_device_info *devinfo = &disasm->devinfo;
76b8e80941Smrg   int end = gen_disasm_find_end(disasm, assembly, start);
77b8e80941Smrg
78b8e80941Smrg   /* Make a dummy disasm structure that brw_validate_instructions
79b8e80941Smrg    * can work from.
80b8e80941Smrg    */
81b8e80941Smrg   struct disasm_info *disasm_info = disasm_initialize(devinfo, NULL);
82b8e80941Smrg   disasm_new_inst_group(disasm_info, start);
83b8e80941Smrg   disasm_new_inst_group(disasm_info, end);
84b8e80941Smrg
85b8e80941Smrg   brw_validate_instructions(devinfo, assembly, start, end, disasm_info);
86b8e80941Smrg
87b8e80941Smrg   foreach_list_typed(struct inst_group, group, link,
88b8e80941Smrg                      &disasm_info->group_list) {
89b8e80941Smrg      struct exec_node *next_node = exec_node_get_next(&group->link);
90b8e80941Smrg      if (exec_node_is_tail_sentinel(next_node))
91b8e80941Smrg         break;
92b8e80941Smrg
93b8e80941Smrg      struct inst_group *next =
94b8e80941Smrg         exec_node_data(struct inst_group, next_node, link);
95b8e80941Smrg
96b8e80941Smrg      int start_offset = group->offset;
97b8e80941Smrg      int end_offset = next->offset;
98b8e80941Smrg
99b8e80941Smrg      brw_disassemble(devinfo, assembly, start_offset, end_offset, out);
100b8e80941Smrg
101b8e80941Smrg      if (group->error) {
102b8e80941Smrg         fputs(group->error, out);
103b8e80941Smrg      }
104b8e80941Smrg   }
105b8e80941Smrg
106b8e80941Smrg   ralloc_free(disasm_info);
107b8e80941Smrg}
108b8e80941Smrg
109b8e80941Smrgstruct gen_disasm *
110b8e80941Smrggen_disasm_create(const struct gen_device_info *devinfo)
111b8e80941Smrg{
112b8e80941Smrg   struct gen_disasm *gd;
113b8e80941Smrg
114b8e80941Smrg   gd = malloc(sizeof *gd);
115b8e80941Smrg   if (gd == NULL)
116b8e80941Smrg      return NULL;
117b8e80941Smrg
118b8e80941Smrg   gd->devinfo = *devinfo;
119b8e80941Smrg
120b8e80941Smrg   brw_init_compaction_tables(&gd->devinfo);
121b8e80941Smrg
122b8e80941Smrg   return gd;
123b8e80941Smrg}
124b8e80941Smrg
125b8e80941Smrgvoid
126b8e80941Smrggen_disasm_destroy(struct gen_disasm *disasm)
127b8e80941Smrg{
128b8e80941Smrg   free(disasm);
129b8e80941Smrg}
130