1b8e80941Smrg/* 2b8e80941Smrg * Copyright © 2014 Intel Corporation 3b8e80941Smrg * 4b8e80941Smrg * Permission is hereby granted, free of charge, to any person obtaining a 5b8e80941Smrg * copy of this software and associated documentation files (the "Software"), 6b8e80941Smrg * to deal in the Software without restriction, including without limitation 7b8e80941Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8b8e80941Smrg * and/or sell copies of the Software, and to permit persons to whom the 9b8e80941Smrg * Software is furnished to do so, subject to the following conditions: 10b8e80941Smrg * 11b8e80941Smrg * The above copyright notice and this permission notice (including the next 12b8e80941Smrg * paragraph) shall be included in all copies or substantial portions of the 13b8e80941Smrg * Software. 14b8e80941Smrg * 15b8e80941Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16b8e80941Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17b8e80941Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18b8e80941Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19b8e80941Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20b8e80941Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21b8e80941Smrg * IN THE SOFTWARE. 22b8e80941Smrg */ 23b8e80941Smrg 24b8e80941Smrg#ifndef _INTEL_ASM_ANNOTATION_H 25b8e80941Smrg#define _INTEL_ASM_ANNOTATION_H 26b8e80941Smrg 27b8e80941Smrg#include "compiler/glsl/list.h" 28b8e80941Smrg 29b8e80941Smrg#ifdef __cplusplus 30b8e80941Smrgextern "C" { 31b8e80941Smrg#endif 32b8e80941Smrg 33b8e80941Smrgstruct cfg_t; 34b8e80941Smrgstruct backend_instruction; 35b8e80941Smrgstruct gen_device_info; 36b8e80941Smrg 37b8e80941Smrgstruct inst_group { 38b8e80941Smrg struct exec_node link; 39b8e80941Smrg 40b8e80941Smrg int offset; 41b8e80941Smrg 42b8e80941Smrg size_t error_length; 43b8e80941Smrg char *error; 44b8e80941Smrg 45b8e80941Smrg /* Pointers to the basic block in the CFG if the instruction group starts 46b8e80941Smrg * or ends a basic block. 47b8e80941Smrg */ 48b8e80941Smrg struct bblock_t *block_start; 49b8e80941Smrg struct bblock_t *block_end; 50b8e80941Smrg 51b8e80941Smrg /* Annotation for the generated IR. One of the two can be set. */ 52b8e80941Smrg const void *ir; 53b8e80941Smrg const char *annotation; 54b8e80941Smrg}; 55b8e80941Smrg 56b8e80941Smrgstruct disasm_info { 57b8e80941Smrg struct exec_list group_list; 58b8e80941Smrg 59b8e80941Smrg const struct gen_device_info *devinfo; 60b8e80941Smrg const struct cfg_t *cfg; 61b8e80941Smrg 62b8e80941Smrg /** Block index in the cfg. */ 63b8e80941Smrg int cur_block; 64b8e80941Smrg bool use_tail; 65b8e80941Smrg}; 66b8e80941Smrg 67b8e80941Smrgvoid 68b8e80941Smrgdump_assembly(void *assembly, struct disasm_info *disasm); 69b8e80941Smrg 70b8e80941Smrgstruct disasm_info * 71b8e80941Smrgdisasm_initialize(const struct gen_device_info *devinfo, 72b8e80941Smrg const struct cfg_t *cfg); 73b8e80941Smrg 74b8e80941Smrgstruct inst_group * 75b8e80941Smrgdisasm_new_inst_group(struct disasm_info *disasm, unsigned offset); 76b8e80941Smrg 77b8e80941Smrgvoid 78b8e80941Smrgdisasm_annotate(struct disasm_info *disasm, 79b8e80941Smrg struct backend_instruction *inst, unsigned offset); 80b8e80941Smrg 81b8e80941Smrgvoid 82b8e80941Smrgdisasm_insert_error(struct disasm_info *disasm, unsigned offset, 83b8e80941Smrg const char *error); 84b8e80941Smrg 85b8e80941Smrg#ifdef __cplusplus 86b8e80941Smrg} /* extern "C" */ 87b8e80941Smrg#endif 88b8e80941Smrg 89b8e80941Smrg#endif /* _INTEL_ASM_ANNOTATION_H */ 90