brw_fs_cse.cpp revision b8e80941
1/*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#include "brw_fs.h"
25#include "brw_cfg.h"
26
27/** @file brw_fs_cse.cpp
28 *
29 * Support for local common subexpression elimination.
30 *
31 * See Muchnick's Advanced Compiler Design and Implementation, section
32 * 13.1 (p378).
33 */
34
35using namespace brw;
36
37namespace {
38struct aeb_entry : public exec_node {
39   /** The instruction that generates the expression value. */
40   fs_inst *generator;
41
42   /** The temporary where the value is stored. */
43   fs_reg tmp;
44};
45}
46
47static bool
48is_expression(const fs_visitor *v, const fs_inst *const inst)
49{
50   switch (inst->opcode) {
51   case BRW_OPCODE_MOV:
52   case BRW_OPCODE_SEL:
53   case BRW_OPCODE_NOT:
54   case BRW_OPCODE_AND:
55   case BRW_OPCODE_OR:
56   case BRW_OPCODE_XOR:
57   case BRW_OPCODE_SHR:
58   case BRW_OPCODE_SHL:
59   case BRW_OPCODE_ASR:
60   case BRW_OPCODE_CMP:
61   case BRW_OPCODE_CMPN:
62   case BRW_OPCODE_ADD:
63   case BRW_OPCODE_MUL:
64   case SHADER_OPCODE_MULH:
65   case BRW_OPCODE_FRC:
66   case BRW_OPCODE_RNDU:
67   case BRW_OPCODE_RNDD:
68   case BRW_OPCODE_RNDE:
69   case BRW_OPCODE_RNDZ:
70   case BRW_OPCODE_LINE:
71   case BRW_OPCODE_PLN:
72   case BRW_OPCODE_MAD:
73   case BRW_OPCODE_LRP:
74   case FS_OPCODE_FB_READ_LOGICAL:
75   case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
76   case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL:
77   case FS_OPCODE_LINTERP:
78   case SHADER_OPCODE_FIND_LIVE_CHANNEL:
79   case SHADER_OPCODE_BROADCAST:
80   case SHADER_OPCODE_MOV_INDIRECT:
81   case SHADER_OPCODE_TEX_LOGICAL:
82   case SHADER_OPCODE_TXD_LOGICAL:
83   case SHADER_OPCODE_TXF_LOGICAL:
84   case SHADER_OPCODE_TXL_LOGICAL:
85   case SHADER_OPCODE_TXS_LOGICAL:
86   case FS_OPCODE_TXB_LOGICAL:
87   case SHADER_OPCODE_TXF_CMS_LOGICAL:
88   case SHADER_OPCODE_TXF_CMS_W_LOGICAL:
89   case SHADER_OPCODE_TXF_UMS_LOGICAL:
90   case SHADER_OPCODE_TXF_MCS_LOGICAL:
91   case SHADER_OPCODE_LOD_LOGICAL:
92   case SHADER_OPCODE_TG4_LOGICAL:
93   case SHADER_OPCODE_TG4_OFFSET_LOGICAL:
94   case FS_OPCODE_PACK:
95      return true;
96   case SHADER_OPCODE_RCP:
97   case SHADER_OPCODE_RSQ:
98   case SHADER_OPCODE_SQRT:
99   case SHADER_OPCODE_EXP2:
100   case SHADER_OPCODE_LOG2:
101   case SHADER_OPCODE_POW:
102   case SHADER_OPCODE_INT_QUOTIENT:
103   case SHADER_OPCODE_INT_REMAINDER:
104   case SHADER_OPCODE_SIN:
105   case SHADER_OPCODE_COS:
106      return inst->mlen < 2;
107   case SHADER_OPCODE_LOAD_PAYLOAD:
108      return !inst->is_copy_payload(v->alloc);
109   default:
110      return inst->is_send_from_grf() && !inst->has_side_effects() &&
111         !inst->is_volatile();
112   }
113}
114
115static bool
116operands_match(const fs_inst *a, const fs_inst *b, bool *negate)
117{
118   fs_reg *xs = a->src;
119   fs_reg *ys = b->src;
120
121   if (a->opcode == BRW_OPCODE_MAD) {
122      return xs[0].equals(ys[0]) &&
123             ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
124              (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
125   } else if (a->opcode == BRW_OPCODE_MUL && a->dst.type == BRW_REGISTER_TYPE_F) {
126      bool xs0_negate = xs[0].negate;
127      bool xs1_negate = xs[1].file == IMM ? xs[1].f < 0.0f
128                                          : xs[1].negate;
129      bool ys0_negate = ys[0].negate;
130      bool ys1_negate = ys[1].file == IMM ? ys[1].f < 0.0f
131                                          : ys[1].negate;
132      float xs1_imm = xs[1].f;
133      float ys1_imm = ys[1].f;
134
135      xs[0].negate = false;
136      xs[1].negate = false;
137      ys[0].negate = false;
138      ys[1].negate = false;
139      xs[1].f = fabsf(xs[1].f);
140      ys[1].f = fabsf(ys[1].f);
141
142      bool ret = (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
143                 (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
144
145      xs[0].negate = xs0_negate;
146      xs[1].negate = xs[1].file == IMM ? false : xs1_negate;
147      ys[0].negate = ys0_negate;
148      ys[1].negate = ys[1].file == IMM ? false : ys1_negate;
149      xs[1].f = xs1_imm;
150      ys[1].f = ys1_imm;
151
152      *negate = (xs0_negate != xs1_negate) != (ys0_negate != ys1_negate);
153      if (*negate && (a->saturate || b->saturate))
154         return false;
155      return ret;
156   } else if (!a->is_commutative()) {
157      bool match = true;
158      for (int i = 0; i < a->sources; i++) {
159         if (!xs[i].equals(ys[i])) {
160            match = false;
161            break;
162         }
163      }
164      return match;
165   } else {
166      return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
167             (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
168   }
169}
170
171static bool
172instructions_match(fs_inst *a, fs_inst *b, bool *negate)
173{
174   return a->opcode == b->opcode &&
175          a->force_writemask_all == b->force_writemask_all &&
176          a->exec_size == b->exec_size &&
177          a->group == b->group &&
178          a->saturate == b->saturate &&
179          a->predicate == b->predicate &&
180          a->predicate_inverse == b->predicate_inverse &&
181          a->conditional_mod == b->conditional_mod &&
182          a->flag_subreg == b->flag_subreg &&
183          a->dst.type == b->dst.type &&
184          a->offset == b->offset &&
185          a->mlen == b->mlen &&
186          a->ex_mlen == b->ex_mlen &&
187          a->sfid == b->sfid &&
188          a->desc == b->desc &&
189          a->size_written == b->size_written &&
190          a->base_mrf == b->base_mrf &&
191          a->check_tdr == b->check_tdr &&
192          a->send_has_side_effects == b->send_has_side_effects &&
193          a->eot == b->eot &&
194          a->header_size == b->header_size &&
195          a->shadow_compare == b->shadow_compare &&
196          a->pi_noperspective == b->pi_noperspective &&
197          a->target == b->target &&
198          a->sources == b->sources &&
199          operands_match(a, b, negate);
200}
201
202static void
203create_copy_instr(const fs_builder &bld, fs_inst *inst, fs_reg src, bool negate)
204{
205   unsigned written = regs_written(inst);
206   unsigned dst_width =
207      DIV_ROUND_UP(inst->dst.component_size(inst->exec_size), REG_SIZE);
208   fs_inst *copy;
209
210   if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) {
211      assert(src.file == VGRF);
212      fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg,
213                                     inst->sources);
214      for (int i = 0; i < inst->header_size; i++) {
215         payload[i] = src;
216         src.offset += REG_SIZE;
217      }
218      for (int i = inst->header_size; i < inst->sources; i++) {
219         src.type = inst->src[i].type;
220         payload[i] = src;
221         src = offset(src, bld, 1);
222      }
223      copy = bld.LOAD_PAYLOAD(inst->dst, payload, inst->sources,
224                              inst->header_size);
225   } else if (written != dst_width) {
226      assert(src.file == VGRF);
227      assert(written % dst_width == 0);
228      const int sources = written / dst_width;
229      fs_reg *payload = ralloc_array(bld.shader->mem_ctx, fs_reg, sources);
230      for (int i = 0; i < sources; i++) {
231         payload[i] = src;
232         src = offset(src, bld, 1);
233      }
234      copy = bld.LOAD_PAYLOAD(inst->dst, payload, sources, 0);
235   } else {
236      copy = bld.MOV(inst->dst, src);
237      copy->group = inst->group;
238      copy->force_writemask_all = inst->force_writemask_all;
239      copy->src[0].negate = negate;
240   }
241   assert(regs_written(copy) == written);
242}
243
244bool
245fs_visitor::opt_cse_local(bblock_t *block)
246{
247   bool progress = false;
248   exec_list aeb;
249
250   void *cse_ctx = ralloc_context(NULL);
251
252   int ip = block->start_ip;
253   foreach_inst_in_block(fs_inst, inst, block) {
254      /* Skip some cases. */
255      if (is_expression(this, inst) && !inst->is_partial_write() &&
256          ((inst->dst.file != ARF && inst->dst.file != FIXED_GRF) ||
257           inst->dst.is_null()))
258      {
259         bool found = false;
260         bool negate = false;
261
262         foreach_in_list_use_after(aeb_entry, entry, &aeb) {
263            /* Match current instruction's expression against those in AEB. */
264            if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&
265                instructions_match(inst, entry->generator, &negate)) {
266               found = true;
267               progress = true;
268               break;
269            }
270         }
271
272         if (!found) {
273            if (inst->opcode != BRW_OPCODE_MOV ||
274                (inst->opcode == BRW_OPCODE_MOV &&
275                 inst->src[0].file == IMM &&
276                 inst->src[0].type == BRW_REGISTER_TYPE_VF)) {
277               /* Our first sighting of this expression.  Create an entry. */
278               aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
279               entry->tmp = reg_undef;
280               entry->generator = inst;
281               aeb.push_tail(entry);
282            }
283         } else {
284            /* This is at least our second sighting of this expression.
285             * If we don't have a temporary already, make one.
286             */
287            bool no_existing_temp = entry->tmp.file == BAD_FILE;
288            if (no_existing_temp && !entry->generator->dst.is_null()) {
289               const fs_builder ibld = fs_builder(this, block, entry->generator)
290                                       .at(block, entry->generator->next);
291               int written = regs_written(entry->generator);
292
293               entry->tmp = fs_reg(VGRF, alloc.allocate(written),
294                                   entry->generator->dst.type);
295
296               create_copy_instr(ibld, entry->generator, entry->tmp, false);
297
298               entry->generator->dst = entry->tmp;
299            }
300
301            /* dest <- temp */
302            if (!inst->dst.is_null()) {
303               assert(inst->size_written == entry->generator->size_written);
304               assert(inst->dst.type == entry->tmp.type);
305               const fs_builder ibld(this, block, inst);
306
307               create_copy_instr(ibld, inst, entry->tmp, negate);
308            }
309
310            /* Set our iterator so that next time through the loop inst->next
311             * will get the instruction in the basic block after the one we've
312             * removed.
313             */
314            fs_inst *prev = (fs_inst *)inst->prev;
315
316            inst->remove(block);
317            inst = prev;
318         }
319      }
320
321      foreach_in_list_safe(aeb_entry, entry, &aeb) {
322         /* Kill all AEB entries that write a different value to or read from
323          * the flag register if we just wrote it.
324          */
325         if (inst->flags_written()) {
326            bool negate; /* dummy */
327            if (entry->generator->flags_read(devinfo) ||
328                (entry->generator->flags_written() &&
329                 !instructions_match(inst, entry->generator, &negate))) {
330               entry->remove();
331               ralloc_free(entry);
332               continue;
333            }
334         }
335
336         for (int i = 0; i < entry->generator->sources; i++) {
337            fs_reg *src_reg = &entry->generator->src[i];
338
339            /* Kill all AEB entries that use the destination we just
340             * overwrote.
341             */
342            if (regions_overlap(inst->dst, inst->size_written,
343                                entry->generator->src[i],
344                                entry->generator->size_read(i))) {
345               entry->remove();
346               ralloc_free(entry);
347               break;
348            }
349
350            /* Kill any AEB entries using registers that don't get reused any
351             * more -- a sure sign they'll fail operands_match().
352             */
353            if (src_reg->file == VGRF && virtual_grf_end[src_reg->nr] < ip) {
354               entry->remove();
355               ralloc_free(entry);
356               break;
357            }
358         }
359      }
360
361      ip++;
362   }
363
364   ralloc_free(cse_ctx);
365
366   return progress;
367}
368
369bool
370fs_visitor::opt_cse()
371{
372   bool progress = false;
373
374   calculate_live_intervals();
375
376   foreach_block (block, cfg) {
377      progress = opt_cse_local(block) || progress;
378   }
379
380   if (progress)
381      invalidate_live_intervals();
382
383   return progress;
384}
385